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FEB_3072 17.01.25 10:42:06
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10:42:06:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:42:06:ST3_Shared:INFO: FEB-Microcable
10:42:06:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:42:06:febtest:INFO: Testing FEB with SN 3072
10:42:08:smx_tester:INFO: Scanning setup
10:42:08:elinks:INFO: Disabling clock on downlink 0
10:42:08:elinks:INFO: Disabling clock on downlink 1
10:42:08:elinks:INFO: Disabling clock on downlink 2
10:42:08:elinks:INFO: Disabling clock on downlink 3
10:42:08:elinks:INFO: Disabling clock on downlink 4
10:42:08:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:42:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:42:08:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:42:08:elinks:INFO: Disabling clock on downlink 0
10:42:08:elinks:INFO: Disabling clock on downlink 1
10:42:08:elinks:INFO: Disabling clock on downlink 2
10:42:08:elinks:INFO: Disabling clock on downlink 3
10:42:08:elinks:INFO: Disabling clock on downlink 4
10:42:08:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:42:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:42:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
10:42:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
10:42:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
10:42:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
10:42:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
10:42:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
10:42:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
10:42:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
10:42:08:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:42:08:elinks:INFO: Disabling clock on downlink 0
10:42:08:elinks:INFO: Disabling clock on downlink 1
10:42:08:elinks:INFO: Disabling clock on downlink 2
10:42:08:elinks:INFO: Disabling clock on downlink 3
10:42:08:elinks:INFO: Disabling clock on downlink 4
10:42:08:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:42:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:42:08:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:42:08:elinks:INFO: Disabling clock on downlink 0
10:42:08:elinks:INFO: Disabling clock on downlink 1
10:42:08:elinks:INFO: Disabling clock on downlink 2
10:42:08:elinks:INFO: Disabling clock on downlink 3
10:42:08:elinks:INFO: Disabling clock on downlink 4
10:42:08:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:42:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:42:08:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:42:08:elinks:INFO: Disabling clock on downlink 0
10:42:08:elinks:INFO: Disabling clock on downlink 1
10:42:08:elinks:INFO: Disabling clock on downlink 2
10:42:08:elinks:INFO: Disabling clock on downlink 3
10:42:08:elinks:INFO: Disabling clock on downlink 4
10:42:08:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:42:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:42:09:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:42:09:setup_element:INFO: Scanning clock phase
10:42:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:42:09:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:42:09:setup_element:INFO: Clock phase scan results for group 0, downlink 1
10:42:09:setup_element:INFO: Eye window for uplink 8 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
10:42:09:setup_element:INFO: Eye window for uplink 9 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
10:42:09:setup_element:INFO: Eye window for uplink 10: __________________________________________________________________________XXXX__
Clock Delay: 35
10:42:09:setup_element:INFO: Eye window for uplink 11: __________________________________________________________________________XXXX__
Clock Delay: 35
10:42:09:setup_element:INFO: Eye window for uplink 12: _________________________________________________________________________XXXX___
Clock Delay: 34
10:42:09:setup_element:INFO: Eye window for uplink 13: _________________________________________________________________________XXXX___
Clock Delay: 34
10:42:09:setup_element:INFO: Eye window for uplink 14: ____________________________________________________________________________XXX_
Clock Delay: 37
10:42:09:setup_element:INFO: Eye window for uplink 15: ____________________________________________________________________________XXX_
Clock Delay: 37
10:42:09:setup_element:INFO: Setting the clock phase to 35 for group 0, downlink 1
10:42:09:setup_element:INFO: Scanning data phases
10:42:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:42:09:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:42:14:setup_element:INFO: Data phase scan results for group 0, downlink 1
10:42:14:setup_element:INFO: Eye window for uplink 8 : ___________________________XXXXXX_______
Data delay found: 9
10:42:14:setup_element:INFO: Eye window for uplink 9 : ________________________________XXXXX___
Data delay found: 14
10:42:14:setup_element:INFO: Eye window for uplink 10: ______________________________XXXX______
Data delay found: 11
10:42:14:setup_element:INFO: Eye window for uplink 11: _________________________________XXXXX__
Data delay found: 15
10:42:14:setup_element:INFO: Eye window for uplink 12: ____________________________XXXXX_______
Data delay found: 10
10:42:14:setup_element:INFO: Eye window for uplink 13: ________________________________XXXX____
Data delay found: 13
10:42:14:setup_element:INFO: Eye window for uplink 14: _______________________________XXXXX____
Data delay found: 13
10:42:14:setup_element:INFO: Eye window for uplink 15: _________________________________XXXXX__
Data delay found: 15
10:42:14:setup_element:INFO: Setting the data phase to 9 for uplink 8
10:42:14:setup_element:INFO: Setting the data phase to 14 for uplink 9
10:42:14:setup_element:INFO: Setting the data phase to 11 for uplink 10
10:42:14:setup_element:INFO: Setting the data phase to 15 for uplink 11
10:42:14:setup_element:INFO: Setting the data phase to 10 for uplink 12
10:42:14:setup_element:INFO: Setting the data phase to 13 for uplink 13
10:42:14:setup_element:INFO: Setting the data phase to 13 for uplink 14
10:42:14:setup_element:INFO: Setting the data phase to 15 for uplink 15
10:42:14:setup_element:INFO: Beginning SMX ASICs map scan
10:42:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:42:14:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:42:14:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
10:42:14:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
10:42:14:uplink:INFO: Setting uplinks mask [8, 9, 10, 11, 12, 13, 14, 15]
10:42:14:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
10:42:14:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
10:42:15:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
10:42:15:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
10:42:15:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
10:42:15:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
10:42:15:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
10:42:15:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
10:42:17:setup_element:INFO: Performing Elink synchronization
10:42:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:42:17:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:42:17:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
10:42:17:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
10:42:17:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
10:42:17:uplink:INFO: Enabling uplinks [8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
10:42:17:febtest:INFO: Init all SMX (CSA): 30
10:42:24:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:42:24:febtest:INFO: 08-01 | XA-000-09-004-002-004-020-12 | 28.2 | 1177.4
10:42:25:febtest:INFO: 10-03 | XA-000-09-004-002-004-019-12 | 40.9 | 1141.9
10:42:25:febtest:INFO: 12-05 | XA-000-09-004-002-004-018-12 | 37.7 | 1159.7
10:42:25:febtest:INFO: 14-07 | XA-000-09-004-002-004-017-12 | 37.7 | 1153.7
10:42:26:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
10:42:28:ST3_smx:INFO: chip: 8-1 28.225000 C 1189.190035 mV
10:42:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:42:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:42:28:ST3_smx:INFO: Electrons
10:42:28:ST3_smx:INFO: # loops 0
10:42:30:ST3_smx:INFO: # loops 1
10:42:31:ST3_smx:INFO: # loops 2
10:42:33:ST3_smx:INFO: Total # of broken channels: 0
10:42:33:ST3_smx:INFO: List of broken channels: []
10:42:33:ST3_smx:INFO: Total # of broken channels: 0
10:42:33:ST3_smx:INFO: List of broken channels: []
10:42:34:ST3_smx:INFO: chip: 10-3 40.898880 C 1153.732915 mV
10:42:34:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:42:34:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:42:34:ST3_smx:INFO: Electrons
10:42:34:ST3_smx:INFO: # loops 0
10:42:36:ST3_smx:INFO: # loops 1
10:42:37:ST3_smx:INFO: # loops 2
10:42:39:ST3_smx:INFO: Total # of broken channels: 0
10:42:39:ST3_smx:INFO: List of broken channels: []
10:42:39:ST3_smx:INFO: Total # of broken channels: 0
10:42:39:ST3_smx:INFO: List of broken channels: []
10:42:41:ST3_smx:INFO: chip: 12-5 37.726682 C 1171.483840 mV
10:42:41:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:42:41:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:42:41:ST3_smx:INFO: Electrons
10:42:41:ST3_smx:INFO: # loops 0
10:42:42:ST3_smx:INFO: # loops 1
10:42:44:ST3_smx:INFO: # loops 2
10:42:45:ST3_smx:INFO: Total # of broken channels: 0
10:42:45:ST3_smx:INFO: List of broken channels: []
10:42:45:ST3_smx:INFO: Total # of broken channels: 0
10:42:45:ST3_smx:INFO: List of broken channels: []
10:42:47:ST3_smx:INFO: chip: 14-7 40.898880 C 1159.654860 mV
10:42:47:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:42:47:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:42:47:ST3_smx:INFO: Electrons
10:42:47:ST3_smx:INFO: # loops 0
10:42:49:ST3_smx:INFO: # loops 1
10:42:50:ST3_smx:INFO: # loops 2
10:42:52:ST3_smx:INFO: Total # of broken channels: 0
10:42:52:ST3_smx:INFO: List of broken channels: []
10:42:52:ST3_smx:INFO: Total # of broken channels: 0
10:42:52:ST3_smx:INFO: List of broken channels: []
10:42:52:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:42:52:febtest:INFO: 08-01 | XA-000-09-004-002-004-020-12 | 28.2 | 1212.7
10:42:52:febtest:INFO: 10-03 | XA-000-09-004-002-004-019-12 | 40.9 | 1171.5
10:42:52:febtest:INFO: 12-05 | XA-000-09-004-002-004-018-12 | 37.7 | 1189.2
10:42:53:febtest:INFO: 14-07 | XA-000-09-004-002-004-017-12 | 40.9 | 1189.2
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_01_17-10_42_06
OPERATOR : Henrik;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3072| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '0.7144', '1.850', '1.0240', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '0.9745', '1.850', '1.0830', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '0.9824', '1.850', '0.2671', '0.000', '0.0000', '0.000', '0.0000']