09:11:12:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:11:12:ST3_Shared:INFO:	                         FEB-Sensor                         
09:11:12:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:11:24:ST3_ModuleSelector:INFO:	L7UL501040 M7UL5B0010400A2 62 C

09:11:24:ST3_ModuleSelector:INFO:	21123

09:11:24:febtest:INFO:	Testing FEB with SN 3074
09:11:25:smx_tester:INFO:	Scanning setup
09:11:25:elinks:INFO:	Disabling clock on downlink 0
09:11:25:elinks:INFO:	Disabling clock on downlink 1
09:11:25:elinks:INFO:	Disabling clock on downlink 2
09:11:25:elinks:INFO:	Disabling clock on downlink 3
09:11:25:elinks:INFO:	Disabling clock on downlink 4
09:11:25:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:11:25:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:11:26:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:11:26:elinks:INFO:	Disabling clock on downlink 0
09:11:26:elinks:INFO:	Disabling clock on downlink 1
09:11:26:elinks:INFO:	Disabling clock on downlink 2
09:11:26:elinks:INFO:	Disabling clock on downlink 3
09:11:26:elinks:INFO:	Disabling clock on downlink 4
09:11:26:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:11:26:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:11:26:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
09:11:26:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
09:11:26:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
09:11:26:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
09:11:26:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
09:11:26:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
09:11:26:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
09:11:26:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
09:11:26:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
09:11:26:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
09:11:26:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
09:11:26:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
09:11:26:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
09:11:26:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
09:11:26:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
09:11:26:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
09:11:26:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:11:26:elinks:INFO:	Disabling clock on downlink 0
09:11:26:elinks:INFO:	Disabling clock on downlink 1
09:11:26:elinks:INFO:	Disabling clock on downlink 2
09:11:26:elinks:INFO:	Disabling clock on downlink 3
09:11:26:elinks:INFO:	Disabling clock on downlink 4
09:11:26:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:11:26:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:11:26:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:11:26:elinks:INFO:	Disabling clock on downlink 0
09:11:26:elinks:INFO:	Disabling clock on downlink 1
09:11:26:elinks:INFO:	Disabling clock on downlink 2
09:11:26:elinks:INFO:	Disabling clock on downlink 3
09:11:26:elinks:INFO:	Disabling clock on downlink 4
09:11:26:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:11:26:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
09:11:26:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:11:26:elinks:INFO:	Disabling clock on downlink 0
09:11:26:elinks:INFO:	Disabling clock on downlink 1
09:11:26:elinks:INFO:	Disabling clock on downlink 2
09:11:26:elinks:INFO:	Disabling clock on downlink 3
09:11:26:elinks:INFO:	Disabling clock on downlink 4
09:11:26:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:11:26:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
09:11:26:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:11:26:setup_element:INFO:	Scanning clock phase
09:11:26:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:11:26:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:11:26:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
09:11:26:setup_element:INFO:	Eye window for uplink 0 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
09:11:26:setup_element:INFO:	Eye window for uplink 1 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
09:11:26:setup_element:INFO:	Eye window for uplink 2 : ______________________________________________________________________XXXXX_____
Clock Delay: 32
09:11:26:setup_element:INFO:	Eye window for uplink 3 : ______________________________________________________________________XXXXX_____
Clock Delay: 32
09:11:26:setup_element:INFO:	Eye window for uplink 4 : ______________________________________________________________________XXXXXX____
Clock Delay: 32
09:11:26:setup_element:INFO:	Eye window for uplink 5 : ______________________________________________________________________XXXXXX____
Clock Delay: 32
09:11:26:setup_element:INFO:	Eye window for uplink 6 : _____________________________________________________________________XXXXX______
Clock Delay: 31
09:11:26:setup_element:INFO:	Eye window for uplink 7 : _____________________________________________________________________XXXXX______
Clock Delay: 31
09:11:26:setup_element:INFO:	Eye window for uplink 8 : _____________________________________________________________________XXXXXXX____
Clock Delay: 32
09:11:26:setup_element:INFO:	Eye window for uplink 9 : _____________________________________________________________________XXXXXXX____
Clock Delay: 32
09:11:26:setup_element:INFO:	Eye window for uplink 10: ______________________________________________________________________XXXXXX____
Clock Delay: 32
09:11:26:setup_element:INFO:	Eye window for uplink 11: ______________________________________________________________________XXXXXX____
Clock Delay: 32
09:11:26:setup_element:INFO:	Eye window for uplink 12: _____________________________________________________________________XXXXX______
Clock Delay: 31
09:11:26:setup_element:INFO:	Eye window for uplink 13: _____________________________________________________________________XXXXX______
Clock Delay: 31
09:11:26:setup_element:INFO:	Eye window for uplink 14: ______________________________________________________________________XXXXX_____
Clock Delay: 32
09:11:26:setup_element:INFO:	Eye window for uplink 15: ______________________________________________________________________XXXXX_____
Clock Delay: 32
09:11:26:setup_element:INFO:	Setting the clock phase to 32 for group 0, downlink 1
09:11:26:setup_element:INFO:	Scanning data phases
09:11:26:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:11:27:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:11:32:setup_element:INFO:	Data phase scan results for group 0, downlink 1
09:11:32:setup_element:INFO:	Eye window for uplink 0 : __XXXXXXXXX_____________________________
Data delay found: 26
09:11:32:setup_element:INFO:	Eye window for uplink 1 : XXXXXX_______________________________XXX
Data delay found: 21
09:11:32:setup_element:INFO:	Eye window for uplink 2 : XXXXXXX_________________________________
Data delay found: 23
09:11:32:setup_element:INFO:	Eye window for uplink 3 : XXX________________________________XXXXX
Data delay found: 18
09:11:32:setup_element:INFO:	Eye window for uplink 4 : XXXX_________________________________XXX
Data delay found: 20
09:11:32:setup_element:INFO:	Eye window for uplink 5 : _________________________________XXXXXX_
Data delay found: 15
09:11:32:setup_element:INFO:	Eye window for uplink 6 : _____________________________XXXXXXXX___
Data delay found: 12
09:11:32:setup_element:INFO:	Eye window for uplink 7 : _________________________XXXXXXX________
Data delay found: 8
09:11:32:setup_element:INFO:	Eye window for uplink 8 : __________________XXXXXX________________
Data delay found: 0
09:11:32:setup_element:INFO:	Eye window for uplink 9 : _______________________XXXXXX___________
Data delay found: 5
09:11:32:setup_element:INFO:	Eye window for uplink 10: ___________________XXXXXXX______________
Data delay found: 2
09:11:32:setup_element:INFO:	Eye window for uplink 11: _______________________XXXXXXX__________
Data delay found: 6
09:11:32:setup_element:INFO:	Eye window for uplink 12: ___________________XXXXXX_______________
Data delay found: 1
09:11:32:setup_element:INFO:	Eye window for uplink 13: _______________________XXXXX____________
Data delay found: 5
09:11:32:setup_element:INFO:	Eye window for uplink 14: ____________________XXXXXXX_____________
Data delay found: 3
09:11:32:setup_element:INFO:	Eye window for uplink 15: _______________________XXXXXXX__________
Data delay found: 6
09:11:32:setup_element:INFO:	Setting the data phase to 26 for uplink 0
09:11:32:setup_element:INFO:	Setting the data phase to 21 for uplink 1
09:11:32:setup_element:INFO:	Setting the data phase to 23 for uplink 2
09:11:32:setup_element:INFO:	Setting the data phase to 18 for uplink 3
09:11:32:setup_element:INFO:	Setting the data phase to 20 for uplink 4
09:11:32:setup_element:INFO:	Setting the data phase to 15 for uplink 5
09:11:32:setup_element:INFO:	Setting the data phase to 12 for uplink 6
09:11:32:setup_element:INFO:	Setting the data phase to 8 for uplink 7
09:11:32:setup_element:INFO:	Setting the data phase to 0 for uplink 8
09:11:32:setup_element:INFO:	Setting the data phase to 5 for uplink 9
09:11:32:setup_element:INFO:	Setting the data phase to 2 for uplink 10
09:11:32:setup_element:INFO:	Setting the data phase to 6 for uplink 11
09:11:32:setup_element:INFO:	Setting the data phase to 1 for uplink 12
09:11:32:setup_element:INFO:	Setting the data phase to 5 for uplink 13
09:11:32:setup_element:INFO:	Setting the data phase to 3 for uplink 14
09:11:32:setup_element:INFO:	Setting the data phase to 6 for uplink 15
09:11:32:setup_element:INFO:	Beginning SMX ASICs map scan
09:11:32:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:11:32:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:11:32:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
09:11:32:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
09:11:32:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
09:11:32:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
09:11:32:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
09:11:32:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
09:11:32:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
09:11:32:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
09:11:32:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
09:11:32:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
09:11:32:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
09:11:32:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
09:11:32:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
09:11:33:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
09:11:33:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
09:11:33:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
09:11:33:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
09:11:33:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
09:11:33:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
09:11:34:setup_element:INFO:	Performing Elink synchronization
09:11:34:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:11:34:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:11:34:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
09:11:34:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
09:11:34:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
09:11:34:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   1   |  0  |   [1]   |    2    | [(0, 1), (1, 0)]
 1   | [0]  |   1   |  0  |   [8]   |    2    | [(0, 8), (1, 9)]
 2   | [0]  |   1   |  0  |   [3]   |    2    | [(0, 3), (1, 2)]
 3   | [0]  |   1   |  0  |  [10]   |    2    | [(0, 10), (1, 11)]
 4   | [0]  |   1   |  0  |   [5]   |    2    | [(0, 5), (1, 4)]
 5   | [0]  |   1   |  0  |  [12]   |    2    | [(0, 12), (1, 13)]
 6   | [0]  |   1   |  0  |   [7]   |    2    | [(0, 7), (1, 6)]
 7   | [0]  |   1   |  0  |  [14]   |    2    | [(0, 14), (1, 15)]
|_________________________________________________________________________|
09:11:35:febtest:INFO:	Init all SMX (CSA): 30
09:11:51:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:11:51:febtest:INFO:	01-00 | XA-000-08-003-000-003-096-01 |  18.7 | 1212.7
09:11:51:febtest:INFO:	08-01 | XA-000-08-003-000-003-112-06 |  40.9 | 1135.9
09:11:52:febtest:INFO:	03-02 | XA-000-08-003-000-003-100-01 |  31.4 | 1171.5
09:11:52:febtest:INFO:	10-03 | XA-000-08-003-000-003-105-01 |  44.1 | 1130.0
09:11:52:febtest:INFO:	05-04 | XA-000-08-003-000-003-104-01 |  28.2 | 1189.2
09:11:52:febtest:INFO:	12-05 | XA-000-08-003-000-003-109-01 |  37.7 | 1141.9
09:11:52:febtest:INFO:	07-06 | XA-000-08-003-000-003-108-01 |  31.4 | 1177.4
09:11:53:febtest:INFO:	14-07 | XA-000-08-003-000-003-113-06 |  34.6 | 1159.7
09:11:54:febtest:INFO:	Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
09:11:56:ST3_smx:INFO:	chip: 1-0 	 18.745682 C 	 1224.468235 mV
09:11:56:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:11:56:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:11:56:ST3_smx:INFO:		Electrons
09:11:56:ST3_smx:INFO:	# loops 0
09:11:57:ST3_smx:INFO:	# loops 1
09:11:59:ST3_smx:INFO:	# loops 2
09:12:01:ST3_smx:INFO:	Total # of broken channels: 0
09:12:01:ST3_smx:INFO:	List of broken channels: []
09:12:01:ST3_smx:INFO:	Total # of broken channels: 0
09:12:01:ST3_smx:INFO:	List of broken channels: []
09:12:03:ST3_smx:INFO:	chip: 8-1 	 40.898880 C 	 1147.806000 mV
09:12:03:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:12:03:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:12:03:ST3_smx:INFO:		Electrons
09:12:03:ST3_smx:INFO:	# loops 0
09:12:05:ST3_smx:INFO:	# loops 1
09:12:06:ST3_smx:INFO:	# loops 2
09:12:08:ST3_smx:INFO:	Total # of broken channels: 1
09:12:08:ST3_smx:INFO:	List of broken channels: [127]
09:12:08:ST3_smx:INFO:	Total # of broken channels: 1
09:12:08:ST3_smx:INFO:	List of broken channels: [127]
09:12:10:ST3_smx:INFO:	chip: 3-2 	 31.389742 C 	 1183.292940 mV
09:12:10:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:12:10:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:12:10:ST3_smx:INFO:		Electrons
09:12:10:ST3_smx:INFO:	# loops 0
09:12:11:ST3_smx:INFO:	# loops 1
09:12:13:ST3_smx:INFO:	# loops 2
09:12:15:ST3_smx:INFO:	Total # of broken channels: 0
09:12:15:ST3_smx:INFO:	List of broken channels: []
09:12:15:ST3_smx:INFO:	Total # of broken channels: 0
09:12:15:ST3_smx:INFO:	List of broken channels: []
09:12:17:ST3_smx:INFO:	chip: 10-3 	 44.073563 C 	 1141.874115 mV
09:12:17:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:12:17:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:12:17:ST3_smx:INFO:		Electrons
09:12:17:ST3_smx:INFO:	# loops 0
09:12:19:ST3_smx:INFO:	# loops 1
09:12:20:ST3_smx:INFO:	# loops 2
09:12:22:ST3_smx:INFO:	Total # of broken channels: 0
09:12:22:ST3_smx:INFO:	List of broken channels: []
09:12:22:ST3_smx:INFO:	Total # of broken channels: 1
09:12:22:ST3_smx:INFO:	List of broken channels: [1]
09:12:24:ST3_smx:INFO:	chip: 5-4 	 28.225000 C 	 1200.969315 mV
09:12:24:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:12:24:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:12:24:ST3_smx:INFO:		Electrons
09:12:24:ST3_smx:INFO:	# loops 0
09:12:26:ST3_smx:INFO:	# loops 1
09:12:28:ST3_smx:INFO:	# loops 2
09:12:29:ST3_smx:INFO:	Total # of broken channels: 0
09:12:29:ST3_smx:INFO:	List of broken channels: []
09:12:29:ST3_smx:INFO:	Total # of broken channels: 0
09:12:29:ST3_smx:INFO:	List of broken channels: []
09:12:31:ST3_smx:INFO:	chip: 12-5 	 40.898880 C 	 1153.732915 mV
09:12:31:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:12:31:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:12:31:ST3_smx:INFO:		Electrons
09:12:31:ST3_smx:INFO:	# loops 0
09:12:33:ST3_smx:INFO:	# loops 1
09:12:35:ST3_smx:INFO:	# loops 2
09:12:37:ST3_smx:INFO:	Total # of broken channels: 0
09:12:37:ST3_smx:INFO:	List of broken channels: []
09:12:37:ST3_smx:INFO:	Total # of broken channels: 0
09:12:37:ST3_smx:INFO:	List of broken channels: []
09:12:38:ST3_smx:INFO:	chip: 7-6 	 31.389742 C 	 1189.190035 mV
09:12:38:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:12:38:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:12:38:ST3_smx:INFO:		Electrons
09:12:38:ST3_smx:INFO:	# loops 0
09:12:40:ST3_smx:INFO:	# loops 1
09:12:42:ST3_smx:INFO:	# loops 2
09:12:43:ST3_smx:INFO:	Total # of broken channels: 0
09:12:43:ST3_smx:INFO:	List of broken channels: []
09:12:43:ST3_smx:INFO:	Total # of broken channels: 0
09:12:43:ST3_smx:INFO:	List of broken channels: []
09:12:45:ST3_smx:INFO:	chip: 14-7 	 37.726682 C 	 1171.483840 mV
09:12:45:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:12:45:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:12:45:ST3_smx:INFO:		Electrons
09:12:45:ST3_smx:INFO:	# loops 0
09:12:46:ST3_smx:INFO:	# loops 1
09:12:48:ST3_smx:INFO:	# loops 2
09:12:50:ST3_smx:INFO:	Total # of broken channels: 0
09:12:50:ST3_smx:INFO:	List of broken channels: []
09:12:50:ST3_smx:INFO:	Total # of broken channels: 0
09:12:50:ST3_smx:INFO:	List of broken channels: []
09:12:50:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:12:50:febtest:INFO:	01-00 | XA-000-08-003-000-003-096-01 |  21.9 | 1247.9
09:12:51:febtest:INFO:	08-01 | XA-000-08-003-000-003-112-06 |  44.1 | 1165.6
09:12:51:febtest:INFO:	03-02 | XA-000-08-003-000-003-100-01 |  34.6 | 1206.9
09:12:51:febtest:INFO:	10-03 | XA-000-08-003-000-003-105-01 |  44.1 | 1165.6
09:12:51:febtest:INFO:	05-04 | XA-000-08-003-000-003-104-01 |  31.4 | 1218.6
09:12:51:febtest:INFO:	12-05 | XA-000-08-003-000-003-109-01 |  40.9 | 1177.4
09:12:52:febtest:INFO:	07-06 | XA-000-08-003-000-003-108-01 |  34.6 | 1206.9
09:12:52:febtest:INFO:	14-07 | XA-000-08-003-000-003-113-06 |  37.7 | 1189.2
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_08_16-09_11_12
OPERATOR  : Benjamin; 
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3074| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
SENSOR_ID:	21123

MODULE_NAME:	L7UL501040 M7UL5B0010400A2 62 C

MODULE_TYPE:	
MODULE_LADDER:	L7UL501040
MODULE_MODULE:	M7UL5B0010400A2
MODULE_SIZE:	62
MODULE_GRADE:	C
------------------------------------------------------------
VI_before_Init : ['2.450', '1.5550', '1.853', '2.3200', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0130', '1.850', '2.3160', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9690', '1.850', '0.5237', '0.000', '0.0000', '0.000', '0.0000']