
FEB_3075 21.10.24 11:32:32
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11:32:32:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 11:32:32:ST3_Shared:INFO: FEB-Microcable 11:32:32:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 11:32:32:febtest:INFO: Testing FEB with SN 3075 11:32:34:smx_tester:INFO: Scanning setup 11:32:34:elinks:INFO: Disabling clock on downlink 0 11:32:34:elinks:INFO: Disabling clock on downlink 1 11:32:34:elinks:INFO: Disabling clock on downlink 2 11:32:34:elinks:INFO: Disabling clock on downlink 3 11:32:34:elinks:INFO: Disabling clock on downlink 4 11:32:34:setup_element:INFO: Checking SOS, encoding_mode: SOS 11:32:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 11:32:34:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 11:32:34:elinks:INFO: Disabling clock on downlink 0 11:32:34:elinks:INFO: Disabling clock on downlink 1 11:32:34:elinks:INFO: Disabling clock on downlink 2 11:32:34:elinks:INFO: Disabling clock on downlink 3 11:32:34:elinks:INFO: Disabling clock on downlink 4 11:32:34:setup_element:INFO: Checking SOS, encoding_mode: SOS 11:32:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 11:32:34:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8 11:32:34:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9 11:32:34:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10 11:32:34:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11 11:32:34:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12 11:32:34:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13 11:32:34:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14 11:32:34:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15 11:32:34:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 11:32:34:elinks:INFO: Disabling clock on downlink 0 11:32:34:elinks:INFO: Disabling clock on downlink 1 11:32:34:elinks:INFO: Disabling clock on downlink 2 11:32:34:elinks:INFO: Disabling clock on downlink 3 11:32:34:elinks:INFO: Disabling clock on downlink 4 11:32:34:setup_element:INFO: Checking SOS, encoding_mode: SOS 11:32:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 11:32:34:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 11:32:34:elinks:INFO: Disabling clock on downlink 0 11:32:34:elinks:INFO: Disabling clock on downlink 1 11:32:34:elinks:INFO: Disabling clock on downlink 2 11:32:34:elinks:INFO: Disabling clock on downlink 3 11:32:34:elinks:INFO: Disabling clock on downlink 4 11:32:34:setup_element:INFO: Checking SOS, encoding_mode: SOS 11:32:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 11:32:34:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 11:32:34:elinks:INFO: Disabling clock on downlink 0 11:32:34:elinks:INFO: Disabling clock on downlink 1 11:32:34:elinks:INFO: Disabling clock on downlink 2 11:32:34:elinks:INFO: Disabling clock on downlink 3 11:32:34:elinks:INFO: Disabling clock on downlink 4 11:32:34:setup_element:INFO: Checking SOS, encoding_mode: SOS 11:32:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 11:32:35:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 11:32:35:setup_element:INFO: Scanning clock phase 11:32:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 11:32:35:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 11:32:35:setup_element:INFO: Clock phase scan results for group 0, downlink 1 11:32:35:setup_element:INFO: Eye window for uplink 8 : ________________________________________________________________________________ Clock Delay: 40 11:32:35:setup_element:INFO: Eye window for uplink 9 : ________________________________________________________________________________ Clock Delay: 40 11:32:35:setup_element:INFO: Eye window for uplink 10: _______________________________________________________________________XXXXXX___ Clock Delay: 33 11:32:35:setup_element:INFO: Eye window for uplink 11: _______________________________________________________________________XXXXXX___ Clock Delay: 33 11:32:35:setup_element:INFO: Eye window for uplink 12: ________________________________________________________________________XXXXXX__ Clock Delay: 34 11:32:35:setup_element:INFO: Eye window for uplink 13: ________________________________________________________________________XXXXXX__ Clock Delay: 34 11:32:35:setup_element:INFO: Eye window for uplink 14: ________________________________________________________________________XXXX____ Clock Delay: 33 11:32:35:setup_element:INFO: Eye window for uplink 15: ________________________________________________________________________XXXX____ Clock Delay: 33 11:32:35:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 1 11:32:35:setup_element:INFO: Scanning data phases 11:32:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 11:32:35:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 11:32:40:setup_element:INFO: Data phase scan results for group 0, downlink 1 11:32:40:setup_element:INFO: Eye window for uplink 8 : __________________XXXXXXX_______________ Data delay found: 1 11:32:40:setup_element:INFO: Eye window for uplink 9 : _______________________XXXXXXX__________ Data delay found: 6 11:32:40:setup_element:INFO: Eye window for uplink 10: _______________________XXXXXXX__________ Data delay found: 6 11:32:40:setup_element:INFO: Eye window for uplink 11: ___________________________XXXXXXX______ Data delay found: 10 11:32:40:setup_element:INFO: Eye window for uplink 12: ___________________________XXXXXX_______ Data delay found: 9 11:32:40:setup_element:INFO: Eye window for uplink 13: ______________________________XXXXXXX___ Data delay found: 13 11:32:40:setup_element:INFO: Eye window for uplink 14: ________________________XXXXXXXX________ Data delay found: 7 11:32:40:setup_element:INFO: Eye window for uplink 15: ___________________________XXXXXXXX_____ Data delay found: 10 11:32:40:setup_element:INFO: Setting the data phase to 1 for uplink 8 11:32:40:setup_element:INFO: Setting the data phase to 6 for uplink 9 11:32:40:setup_element:INFO: Setting the data phase to 6 for uplink 10 11:32:40:setup_element:INFO: Setting the data phase to 10 for uplink 11 11:32:40:setup_element:INFO: Setting the data phase to 9 for uplink 12 11:32:40:setup_element:INFO: Setting the data phase to 13 for uplink 13 11:32:40:setup_element:INFO: Setting the data phase to 7 for uplink 14 11:32:40:setup_element:INFO: Setting the data phase to 10 for uplink 15 11:32:40:setup_element:INFO: Beginning SMX ASICs map scan 11:32:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 11:32:40:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 11:32:40:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 11:32:40:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 11:32:40:uplink:INFO: Setting uplinks mask [8, 9, 10, 11, 12, 13, 14, 15] 11:32:40:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8 11:32:40:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9 11:32:41:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10 11:32:41:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11 11:32:41:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12 11:32:41:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13 11:32:41:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14 11:32:41:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15 11:32:43:setup_element:INFO: Performing Elink synchronization 11:32:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 11:32:43:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 11:32:43:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 11:32:43:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 11:32:43:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1 11:32:43:uplink:INFO: Enabling uplinks [8, 9, 10, 11, 12, 13, 14, 15] |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)] 3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)] 5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)] 7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)] |_________________________________________________________________________| 11:32:43:febtest:INFO: Init all SMX (CSA): 30 11:32:51:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 11:32:52:febtest:INFO: 08-01 | XA-000-09-004-006-003-009-08 | 21.9 | 1212.7 11:32:52:febtest:INFO: 10-03 | XA-000-08-003-000-006-051-08 | 34.6 | 1153.7 11:32:52:febtest:INFO: 12-05 | XA-000-08-003-000-006-051-08 | -22.1 | 1578.5 11:32:52:febtest:INFO: 14-07 | XA-000-08-003-000-006-051-08 | 18.7 | 1212.7 11:32:53:febtest:INFO: Set all CSA to ZERO FEB type: A FEB_A: 1 FEB_B: 0 11:32:55:ST3_smx:INFO: chip: 8-1 21.902970 C 1224.468235 mV 11:32:55:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:32:55:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:32:55:ST3_smx:INFO: Electrons 11:32:55:ST3_smx:INFO: # loops 0 11:32:57:ST3_smx:INFO: # loops 1 11:32:58:ST3_smx:INFO: # loops 2 11:33:00:ST3_smx:INFO: Total # of broken channels: 0 11:33:00:ST3_smx:INFO: List of broken channels: [] 11:33:00:ST3_smx:INFO: Total # of broken channels: 0 11:33:00:ST3_smx:INFO: List of broken channels: [] 11:33:02:ST3_smx:INFO: chip: 10-3 34.556970 C 1165.571835 mV 11:33:02:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:33:02:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:33:02:ST3_smx:INFO: Electrons 11:33:02:ST3_smx:INFO: # loops 0 11:33:04:ST3_smx:INFO: # loops 1 11:33:05:ST3_smx:INFO: # loops 2 11:33:07:ST3_smx:INFO: Total # of broken channels: 0 11:33:07:ST3_smx:INFO: List of broken channels: [] 11:33:07:ST3_smx:INFO: Total # of broken channels: 0 11:33:07:ST3_smx:INFO: List of broken channels: [] 11:33:08:ST3_smx:INFO: chip: 12-5 -28.315430 C 1578.532875 mV 11:33:08:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:33:08:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:33:08:ST3_smx:INFO: Electrons 11:33:08:ST3_smx:INFO: # loops 0 11:33:10:ST3_smx:INFO: # loops 1 11:33:11:ST3_smx:INFO: # loops 2 11:33:13:ST3_smx:INFO: Total # of broken channels: 0 11:33:13:ST3_smx:INFO: List of broken channels: [] 11:33:13:ST3_smx:INFO: Total # of broken channels: 0 11:33:13:ST3_smx:INFO: List of broken channels: [] 11:33:14:ST3_smx:INFO: chip: 14-7 18.745682 C 1224.468235 mV 11:33:14:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:33:14:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:33:14:ST3_smx:INFO: Electrons 11:33:14:ST3_smx:INFO: # loops 0 11:33:16:ST3_smx:INFO: # loops 1 11:33:18:ST3_smx:INFO: # loops 2 11:33:19:ST3_smx:INFO: Total # of broken channels: 0 11:33:19:ST3_smx:INFO: List of broken channels: [] 11:33:19:ST3_smx:INFO: Total # of broken channels: 0 11:33:19:ST3_smx:INFO: List of broken channels: [] 11:33:19:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 11:33:20:febtest:INFO: 08-01 | XA-000-09-004-006-003-009-08 | 21.9 | 1247.9 11:33:20:febtest:INFO: 10-03 | XA-000-08-003-000-006-051-08 | 37.7 | 1189.2 11:33:20:febtest:INFO: 12-05 | XA-000-08-003-000-006-051-08 | -56.3 | 1578.5 11:33:20:febtest:INFO: 14-07 | XA-000-08-003-000-006-051-08 | 21.9 | 1247.9 ############################################################ # S U M M A R Y # ############################################################ {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 24_10_21-11_32_32 OPERATOR : Henrik; SITE : KIT | SETUP : KIT_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 3075| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['2.450', '0.7668', '1.850', '1.0190', '0.000', '0.0000', '0.000', '0.0000'] VI_after__Init : ['2.450', '1.0430', '1.850', '1.0790', '0.000', '0.0000', '0.000', '0.0000'] VI_at__the_End : ['2.450', '0.9975', '1.850', '0.2668', '0.000', '0.0000', '0.000', '0.0000']