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FEB_3077 19.09.24 13:02:55
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13:02:55:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:02:55:ST3_Shared:INFO: FEB-Microcable
13:02:55:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:02:55:febtest:INFO: Testing FEB with SN 3077
13:02:56:smx_tester:INFO: Scanning setup
13:02:56:elinks:INFO: Disabling clock on downlink 0
13:02:56:elinks:INFO: Disabling clock on downlink 1
13:02:56:elinks:INFO: Disabling clock on downlink 2
13:02:56:elinks:INFO: Disabling clock on downlink 3
13:02:56:elinks:INFO: Disabling clock on downlink 4
13:02:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:02:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:02:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:02:56:elinks:INFO: Disabling clock on downlink 0
13:02:56:elinks:INFO: Disabling clock on downlink 1
13:02:56:elinks:INFO: Disabling clock on downlink 2
13:02:56:elinks:INFO: Disabling clock on downlink 3
13:02:56:elinks:INFO: Disabling clock on downlink 4
13:02:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:02:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:02:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
13:02:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
13:02:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
13:02:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
13:02:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
13:02:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
13:02:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
13:02:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
13:02:57:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:02:57:elinks:INFO: Disabling clock on downlink 0
13:02:57:elinks:INFO: Disabling clock on downlink 1
13:02:57:elinks:INFO: Disabling clock on downlink 2
13:02:57:elinks:INFO: Disabling clock on downlink 3
13:02:57:elinks:INFO: Disabling clock on downlink 4
13:02:57:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:02:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:02:57:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:02:57:elinks:INFO: Disabling clock on downlink 0
13:02:57:elinks:INFO: Disabling clock on downlink 1
13:02:57:elinks:INFO: Disabling clock on downlink 2
13:02:57:elinks:INFO: Disabling clock on downlink 3
13:02:57:elinks:INFO: Disabling clock on downlink 4
13:02:57:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:02:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
13:02:57:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:02:57:elinks:INFO: Disabling clock on downlink 0
13:02:57:elinks:INFO: Disabling clock on downlink 1
13:02:57:elinks:INFO: Disabling clock on downlink 2
13:02:57:elinks:INFO: Disabling clock on downlink 3
13:02:57:elinks:INFO: Disabling clock on downlink 4
13:02:57:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:02:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
13:02:57:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:02:57:setup_element:INFO: Scanning clock phase
13:02:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:02:57:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:02:57:setup_element:INFO: Clock phase scan results for group 0, downlink 1
13:02:57:setup_element:INFO: Eye window for uplink 8 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
13:02:57:setup_element:INFO: Eye window for uplink 9 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
13:02:57:setup_element:INFO: Eye window for uplink 10: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
13:02:57:setup_element:INFO: Eye window for uplink 11: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
13:02:57:setup_element:INFO: Eye window for uplink 12: ________________________________________________________________________________
Clock Delay: 40
13:02:57:setup_element:INFO: Eye window for uplink 13: ________________________________________________________________________________
Clock Delay: 40
13:02:57:setup_element:INFO: Eye window for uplink 14: _______________________________________________________________________XXXXX____
Clock Delay: 33
13:02:57:setup_element:INFO: Eye window for uplink 15: _______________________________________________________________________XXXXX____
Clock Delay: 33
13:02:57:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 1
13:02:57:setup_element:INFO: Scanning data phases
13:02:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:02:57:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:03:02:setup_element:INFO: Data phase scan results for group 0, downlink 1
13:03:02:setup_element:INFO: Eye window for uplink 8 : _______________________XXXXXXXX_________
Data delay found: 6
13:03:02:setup_element:INFO: Eye window for uplink 9 : ____________________________XXXXXXXX____
Data delay found: 11
13:03:02:setup_element:INFO: Eye window for uplink 10: ____________________________XXXXXXX_____
Data delay found: 11
13:03:02:setup_element:INFO: Eye window for uplink 11: _______________________________XXXXXXX__
Data delay found: 14
13:03:02:setup_element:INFO: Eye window for uplink 12: ________________________XXXXXX__________
Data delay found: 6
13:03:02:setup_element:INFO: Eye window for uplink 13: ___________________________XXXXXX_______
Data delay found: 9
13:03:02:setup_element:INFO: Eye window for uplink 14: __________________________XXXXXX________
Data delay found: 8
13:03:02:setup_element:INFO: Eye window for uplink 15: _____________________________XXXXX______
Data delay found: 11
13:03:02:setup_element:INFO: Setting the data phase to 6 for uplink 8
13:03:02:setup_element:INFO: Setting the data phase to 11 for uplink 9
13:03:02:setup_element:INFO: Setting the data phase to 11 for uplink 10
13:03:02:setup_element:INFO: Setting the data phase to 14 for uplink 11
13:03:02:setup_element:INFO: Setting the data phase to 6 for uplink 12
13:03:02:setup_element:INFO: Setting the data phase to 9 for uplink 13
13:03:02:setup_element:INFO: Setting the data phase to 8 for uplink 14
13:03:02:setup_element:INFO: Setting the data phase to 11 for uplink 15
13:03:02:setup_element:INFO: Beginning SMX ASICs map scan
13:03:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:03:02:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:03:02:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
13:03:02:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
13:03:02:uplink:INFO: Setting uplinks mask [8, 9, 10, 11, 12, 13, 14, 15]
13:03:03:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
13:03:03:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
13:03:03:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
13:03:03:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
13:03:03:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
13:03:03:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
13:03:04:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
13:03:04:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
13:03:05:setup_element:INFO: Performing Elink synchronization
13:03:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:03:05:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:03:05:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
13:03:05:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
13:03:05:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
13:03:05:uplink:INFO: Enabling uplinks [8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
13:03:06:febtest:INFO: Init all SMX (CSA): 30
13:03:14:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:03:14:febtest:INFO: 08-01 | XA-000-08-003-000-006-049-08 | 28.2 | 1177.4
13:03:14:febtest:INFO: 10-03 | XA-000-08-003-000-006-047-15 | 9.3 | 1271.2
13:03:14:febtest:INFO: 12-05 | XA-000-08-003-000-006-045-15 | 18.7 | 1218.6
13:03:14:febtest:INFO: 14-07 | XA-000-08-003-000-006-051-08 | 34.6 | 1159.7
13:03:15:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
13:03:17:ST3_smx:INFO: chip: 8-1 28.225000 C 1189.190035 mV
13:03:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:03:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:03:17:ST3_smx:INFO: Electrons
13:03:17:ST3_smx:INFO: # loops 0
13:03:19:ST3_smx:INFO: # loops 1
13:03:21:ST3_smx:INFO: # loops 2
13:03:23:ST3_smx:INFO: Total # of broken channels: 0
13:03:23:ST3_smx:INFO: List of broken channels: []
13:03:23:ST3_smx:INFO: Total # of broken channels: 0
13:03:23:ST3_smx:INFO: List of broken channels: []
13:03:25:ST3_smx:INFO: chip: 10-3 12.438562 C 1288.680240 mV
13:03:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:03:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:03:25:ST3_smx:INFO: Electrons
13:03:25:ST3_smx:INFO: # loops 0
13:03:27:ST3_smx:INFO: # loops 1
13:03:29:ST3_smx:INFO: # loops 2
13:03:30:ST3_smx:INFO: Total # of broken channels: 0
13:03:30:ST3_smx:INFO: List of broken channels: []
13:03:30:ST3_smx:INFO: Total # of broken channels: 1
13:03:30:ST3_smx:INFO: List of broken channels: [1]
13:03:32:ST3_smx:INFO: chip: 12-5 18.745682 C 1230.330540 mV
13:03:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:03:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:03:32:ST3_smx:INFO: Electrons
13:03:32:ST3_smx:INFO: # loops 0
13:03:33:ST3_smx:INFO: # loops 1
13:03:35:ST3_smx:INFO: # loops 2
13:03:36:ST3_smx:INFO: Total # of broken channels: 0
13:03:36:ST3_smx:INFO: List of broken channels: []
13:03:36:ST3_smx:INFO: Total # of broken channels: 0
13:03:36:ST3_smx:INFO: List of broken channels: []
13:03:38:ST3_smx:INFO: chip: 14-7 37.726682 C 1171.483840 mV
13:03:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:03:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:03:38:ST3_smx:INFO: Electrons
13:03:38:ST3_smx:INFO: # loops 0
13:03:40:ST3_smx:INFO: # loops 1
13:03:41:ST3_smx:INFO: # loops 2
13:03:43:ST3_smx:INFO: Total # of broken channels: 0
13:03:43:ST3_smx:INFO: List of broken channels: []
13:03:43:ST3_smx:INFO: Total # of broken channels: 0
13:03:43:ST3_smx:INFO: List of broken channels: []
13:03:44:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:03:44:febtest:INFO: 08-01 | XA-000-08-003-000-006-049-08 | 31.4 | 1212.7
13:03:44:febtest:INFO: 10-03 | XA-000-08-003-000-006-047-15 | 9.3 | 1369.5
13:03:44:febtest:INFO: 12-05 | XA-000-08-003-000-006-045-15 | 18.7 | 1247.9
13:03:44:febtest:INFO: 14-07 | XA-000-08-003-000-006-051-08 | 37.7 | 1189.2
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_09_19-13_02_55
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3077| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '0.9058', '1.850', '1.2590', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.0360', '1.850', '1.1040', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.0170', '1.850', '0.2687', '0.000', '0.0000', '0.000', '0.0000']