FEB_3078 15.01.25 11:42:36
Info
11:42:36:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:42:36:ST3_Shared:INFO: FEB-Microcable
11:42:36:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:42:36:febtest:INFO: Testing FEB with SN 3078
11:42:37:smx_tester:INFO: Scanning setup
11:42:37:elinks:INFO: Disabling clock on downlink 0
11:42:37:elinks:INFO: Disabling clock on downlink 1
11:42:37:elinks:INFO: Disabling clock on downlink 2
11:42:37:elinks:INFO: Disabling clock on downlink 3
11:42:37:elinks:INFO: Disabling clock on downlink 4
11:42:37:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:42:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:42:37:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:42:37:elinks:INFO: Disabling clock on downlink 0
11:42:37:elinks:INFO: Disabling clock on downlink 1
11:42:37:elinks:INFO: Disabling clock on downlink 2
11:42:37:elinks:INFO: Disabling clock on downlink 3
11:42:37:elinks:INFO: Disabling clock on downlink 4
11:42:37:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:42:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:42:38:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
11:42:38:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
11:42:38:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
11:42:38:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
11:42:38:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
11:42:38:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
11:42:38:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
11:42:38:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
11:42:38:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:42:38:elinks:INFO: Disabling clock on downlink 0
11:42:38:elinks:INFO: Disabling clock on downlink 1
11:42:38:elinks:INFO: Disabling clock on downlink 2
11:42:38:elinks:INFO: Disabling clock on downlink 3
11:42:38:elinks:INFO: Disabling clock on downlink 4
11:42:38:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:42:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:42:38:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:42:38:elinks:INFO: Disabling clock on downlink 0
11:42:38:elinks:INFO: Disabling clock on downlink 1
11:42:38:elinks:INFO: Disabling clock on downlink 2
11:42:38:elinks:INFO: Disabling clock on downlink 3
11:42:38:elinks:INFO: Disabling clock on downlink 4
11:42:38:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:42:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
11:42:38:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:42:38:elinks:INFO: Disabling clock on downlink 0
11:42:38:elinks:INFO: Disabling clock on downlink 1
11:42:38:elinks:INFO: Disabling clock on downlink 2
11:42:38:elinks:INFO: Disabling clock on downlink 3
11:42:38:elinks:INFO: Disabling clock on downlink 4
11:42:38:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:42:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
11:42:38:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:42:38:setup_element:INFO: Scanning clock phase
11:42:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:42:38:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:42:38:setup_element:INFO: Clock phase scan results for group 0, downlink 1
11:42:38:setup_element:INFO: Eye window for uplink 8 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
11:42:38:setup_element:INFO: Eye window for uplink 9 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
11:42:38:setup_element:INFO: Eye window for uplink 10: __________________________________________________________________________XXXXXX
Clock Delay: 36
11:42:38:setup_element:INFO: Eye window for uplink 11: __________________________________________________________________________XXXXXX
Clock Delay: 36
11:42:38:setup_element:INFO: Eye window for uplink 12: ___________________________________________________________________________XXXXX
Clock Delay: 37
11:42:38:setup_element:INFO: Eye window for uplink 13: ___________________________________________________________________________XXXXX
Clock Delay: 37
11:42:38:setup_element:INFO: Eye window for uplink 14: X__________________________________________________________________________XXXXX
Clock Delay: 37
11:42:38:setup_element:INFO: Eye window for uplink 15: X__________________________________________________________________________XXXXX
Clock Delay: 37
11:42:38:setup_element:INFO: Setting the clock phase to 36 for group 0, downlink 1
11:42:38:setup_element:INFO: Scanning data phases
11:42:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:42:38:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:42:43:setup_element:INFO: Data phase scan results for group 0, downlink 1
11:42:43:setup_element:INFO: Eye window for uplink 8 : __________________________XXXXX_________
Data delay found: 8
11:42:43:setup_element:INFO: Eye window for uplink 9 : ______________________________XXXXXX____
Data delay found: 12
11:42:43:setup_element:INFO: Eye window for uplink 10: __________________________XXXXXXXXXXXXXX
Data delay found: 12
11:42:43:setup_element:INFO: Eye window for uplink 11: __________________________XXXXXXXXXXXXXX
Data delay found: 12
11:42:43:setup_element:INFO: Eye window for uplink 12: ______________________________XXXXX_____
Data delay found: 12
11:42:43:setup_element:INFO: Eye window for uplink 13: __________________________________XXXX__
Data delay found: 15
11:42:43:setup_element:INFO: Eye window for uplink 14: ________________________________XXXX____
Data delay found: 13
11:42:43:setup_element:INFO: Eye window for uplink 15: _________________________________XXXXX__
Data delay found: 15
11:42:43:setup_element:INFO: Setting the data phase to 8 for uplink 8
11:42:43:setup_element:INFO: Setting the data phase to 12 for uplink 9
11:42:43:setup_element:INFO: Setting the data phase to 12 for uplink 10
11:42:43:setup_element:INFO: Setting the data phase to 12 for uplink 11
11:42:43:setup_element:INFO: Setting the data phase to 12 for uplink 12
11:42:43:setup_element:INFO: Setting the data phase to 15 for uplink 13
11:42:43:setup_element:INFO: Setting the data phase to 13 for uplink 14
11:42:43:setup_element:INFO: Setting the data phase to 15 for uplink 15
11:42:43:setup_element:INFO: Beginning SMX ASICs map scan
11:42:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:42:43:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:42:43:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
11:42:43:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
11:42:43:uplink:INFO: Setting uplinks mask [8, 9, 10, 11, 12, 13, 14, 15]
11:42:44:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
11:42:44:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
11:42:44:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
11:42:44:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
11:42:44:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
11:42:44:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
11:42:45:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
11:42:45:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
11:42:46:setup_element:INFO: Performing Elink synchronization
11:42:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:42:46:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:42:46:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
11:42:46:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
11:42:46:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
11:42:46:uplink:INFO: Enabling uplinks [8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
11:42:46:febtest:INFO: Init all SMX (CSA): 30
11:42:54:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:42:54:febtest:INFO: 08-01 | XA-000-08-003-000-006-044-15 | 25.1 | 1218.6
11:42:54:febtest:INFO: 10-03 | XA-000-08-003-000-006-051-08 | 34.6 | 1177.4
11:42:54:febtest:INFO: 12-05 | XA-000-08-003-000-006-046-15 | 34.6 | 1177.4
11:42:54:febtest:INFO: 14-07 | XA-000-08-003-000-006-051-08 | 25.1 | 1201.0
11:42:55:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
11:42:57:ST3_smx:INFO: chip: 8-1 25.062742 C 1242.040240 mV
11:42:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:42:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:42:57:ST3_smx:INFO: Electrons
11:42:57:ST3_smx:INFO: # loops 0
11:42:59:ST3_smx:INFO: # loops 1
11:43:00:ST3_smx:INFO: # loops 2
11:43:02:ST3_smx:INFO: Total # of broken channels: 0
11:43:02:ST3_smx:INFO: List of broken channels: []
11:43:02:ST3_smx:INFO: Total # of broken channels: 0
11:43:02:ST3_smx:INFO: List of broken channels: []
11:43:03:ST3_smx:INFO: chip: 10-3 34.556970 C 1189.190035 mV
11:43:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:43:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:43:03:ST3_smx:INFO: Electrons
11:43:03:ST3_smx:INFO: # loops 0
11:43:06:ST3_smx:INFO: # loops 1
11:43:08:ST3_smx:INFO: # loops 2
11:43:10:ST3_smx:INFO: Total # of broken channels: 0
11:43:10:ST3_smx:INFO: List of broken channels: []
11:43:10:ST3_smx:INFO: Total # of broken channels: 0
11:43:10:ST3_smx:INFO: List of broken channels: []
11:43:11:ST3_smx:INFO: chip: 12-5 34.556970 C 1189.190035 mV
11:43:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:43:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:43:11:ST3_smx:INFO: Electrons
11:43:11:ST3_smx:INFO: # loops 0
11:43:13:ST3_smx:INFO: # loops 1
11:43:15:ST3_smx:INFO: # loops 2
11:43:16:ST3_smx:INFO: Total # of broken channels: 0
11:43:16:ST3_smx:INFO: List of broken channels: []
11:43:16:ST3_smx:INFO: Total # of broken channels: 0
11:43:16:ST3_smx:INFO: List of broken channels: []
11:43:18:ST3_smx:INFO: chip: 14-7 28.225000 C 1212.728715 mV
11:43:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:43:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:43:18:ST3_smx:INFO: Electrons
11:43:18:ST3_smx:INFO: # loops 0
11:43:19:ST3_smx:INFO: # loops 1
11:43:21:ST3_smx:INFO: # loops 2
11:43:22:ST3_smx:INFO: Total # of broken channels: 0
11:43:22:ST3_smx:INFO: List of broken channels: []
11:43:22:ST3_smx:INFO: Total # of broken channels: 0
11:43:22:ST3_smx:INFO: List of broken channels: []
11:43:23:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:43:23:febtest:INFO: 08-01 | XA-000-08-003-000-006-044-15 | 21.9 | 1381.0
11:43:23:febtest:INFO: 10-03 | XA-000-08-003-000-006-051-08 | 37.7 | 1212.7
11:43:23:febtest:INFO: 12-05 | XA-000-08-003-000-006-046-15 | 34.6 | 1206.9
11:43:23:febtest:INFO: 14-07 | XA-000-08-003-000-006-051-08 | 28.2 | 1236.2
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_01_15-11_42_36
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3078| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '0.9452', '1.850', '1.2250', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.2040', '1.850', '1.0350', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.1560', '1.850', '0.2676', '0.000', '0.0000', '0.000', '0.0000']