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FEB_3081 24.09.24 14:43:27
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14:43:27:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:43:27:ST3_Shared:INFO: FEB-Microcable
14:43:27:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:43:27:febtest:INFO: Testing FEB with SN 3081
14:43:28:smx_tester:INFO: Scanning setup
14:43:28:elinks:INFO: Disabling clock on downlink 0
14:43:28:elinks:INFO: Disabling clock on downlink 1
14:43:28:elinks:INFO: Disabling clock on downlink 2
14:43:28:elinks:INFO: Disabling clock on downlink 3
14:43:28:elinks:INFO: Disabling clock on downlink 4
14:43:28:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:43:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
14:43:28:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:43:28:elinks:INFO: Disabling clock on downlink 0
14:43:28:elinks:INFO: Disabling clock on downlink 1
14:43:28:elinks:INFO: Disabling clock on downlink 2
14:43:28:elinks:INFO: Disabling clock on downlink 3
14:43:28:elinks:INFO: Disabling clock on downlink 4
14:43:28:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:43:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:43:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
14:43:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
14:43:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
14:43:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
14:43:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
14:43:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
14:43:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
14:43:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
14:43:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
14:43:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
14:43:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
14:43:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
14:43:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
14:43:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
14:43:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
14:43:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
14:43:29:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:43:29:elinks:INFO: Disabling clock on downlink 0
14:43:29:elinks:INFO: Disabling clock on downlink 1
14:43:29:elinks:INFO: Disabling clock on downlink 2
14:43:29:elinks:INFO: Disabling clock on downlink 3
14:43:29:elinks:INFO: Disabling clock on downlink 4
14:43:29:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:43:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:43:29:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:43:29:elinks:INFO: Disabling clock on downlink 0
14:43:29:elinks:INFO: Disabling clock on downlink 1
14:43:29:elinks:INFO: Disabling clock on downlink 2
14:43:29:elinks:INFO: Disabling clock on downlink 3
14:43:29:elinks:INFO: Disabling clock on downlink 4
14:43:29:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:43:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
14:43:29:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:43:29:elinks:INFO: Disabling clock on downlink 0
14:43:29:elinks:INFO: Disabling clock on downlink 1
14:43:29:elinks:INFO: Disabling clock on downlink 2
14:43:29:elinks:INFO: Disabling clock on downlink 3
14:43:29:elinks:INFO: Disabling clock on downlink 4
14:43:29:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:43:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
14:43:29:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:43:29:setup_element:INFO: Scanning clock phase
14:43:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:43:29:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:43:29:setup_element:INFO: Clock phase scan results for group 0, downlink 1
14:43:29:setup_element:INFO: Eye window for uplink 0 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
14:43:29:setup_element:INFO: Eye window for uplink 1 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
14:43:29:setup_element:INFO: Eye window for uplink 2 : __________________________________________________________________________XXXXXX
Clock Delay: 36
14:43:29:setup_element:INFO: Eye window for uplink 3 : __________________________________________________________________________XXXXXX
Clock Delay: 36
14:43:29:setup_element:INFO: Eye window for uplink 4 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
14:43:29:setup_element:INFO: Eye window for uplink 5 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
14:43:29:setup_element:INFO: Eye window for uplink 6 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
14:43:29:setup_element:INFO: Eye window for uplink 7 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
14:43:29:setup_element:INFO: Eye window for uplink 8 : ______________________________________________________________________XXXXXX____
Clock Delay: 32
14:43:29:setup_element:INFO: Eye window for uplink 9 : ______________________________________________________________________XXXXXX____
Clock Delay: 32
14:43:29:setup_element:INFO: Eye window for uplink 10: _______________________________________________________________________XXXXXX___
Clock Delay: 33
14:43:29:setup_element:INFO: Eye window for uplink 11: _______________________________________________________________________XXXXXX___
Clock Delay: 33
14:43:29:setup_element:INFO: Eye window for uplink 12: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
14:43:29:setup_element:INFO: Eye window for uplink 13: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
14:43:29:setup_element:INFO: Eye window for uplink 14: _______________________________________________________________________XXXXXX___
Clock Delay: 33
14:43:29:setup_element:INFO: Eye window for uplink 15: _______________________________________________________________________XXXXXX___
Clock Delay: 33
14:43:29:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 1
14:43:29:setup_element:INFO: Scanning data phases
14:43:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:43:30:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:43:35:setup_element:INFO: Data phase scan results for group 0, downlink 1
14:43:35:setup_element:INFO: Eye window for uplink 0 : ______XXXXXXX___________________________
Data delay found: 29
14:43:35:setup_element:INFO: Eye window for uplink 1 : __XXXXXX________________________________
Data delay found: 24
14:43:35:setup_element:INFO: Eye window for uplink 2 : ____XXXXXXXX____________________________
Data delay found: 27
14:43:35:setup_element:INFO: Eye window for uplink 3 : XXXXXXX________________________________X
Data delay found: 22
14:43:35:setup_element:INFO: Eye window for uplink 4 : XXXXXX________________________________XX
Data delay found: 21
14:43:35:setup_element:INFO: Eye window for uplink 5 : XX_________________________________XXXXX
Data delay found: 18
14:43:35:setup_element:INFO: Eye window for uplink 6 : ___________________XXXXXXXX____XXXXXXX__
Data delay found: 8
14:43:35:setup_element:INFO: Eye window for uplink 7 : ___________________XXXXXXXXXXXXXXX______
Data delay found: 6
14:43:35:setup_element:INFO: Eye window for uplink 8 : ________________XXXXXXX_________________
Data delay found: 39
14:43:35:setup_element:INFO: Eye window for uplink 9 : ______________________XXXXXX____________
Data delay found: 4
14:43:35:setup_element:INFO: Eye window for uplink 10: _____________________XXXXXX_____________
Data delay found: 3
14:43:35:setup_element:INFO: Eye window for uplink 11: ________________________XXXXXXX_________
Data delay found: 7
14:43:35:setup_element:INFO: Eye window for uplink 12: ____________________XXXXXXXX____________
Data delay found: 3
14:43:35:setup_element:INFO: Eye window for uplink 13: ________________________XXXXXXX_________
Data delay found: 7
14:43:35:setup_element:INFO: Eye window for uplink 14: ____________________XXXXXXXX____________
Data delay found: 3
14:43:35:setup_element:INFO: Eye window for uplink 15: _______________________XXXXXXXX_________
Data delay found: 6
14:43:35:setup_element:INFO: Setting the data phase to 29 for uplink 0
14:43:35:setup_element:INFO: Setting the data phase to 24 for uplink 1
14:43:35:setup_element:INFO: Setting the data phase to 27 for uplink 2
14:43:35:setup_element:INFO: Setting the data phase to 22 for uplink 3
14:43:35:setup_element:INFO: Setting the data phase to 21 for uplink 4
14:43:35:setup_element:INFO: Setting the data phase to 18 for uplink 5
14:43:35:setup_element:INFO: Setting the data phase to 8 for uplink 6
14:43:35:setup_element:INFO: Setting the data phase to 6 for uplink 7
14:43:35:setup_element:INFO: Setting the data phase to 39 for uplink 8
14:43:35:setup_element:INFO: Setting the data phase to 4 for uplink 9
14:43:35:setup_element:INFO: Setting the data phase to 3 for uplink 10
14:43:35:setup_element:INFO: Setting the data phase to 7 for uplink 11
14:43:35:setup_element:INFO: Setting the data phase to 3 for uplink 12
14:43:35:setup_element:INFO: Setting the data phase to 7 for uplink 13
14:43:35:setup_element:INFO: Setting the data phase to 3 for uplink 14
14:43:35:setup_element:INFO: Setting the data phase to 6 for uplink 15
14:43:35:setup_element:INFO: Beginning SMX ASICs map scan
14:43:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:43:35:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:43:35:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
14:43:35:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
14:43:35:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
14:43:35:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
14:43:35:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
14:43:35:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
14:43:35:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
14:43:35:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
14:43:35:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
14:43:35:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
14:43:35:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
14:43:36:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
14:43:36:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
14:43:36:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
14:43:36:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
14:43:36:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
14:43:36:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
14:43:36:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
14:43:36:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
14:43:37:setup_element:INFO: Performing Elink synchronization
14:43:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:43:37:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:43:37:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
14:43:37:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
14:43:37:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
14:43:37:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
14:43:38:febtest:INFO: Init all SMX (CSA): 30
14:43:57:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:43:58:febtest:INFO: 01-00 | XA-000-08-003-000-006-051-08 | 31.4 | 1183.3
14:43:58:febtest:INFO: 08-01 | XA-000-08-003-000-006-051-08 | 34.6 | 1171.5
14:43:58:febtest:INFO: 03-02 | XA-000-08-003-000-006-051-08 | 34.6 | 1183.3
14:43:58:febtest:INFO: 10-03 | XA-000-08-003-000-006-051-08 | 44.1 | 1147.8
14:43:58:febtest:INFO: 05-04 | XA-000-08-003-000-006-051-08 | 25.1 | 1236.2
14:43:59:febtest:INFO: 12-05 | XA-000-08-003-000-006-051-08 | 21.9 | 1224.5
14:43:59:febtest:INFO: 07-06 | XA-000-08-003-000-006-051-08 | 37.7 | 1177.4
14:43:59:febtest:INFO: 14-07 | XA-000-08-003-000-006-051-08 | 28.2 | 1212.7
14:44:00:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
14:44:02:ST3_smx:INFO: chip: 1-0 34.556970 C 1195.082160 mV
14:44:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:44:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:44:02:ST3_smx:INFO: Electrons
14:44:02:ST3_smx:INFO: # loops 0
14:44:04:ST3_smx:INFO: # loops 1
14:44:06:ST3_smx:INFO: # loops 2
14:44:08:ST3_smx:INFO: Total # of broken channels: 0
14:44:08:ST3_smx:INFO: List of broken channels: []
14:44:08:ST3_smx:INFO: Total # of broken channels: 0
14:44:08:ST3_smx:INFO: List of broken channels: []
14:44:09:ST3_smx:INFO: chip: 8-1 34.556970 C 1189.190035 mV
14:44:09:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:44:09:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:44:09:ST3_smx:INFO: Electrons
14:44:09:ST3_smx:INFO: # loops 0
14:44:11:ST3_smx:INFO: # loops 1
14:44:13:ST3_smx:INFO: # loops 2
14:44:15:ST3_smx:INFO: Total # of broken channels: 0
14:44:15:ST3_smx:INFO: List of broken channels: []
14:44:15:ST3_smx:INFO: Total # of broken channels: 0
14:44:15:ST3_smx:INFO: List of broken channels: []
14:44:17:ST3_smx:INFO: chip: 3-2 34.556970 C 1195.082160 mV
14:44:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:44:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:44:17:ST3_smx:INFO: Electrons
14:44:17:ST3_smx:INFO: # loops 0
14:44:19:ST3_smx:INFO: # loops 1
14:44:22:ST3_smx:INFO: # loops 2
14:44:24:ST3_smx:INFO: Total # of broken channels: 0
14:44:24:ST3_smx:INFO: List of broken channels: []
14:44:24:ST3_smx:INFO: Total # of broken channels: 0
14:44:24:ST3_smx:INFO: List of broken channels: []
14:44:25:ST3_smx:INFO: chip: 10-3 40.898880 C 1165.571835 mV
14:44:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:44:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:44:25:ST3_smx:INFO: Electrons
14:44:25:ST3_smx:INFO: # loops 0
14:44:27:ST3_smx:INFO: # loops 1
14:44:29:ST3_smx:INFO: # loops 2
14:44:31:ST3_smx:INFO: Total # of broken channels: 0
14:44:31:ST3_smx:INFO: List of broken channels: []
14:44:31:ST3_smx:INFO: Total # of broken channels: 0
14:44:31:ST3_smx:INFO: List of broken channels: []
14:44:33:ST3_smx:INFO: chip: 5-4 25.062742 C 1259.567515 mV
14:44:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:44:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:44:33:ST3_smx:INFO: Electrons
14:44:33:ST3_smx:INFO: # loops 0
14:44:35:ST3_smx:INFO: # loops 1
14:44:37:ST3_smx:INFO: # loops 2
14:44:39:ST3_smx:INFO: Total # of broken channels: 0
14:44:39:ST3_smx:INFO: List of broken channels: []
14:44:39:ST3_smx:INFO: Total # of broken channels: 0
14:44:40:ST3_smx:INFO: List of broken channels: []
14:44:41:ST3_smx:INFO: chip: 12-5 25.062742 C 1242.040240 mV
14:44:41:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:44:41:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:44:41:ST3_smx:INFO: Electrons
14:44:41:ST3_smx:INFO: # loops 0
14:44:43:ST3_smx:INFO: # loops 1
14:44:45:ST3_smx:INFO: # loops 2
14:44:47:ST3_smx:INFO: Total # of broken channels: 0
14:44:47:ST3_smx:INFO: List of broken channels: []
14:44:47:ST3_smx:INFO: Total # of broken channels: 0
14:44:47:ST3_smx:INFO: List of broken channels: []
14:44:49:ST3_smx:INFO: chip: 7-6 40.898880 C 1189.190035 mV
14:44:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:44:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:44:49:ST3_smx:INFO: Electrons
14:44:49:ST3_smx:INFO: # loops 0
14:44:51:ST3_smx:INFO: # loops 1
14:44:53:ST3_smx:INFO: # loops 2
14:44:55:ST3_smx:INFO: Total # of broken channels: 0
14:44:55:ST3_smx:INFO: List of broken channels: []
14:44:55:ST3_smx:INFO: Total # of broken channels: 0
14:44:55:ST3_smx:INFO: List of broken channels: []
14:44:57:ST3_smx:INFO: chip: 14-7 28.225000 C 1224.468235 mV
14:44:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:44:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:44:57:ST3_smx:INFO: Electrons
14:44:57:ST3_smx:INFO: # loops 0
14:44:59:ST3_smx:INFO: # loops 1
14:45:01:ST3_smx:INFO: # loops 2
14:45:02:ST3_smx:INFO: Total # of broken channels: 0
14:45:02:ST3_smx:INFO: List of broken channels: []
14:45:02:ST3_smx:INFO: Total # of broken channels: 0
14:45:02:ST3_smx:INFO: List of broken channels: []
14:45:03:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:45:03:febtest:INFO: 01-00 | XA-000-08-003-000-006-051-08 | 34.6 | 1218.6
14:45:03:febtest:INFO: 08-01 | XA-000-08-003-000-006-051-08 | 34.6 | 1212.7
14:45:03:febtest:INFO: 03-02 | XA-000-08-003-000-006-051-08 | 37.7 | 1224.5
14:45:03:febtest:INFO: 10-03 | XA-000-08-003-000-006-051-08 | 44.1 | 1189.2
14:45:04:febtest:INFO: 05-04 | XA-000-08-003-000-006-051-08 | 25.1 | 1352.3
14:45:04:febtest:INFO: 12-05 | XA-000-08-003-000-006-051-08 | 25.1 | 1271.2
14:45:04:febtest:INFO: 07-06 | XA-000-08-003-000-006-051-08 | 40.9 | 1206.9
14:45:04:febtest:INFO: 14-07 | XA-000-08-003-000-006-051-08 | 31.4 | 1247.9
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_09_24-14_43_27
OPERATOR : Henrik;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3081| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.5090', '1.850', '2.9360', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0370', '1.850', '2.5920', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '2.0280', '1.850', '0.5346', '0.000', '0.0000', '0.000', '0.0000']