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FEB_3084 16.01.25 10:34:28
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10:34:28:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:34:28:ST3_Shared:INFO: FEB-Microcable
10:34:28:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:34:28:febtest:INFO: Testing FEB with SN 3084
10:34:29:smx_tester:INFO: Scanning setup
10:34:29:elinks:INFO: Disabling clock on downlink 0
10:34:29:elinks:INFO: Disabling clock on downlink 1
10:34:29:elinks:INFO: Disabling clock on downlink 2
10:34:29:elinks:INFO: Disabling clock on downlink 3
10:34:29:elinks:INFO: Disabling clock on downlink 4
10:34:29:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:34:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:34:30:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:34:30:elinks:INFO: Disabling clock on downlink 0
10:34:30:elinks:INFO: Disabling clock on downlink 1
10:34:30:elinks:INFO: Disabling clock on downlink 2
10:34:30:elinks:INFO: Disabling clock on downlink 3
10:34:30:elinks:INFO: Disabling clock on downlink 4
10:34:30:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:34:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:34:30:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
10:34:30:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
10:34:30:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
10:34:30:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
10:34:30:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
10:34:30:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
10:34:30:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
10:34:30:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
10:34:30:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:34:30:elinks:INFO: Disabling clock on downlink 0
10:34:30:elinks:INFO: Disabling clock on downlink 1
10:34:30:elinks:INFO: Disabling clock on downlink 2
10:34:30:elinks:INFO: Disabling clock on downlink 3
10:34:30:elinks:INFO: Disabling clock on downlink 4
10:34:30:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:34:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:34:30:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:34:30:elinks:INFO: Disabling clock on downlink 0
10:34:30:elinks:INFO: Disabling clock on downlink 1
10:34:30:elinks:INFO: Disabling clock on downlink 2
10:34:30:elinks:INFO: Disabling clock on downlink 3
10:34:30:elinks:INFO: Disabling clock on downlink 4
10:34:30:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:34:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:34:30:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:34:30:elinks:INFO: Disabling clock on downlink 0
10:34:30:elinks:INFO: Disabling clock on downlink 1
10:34:30:elinks:INFO: Disabling clock on downlink 2
10:34:30:elinks:INFO: Disabling clock on downlink 3
10:34:30:elinks:INFO: Disabling clock on downlink 4
10:34:30:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:34:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:34:30:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:34:30:setup_element:INFO: Scanning clock phase
10:34:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:34:30:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:34:30:setup_element:INFO: Clock phase scan results for group 0, downlink 1
10:34:30:setup_element:INFO: Eye window for uplink 8 : ________________________________________________________________________________
Clock Delay: 40
10:34:30:setup_element:INFO: Eye window for uplink 9 : ________________________________________________________________________________
Clock Delay: 40
10:34:30:setup_element:INFO: Eye window for uplink 10: _________________________________________________________________________XXXXX__
Clock Delay: 35
10:34:30:setup_element:INFO: Eye window for uplink 11: _________________________________________________________________________XXXXX__
Clock Delay: 35
10:34:30:setup_element:INFO: Eye window for uplink 12: ________________________________________________________________________XXXXX___
Clock Delay: 34
10:34:30:setup_element:INFO: Eye window for uplink 13: ________________________________________________________________________XXXXX___
Clock Delay: 34
10:34:30:setup_element:INFO: Eye window for uplink 14: _________________________________________________________________________XXXXX__
Clock Delay: 35
10:34:30:setup_element:INFO: Eye window for uplink 15: _________________________________________________________________________XXXXX__
Clock Delay: 35
10:34:30:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 1
10:34:30:setup_element:INFO: Scanning data phases
10:34:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:34:31:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:34:36:setup_element:INFO: Data phase scan results for group 0, downlink 1
10:34:36:setup_element:INFO: Eye window for uplink 8 : _________________________XXXXX__________
Data delay found: 7
10:34:36:setup_element:INFO: Eye window for uplink 9 : ______________________________XXXX______
Data delay found: 11
10:34:36:setup_element:INFO: Eye window for uplink 10: _____________________________XXXXX______
Data delay found: 11
10:34:36:setup_element:INFO: Eye window for uplink 11: _________________________________XXXXX__
Data delay found: 15
10:34:36:setup_element:INFO: Eye window for uplink 12: ____________________________XXXXX_______
Data delay found: 10
10:34:36:setup_element:INFO: Eye window for uplink 13: _______________________________XXXX_____
Data delay found: 12
10:34:36:setup_element:INFO: Eye window for uplink 14: ________________________________XXX_____
Data delay found: 13
10:34:36:setup_element:INFO: Eye window for uplink 15: ________________________________XXXXX___
Data delay found: 14
10:34:36:setup_element:INFO: Setting the data phase to 7 for uplink 8
10:34:36:setup_element:INFO: Setting the data phase to 11 for uplink 9
10:34:36:setup_element:INFO: Setting the data phase to 11 for uplink 10
10:34:36:setup_element:INFO: Setting the data phase to 15 for uplink 11
10:34:36:setup_element:INFO: Setting the data phase to 10 for uplink 12
10:34:36:setup_element:INFO: Setting the data phase to 12 for uplink 13
10:34:36:setup_element:INFO: Setting the data phase to 13 for uplink 14
10:34:36:setup_element:INFO: Setting the data phase to 14 for uplink 15
10:34:36:setup_element:INFO: Beginning SMX ASICs map scan
10:34:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:34:36:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:34:36:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
10:34:36:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
10:34:36:uplink:INFO: Setting uplinks mask [8, 9, 10, 11, 12, 13, 14, 15]
10:34:36:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
10:34:36:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
10:34:36:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
10:34:36:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
10:34:37:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
10:34:37:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
10:34:37:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
10:34:37:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
10:34:38:setup_element:INFO: Performing Elink synchronization
10:34:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:34:38:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:34:38:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
10:34:38:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
10:34:38:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
10:34:38:uplink:INFO: Enabling uplinks [8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
10:34:39:febtest:INFO: Init all SMX (CSA): 30
10:34:48:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:34:48:febtest:INFO: 08-01 | XA-000-09-004-002-011-021-08 | 40.9 | 1147.8
10:34:48:febtest:INFO: 10-03 | XA-000-09-004-002-011-020-08 | 44.1 | 1135.9
10:34:48:febtest:INFO: 12-05 | XA-000-09-004-002-011-018-08 | 40.9 | 1153.7
10:34:49:febtest:INFO: 14-07 | XA-000-09-004-002-005-021-01 | 28.2 | 1195.1
10:34:50:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
10:34:52:ST3_smx:INFO: chip: 8-1 40.898880 C 1159.654860 mV
10:34:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:34:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:34:52:ST3_smx:INFO: Electrons
10:34:52:ST3_smx:INFO: # loops 0
10:34:54:ST3_smx:INFO: # loops 1
10:34:56:ST3_smx:INFO: # loops 2
10:34:58:ST3_smx:INFO: Total # of broken channels: 0
10:34:58:ST3_smx:INFO: List of broken channels: []
10:34:58:ST3_smx:INFO: Total # of broken channels: 0
10:34:58:ST3_smx:INFO: List of broken channels: []
10:34:59:ST3_smx:INFO: chip: 10-3 44.073563 C 1147.806000 mV
10:34:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:34:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:34:59:ST3_smx:INFO: Electrons
10:34:59:ST3_smx:INFO: # loops 0
10:35:01:ST3_smx:INFO: # loops 1
10:35:03:ST3_smx:INFO: # loops 2
10:35:05:ST3_smx:INFO: Total # of broken channels: 0
10:35:05:ST3_smx:INFO: List of broken channels: []
10:35:05:ST3_smx:INFO: Total # of broken channels: 0
10:35:05:ST3_smx:INFO: List of broken channels: []
10:35:07:ST3_smx:INFO: chip: 12-5 40.898880 C 1165.571835 mV
10:35:07:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:35:07:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:35:07:ST3_smx:INFO: Electrons
10:35:07:ST3_smx:INFO: # loops 0
10:35:09:ST3_smx:INFO: # loops 1
10:35:10:ST3_smx:INFO: # loops 2
10:35:12:ST3_smx:INFO: Total # of broken channels: 0
10:35:12:ST3_smx:INFO: List of broken channels: []
10:35:12:ST3_smx:INFO: Total # of broken channels: 0
10:35:12:ST3_smx:INFO: List of broken channels: []
10:35:14:ST3_smx:INFO: chip: 14-7 31.389742 C 1206.851500 mV
10:35:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:35:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:35:14:ST3_smx:INFO: Electrons
10:35:14:ST3_smx:INFO: # loops 0
10:35:16:ST3_smx:INFO: # loops 1
10:35:18:ST3_smx:INFO: # loops 2
10:35:20:ST3_smx:INFO: Total # of broken channels: 0
10:35:20:ST3_smx:INFO: List of broken channels: []
10:35:20:ST3_smx:INFO: Total # of broken channels: 0
10:35:20:ST3_smx:INFO: List of broken channels: []
10:35:20:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:35:20:febtest:INFO: 08-01 | XA-000-09-004-002-011-021-08 | 40.9 | 1189.2
10:35:21:febtest:INFO: 10-03 | XA-000-09-004-002-011-020-08 | 44.1 | 1171.5
10:35:21:febtest:INFO: 12-05 | XA-000-09-004-002-011-018-08 | 40.9 | 1183.3
10:35:21:febtest:INFO: 14-07 | XA-000-09-004-002-005-021-01 | 31.4 | 1242.0
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_01_16-10_34_28
OPERATOR : Henrik;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3084| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '0.8235', '1.853', '1.3350', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.0140', '1.850', '1.1480', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.0070', '1.850', '0.2707', '0.000', '0.0000', '0.000', '0.0000']