
FEB_3086 25.04.25 10:42:21
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10:42:21:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 10:42:21:ST3_Shared:INFO: FEB-Microcable 10:42:21:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 10:42:21:febtest:INFO: Testing FEB with SN 3086 10:42:23:smx_tester:INFO: Scanning setup 10:42:23:elinks:INFO: Disabling clock on downlink 0 10:42:23:elinks:INFO: Disabling clock on downlink 1 10:42:23:elinks:INFO: Disabling clock on downlink 2 10:42:23:elinks:INFO: Disabling clock on downlink 3 10:42:23:elinks:INFO: Disabling clock on downlink 4 10:42:23:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:42:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 10:42:23:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:42:23:elinks:INFO: Disabling clock on downlink 0 10:42:23:elinks:INFO: Disabling clock on downlink 1 10:42:23:elinks:INFO: Disabling clock on downlink 2 10:42:23:elinks:INFO: Disabling clock on downlink 3 10:42:23:elinks:INFO: Disabling clock on downlink 4 10:42:23:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:42:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 10:42:23:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8 10:42:23:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9 10:42:23:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10 10:42:23:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11 10:42:23:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12 10:42:23:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13 10:42:23:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14 10:42:23:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15 10:42:23:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:42:23:elinks:INFO: Disabling clock on downlink 0 10:42:23:elinks:INFO: Disabling clock on downlink 1 10:42:23:elinks:INFO: Disabling clock on downlink 2 10:42:23:elinks:INFO: Disabling clock on downlink 3 10:42:23:elinks:INFO: Disabling clock on downlink 4 10:42:23:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:42:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 10:42:23:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:42:23:elinks:INFO: Disabling clock on downlink 0 10:42:23:elinks:INFO: Disabling clock on downlink 1 10:42:23:elinks:INFO: Disabling clock on downlink 2 10:42:23:elinks:INFO: Disabling clock on downlink 3 10:42:23:elinks:INFO: Disabling clock on downlink 4 10:42:23:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:42:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 10:42:23:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:42:23:elinks:INFO: Disabling clock on downlink 0 10:42:23:elinks:INFO: Disabling clock on downlink 1 10:42:23:elinks:INFO: Disabling clock on downlink 2 10:42:23:elinks:INFO: Disabling clock on downlink 3 10:42:23:elinks:INFO: Disabling clock on downlink 4 10:42:23:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:42:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 10:42:23:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:42:23:setup_element:INFO: Scanning clock phase 10:42:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 10:42:23:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 10:42:24:setup_element:INFO: Clock phase scan results for group 0, downlink 1 10:42:24:setup_element:INFO: Eye window for uplink 8 : ________________________________________________________________________XXXXXX__ Clock Delay: 34 10:42:24:setup_element:INFO: Eye window for uplink 9 : ________________________________________________________________________XXXXXX__ Clock Delay: 34 10:42:24:setup_element:INFO: Eye window for uplink 10: ________________________________________________________________________XXXXXX__ Clock Delay: 34 10:42:24:setup_element:INFO: Eye window for uplink 11: ________________________________________________________________________XXXXXX__ Clock Delay: 34 10:42:24:setup_element:INFO: Eye window for uplink 12: ________________________________________________________________________________ Clock Delay: 40 10:42:24:setup_element:INFO: Eye window for uplink 13: ________________________________________________________________________________ Clock Delay: 40 10:42:24:setup_element:INFO: Eye window for uplink 14: _________________________________________________________________________XXXXXX_ Clock Delay: 35 10:42:24:setup_element:INFO: Eye window for uplink 15: _________________________________________________________________________XXXXXX_ Clock Delay: 35 10:42:24:setup_element:INFO: Setting the clock phase to 35 for group 0, downlink 1 10:42:24:setup_element:INFO: Scanning data phases 10:42:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 10:42:24:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 10:42:29:setup_element:INFO: Data phase scan results for group 0, downlink 1 10:42:29:setup_element:INFO: Eye window for uplink 8 : _________________________XXXXXX_________ Data delay found: 7 10:42:29:setup_element:INFO: Eye window for uplink 9 : ______________________________XXXXX_____ Data delay found: 12 10:42:29:setup_element:INFO: Eye window for uplink 10: __________________________XXXXXXX_______ Data delay found: 9 10:42:29:setup_element:INFO: Eye window for uplink 11: ______________________________XXXXXX____ Data delay found: 12 10:42:29:setup_element:INFO: Eye window for uplink 12: _____________________________XXXXXX_____ Data delay found: 11 10:42:29:setup_element:INFO: Eye window for uplink 13: _________________________________XXXXX__ Data delay found: 15 10:42:29:setup_element:INFO: Eye window for uplink 14: ___________________________X_XXXXX______ Data delay found: 10 10:42:29:setup_element:INFO: Eye window for uplink 15: _____________________________XXXXXXX____ Data delay found: 12 10:42:29:setup_element:INFO: Setting the data phase to 7 for uplink 8 10:42:29:setup_element:INFO: Setting the data phase to 12 for uplink 9 10:42:29:setup_element:INFO: Setting the data phase to 9 for uplink 10 10:42:29:setup_element:INFO: Setting the data phase to 12 for uplink 11 10:42:29:setup_element:INFO: Setting the data phase to 11 for uplink 12 10:42:29:setup_element:INFO: Setting the data phase to 15 for uplink 13 10:42:29:setup_element:INFO: Setting the data phase to 10 for uplink 14 10:42:29:setup_element:INFO: Setting the data phase to 12 for uplink 15 10:42:29:setup_element:INFO: Beginning SMX ASICs map scan 10:42:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 10:42:29:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 10:42:29:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 10:42:29:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 10:42:29:uplink:INFO: Setting uplinks mask [8, 9, 10, 11, 12, 13, 14, 15] 10:42:29:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8 10:42:29:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9 10:42:29:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10 10:42:29:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11 10:42:30:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12 10:42:30:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13 10:42:30:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14 10:42:30:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15 10:42:31:setup_element:INFO: Performing Elink synchronization 10:42:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 10:42:31:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 10:42:31:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 10:42:31:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 10:42:31:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1 10:42:31:uplink:INFO: Enabling uplinks [8, 9, 10, 11, 12, 13, 14, 15] |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)] 3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)] 5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)] 7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)] |_________________________________________________________________________| 10:42:32:febtest:INFO: Init all SMX (CSA): 30 10:42:40:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 10:42:40:febtest:INFO: 08-01 | XA-000-09-004-020-011-025-05 | 40.9 | 1141.9 10:42:40:febtest:INFO: 10-03 | XA-000-09-004-020-011-023-05 | 40.9 | 1141.9 10:42:41:febtest:INFO: 12-05 | XA-000-09-004-020-008-026-11 | 47.3 | 1124.0 10:42:41:febtest:INFO: 14-07 | XA-000-09-004-020-014-024-14 | 25.1 | 1201.0 10:42:42:febtest:INFO: Set all CSA to ZERO FEB type: A FEB_A: 1 FEB_B: 0 10:42:44:ST3_smx:INFO: chip: 8-1 40.898880 C 1153.732915 mV 10:42:44:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:42:44:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:42:44:ST3_smx:INFO: Electrons 10:42:44:ST3_smx:INFO: # loops 0 10:42:45:ST3_smx:INFO: # loops 1 10:42:47:ST3_smx:INFO: # loops 2 10:42:48:ST3_smx:INFO: Total # of broken channels: 0 10:42:48:ST3_smx:INFO: List of broken channels: [] 10:42:48:ST3_smx:INFO: Total # of broken channels: 0 10:42:48:ST3_smx:INFO: List of broken channels: [] 10:42:50:ST3_smx:INFO: chip: 10-3 40.898880 C 1153.732915 mV 10:42:50:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:42:50:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:42:50:ST3_smx:INFO: Electrons 10:42:50:ST3_smx:INFO: # loops 0 10:42:52:ST3_smx:INFO: # loops 1 10:42:53:ST3_smx:INFO: # loops 2 10:42:55:ST3_smx:INFO: Total # of broken channels: 0 10:42:55:ST3_smx:INFO: List of broken channels: [] 10:42:55:ST3_smx:INFO: Total # of broken channels: 0 10:42:55:ST3_smx:INFO: List of broken channels: [] 10:42:57:ST3_smx:INFO: chip: 12-5 47.250730 C 1135.937260 mV 10:42:57:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:42:57:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:42:57:ST3_smx:INFO: Electrons 10:42:57:ST3_smx:INFO: # loops 0 10:42:58:ST3_smx:INFO: # loops 1 10:43:00:ST3_smx:INFO: # loops 2 10:43:02:ST3_smx:INFO: Total # of broken channels: 0 10:43:02:ST3_smx:INFO: List of broken channels: [] 10:43:02:ST3_smx:INFO: Total # of broken channels: 0 10:43:02:ST3_smx:INFO: List of broken channels: [] 10:43:03:ST3_smx:INFO: chip: 14-7 25.062742 C 1212.728715 mV 10:43:03:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:43:03:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:43:03:ST3_smx:INFO: Electrons 10:43:03:ST3_smx:INFO: # loops 0 10:43:05:ST3_smx:INFO: # loops 1 10:43:07:ST3_smx:INFO: # loops 2 10:43:09:ST3_smx:INFO: Total # of broken channels: 0 10:43:09:ST3_smx:INFO: List of broken channels: [] 10:43:09:ST3_smx:INFO: Total # of broken channels: 0 10:43:09:ST3_smx:INFO: List of broken channels: [] 10:43:09:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 10:43:09:febtest:INFO: 08-01 | XA-000-09-004-020-011-025-05 | 40.9 | 1177.4 10:43:10:febtest:INFO: 10-03 | XA-000-09-004-020-011-023-05 | 40.9 | 1171.5 10:43:10:febtest:INFO: 12-05 | XA-000-09-004-020-008-026-11 | 47.3 | 1159.7 10:43:10:febtest:INFO: 14-07 | XA-000-09-004-020-014-024-14 | 25.1 | 1230.3 ############################################################ # S U M M A R Y # ############################################################ {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 25_04_25-10_42_21 OPERATOR : Henrik; SITE : KIT | SETUP : KIT_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 3086| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['2.450', '0.6973', '1.852', '1.2790', '0.000', '0.0000', '0.000', '0.0000'] VI_after__Init : ['2.450', '0.9717', '1.850', '1.1390', '0.000', '0.0000', '0.000', '0.0000'] VI_at__the_End : ['2.450', '0.9904', '1.850', '0.2714', '0.000', '0.0000', '0.000', '0.0000']