FEB_3087 06.11.24 14:07:40
Info
14:07:40:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:07:40:ST3_Shared:INFO: FEB-Microcable
14:07:40:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:07:40:febtest:INFO: Testing FEB with SN 3087
14:07:41:smx_tester:INFO: Scanning setup
14:07:41:elinks:INFO: Disabling clock on downlink 0
14:07:41:elinks:INFO: Disabling clock on downlink 1
14:07:41:elinks:INFO: Disabling clock on downlink 2
14:07:41:elinks:INFO: Disabling clock on downlink 3
14:07:41:elinks:INFO: Disabling clock on downlink 4
14:07:41:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:07:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
14:07:42:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:07:42:elinks:INFO: Disabling clock on downlink 0
14:07:42:elinks:INFO: Disabling clock on downlink 1
14:07:42:elinks:INFO: Disabling clock on downlink 2
14:07:42:elinks:INFO: Disabling clock on downlink 3
14:07:42:elinks:INFO: Disabling clock on downlink 4
14:07:42:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:07:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:07:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
14:07:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
14:07:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
14:07:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
14:07:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
14:07:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
14:07:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
14:07:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
14:07:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
14:07:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
14:07:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
14:07:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
14:07:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
14:07:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
14:07:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
14:07:42:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
14:07:42:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:07:42:elinks:INFO: Disabling clock on downlink 0
14:07:42:elinks:INFO: Disabling clock on downlink 1
14:07:42:elinks:INFO: Disabling clock on downlink 2
14:07:42:elinks:INFO: Disabling clock on downlink 3
14:07:42:elinks:INFO: Disabling clock on downlink 4
14:07:42:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:07:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:07:42:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:07:42:elinks:INFO: Disabling clock on downlink 0
14:07:42:elinks:INFO: Disabling clock on downlink 1
14:07:42:elinks:INFO: Disabling clock on downlink 2
14:07:42:elinks:INFO: Disabling clock on downlink 3
14:07:42:elinks:INFO: Disabling clock on downlink 4
14:07:42:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:07:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
14:07:42:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:07:42:elinks:INFO: Disabling clock on downlink 0
14:07:42:elinks:INFO: Disabling clock on downlink 1
14:07:42:elinks:INFO: Disabling clock on downlink 2
14:07:42:elinks:INFO: Disabling clock on downlink 3
14:07:42:elinks:INFO: Disabling clock on downlink 4
14:07:42:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:07:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
14:07:42:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:07:42:setup_element:INFO: Scanning clock phase
14:07:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:07:42:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:07:42:setup_element:INFO: Clock phase scan results for group 0, downlink 1
14:07:42:setup_element:INFO: Eye window for uplink 0 : ________________________________________________________________________XXXXX___
Clock Delay: 34
14:07:42:setup_element:INFO: Eye window for uplink 1 : ________________________________________________________________________XXXXX___
Clock Delay: 34
14:07:42:setup_element:INFO: Eye window for uplink 2 : ______________________________________________________________________XXXXXX____
Clock Delay: 32
14:07:42:setup_element:INFO: Eye window for uplink 3 : ______________________________________________________________________XXXXXX____
Clock Delay: 32
14:07:42:setup_element:INFO: Eye window for uplink 4 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
14:07:42:setup_element:INFO: Eye window for uplink 5 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
14:07:42:setup_element:INFO: Eye window for uplink 6 : ______________________________________________________________________XXXXXX____
Clock Delay: 32
14:07:42:setup_element:INFO: Eye window for uplink 7 : ______________________________________________________________________XXXXXX____
Clock Delay: 32
14:07:42:setup_element:INFO: Eye window for uplink 8 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
14:07:42:setup_element:INFO: Eye window for uplink 9 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
14:07:42:setup_element:INFO: Eye window for uplink 10: ______________________________________________________________________XXXXXX____
Clock Delay: 32
14:07:42:setup_element:INFO: Eye window for uplink 11: ______________________________________________________________________XXXXXX____
Clock Delay: 32
14:07:42:setup_element:INFO: Eye window for uplink 12: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
14:07:42:setup_element:INFO: Eye window for uplink 13: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
14:07:42:setup_element:INFO: Eye window for uplink 14: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
14:07:42:setup_element:INFO: Eye window for uplink 15: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
14:07:42:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 1
14:07:42:setup_element:INFO: Scanning data phases
14:07:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:07:43:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:07:48:setup_element:INFO: Data phase scan results for group 0, downlink 1
14:07:48:setup_element:INFO: Eye window for uplink 0 : ______XXXXXXXX__________________________
Data delay found: 29
14:07:48:setup_element:INFO: Eye window for uplink 1 : ___XXXXXX_______________________________
Data delay found: 25
14:07:48:setup_element:INFO: Eye window for uplink 2 : _____XXXXXXXX___________________________
Data delay found: 28
14:07:48:setup_element:INFO: Eye window for uplink 3 : _XXXXXXXX______________________________X
Data delay found: 23
14:07:48:setup_element:INFO: Eye window for uplink 4 : _XXXXXXX________________________________
Data delay found: 24
14:07:48:setup_element:INFO: Eye window for uplink 5 : XXXX_________________________________XXX
Data delay found: 20
14:07:48:setup_element:INFO: Eye window for uplink 6 : _______________________________XXXXXXXX_
Data delay found: 14
14:07:48:setup_element:INFO: Eye window for uplink 7 : ___________________________XXXXXXXX_____
Data delay found: 10
14:07:48:setup_element:INFO: Eye window for uplink 8 : _______________________XXXXXX___________
Data delay found: 5
14:07:48:setup_element:INFO: Eye window for uplink 9 : ___________________________XXXXXX_______
Data delay found: 9
14:07:48:setup_element:INFO: Eye window for uplink 10: _______________________XXXXXXX__________
Data delay found: 6
14:07:48:setup_element:INFO: Eye window for uplink 11: ___________________________XXXXXX_______
Data delay found: 9
14:07:48:setup_element:INFO: Eye window for uplink 12: _______________________XXXXXXXX_________
Data delay found: 6
14:07:48:setup_element:INFO: Eye window for uplink 13: ___________________________XXXXXXX______
Data delay found: 10
14:07:48:setup_element:INFO: Eye window for uplink 14: ________________________XXXXXXX_________
Data delay found: 7
14:07:48:setup_element:INFO: Eye window for uplink 15: __________________________XXXXXXXXX_____
Data delay found: 10
14:07:48:setup_element:INFO: Setting the data phase to 29 for uplink 0
14:07:48:setup_element:INFO: Setting the data phase to 25 for uplink 1
14:07:48:setup_element:INFO: Setting the data phase to 28 for uplink 2
14:07:48:setup_element:INFO: Setting the data phase to 23 for uplink 3
14:07:48:setup_element:INFO: Setting the data phase to 24 for uplink 4
14:07:48:setup_element:INFO: Setting the data phase to 20 for uplink 5
14:07:48:setup_element:INFO: Setting the data phase to 14 for uplink 6
14:07:48:setup_element:INFO: Setting the data phase to 10 for uplink 7
14:07:48:setup_element:INFO: Setting the data phase to 5 for uplink 8
14:07:48:setup_element:INFO: Setting the data phase to 9 for uplink 9
14:07:48:setup_element:INFO: Setting the data phase to 6 for uplink 10
14:07:48:setup_element:INFO: Setting the data phase to 9 for uplink 11
14:07:48:setup_element:INFO: Setting the data phase to 6 for uplink 12
14:07:48:setup_element:INFO: Setting the data phase to 10 for uplink 13
14:07:48:setup_element:INFO: Setting the data phase to 7 for uplink 14
14:07:48:setup_element:INFO: Setting the data phase to 10 for uplink 15
14:07:48:setup_element:INFO: Beginning SMX ASICs map scan
14:07:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:07:48:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:07:48:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
14:07:48:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
14:07:48:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
14:07:48:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
14:07:48:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
14:07:48:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
14:07:48:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
14:07:48:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
14:07:48:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
14:07:48:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
14:07:48:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
14:07:48:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
14:07:48:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
14:07:49:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
14:07:49:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
14:07:49:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
14:07:49:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
14:07:49:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
14:07:49:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
14:07:50:setup_element:INFO: Performing Elink synchronization
14:07:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:07:50:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:07:50:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
14:07:50:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
14:07:50:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
14:07:50:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
14:07:51:febtest:INFO: Init all SMX (CSA): 30
14:08:05:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:08:05:febtest:INFO: 01-00 | XA-000-09-004-004-005-009-04 | 37.7 | 1159.7
14:08:06:febtest:INFO: 08-01 | XA-000-09-004-004-005-005-04 | 47.3 | 1130.0
14:08:06:febtest:INFO: 03-02 | XA-000-09-004-004-005-008-04 | 31.4 | 1183.3
14:08:06:febtest:INFO: 10-03 | XA-000-09-004-004-005-004-04 | 37.7 | 1147.8
14:08:06:febtest:INFO: 05-04 | XA-000-09-004-004-005-007-04 | 28.2 | 1189.2
14:08:07:febtest:INFO: 12-05 | XA-000-09-004-004-006-004-10 | 25.1 | 1201.0
14:08:07:febtest:INFO: 07-06 | XA-000-09-004-004-005-006-04 | 37.7 | 1153.7
14:08:07:febtest:INFO: 14-07 | XA-000-09-004-004-006-005-10 | 37.7 | 1153.7
14:08:08:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
14:08:10:ST3_smx:INFO: chip: 1-0 37.726682 C 1165.571835 mV
14:08:10:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:08:10:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:08:10:ST3_smx:INFO: Electrons
14:08:10:ST3_smx:INFO: # loops 0
14:08:11:ST3_smx:INFO: # loops 1
14:08:13:ST3_smx:INFO: # loops 2
14:08:15:ST3_smx:INFO: Total # of broken channels: 0
14:08:15:ST3_smx:INFO: List of broken channels: []
14:08:15:ST3_smx:INFO: Total # of broken channels: 17
14:08:15:ST3_smx:INFO: List of broken channels: [1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 29, 33, 35, 37]
14:08:16:ST3_smx:INFO: chip: 8-1 47.250730 C 1141.874115 mV
14:08:16:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:08:16:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:08:16:ST3_smx:INFO: Electrons
14:08:16:ST3_smx:INFO: # loops 0
14:08:18:ST3_smx:INFO: # loops 1
14:08:20:ST3_smx:INFO: # loops 2
14:08:21:ST3_smx:INFO: Total # of broken channels: 0
14:08:21:ST3_smx:INFO: List of broken channels: []
14:08:21:ST3_smx:INFO: Total # of broken channels: 0
14:08:21:ST3_smx:INFO: List of broken channels: []
14:08:23:ST3_smx:INFO: chip: 3-2 31.389742 C 1195.082160 mV
14:08:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:08:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:08:23:ST3_smx:INFO: Electrons
14:08:23:ST3_smx:INFO: # loops 0
14:08:25:ST3_smx:INFO: # loops 1
14:08:26:ST3_smx:INFO: # loops 2
14:08:28:ST3_smx:INFO: Total # of broken channels: 0
14:08:28:ST3_smx:INFO: List of broken channels: []
14:08:28:ST3_smx:INFO: Total # of broken channels: 1
14:08:28:ST3_smx:INFO: List of broken channels: [0]
14:08:30:ST3_smx:INFO: chip: 10-3 37.726682 C 1159.654860 mV
14:08:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:08:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:08:30:ST3_smx:INFO: Electrons
14:08:30:ST3_smx:INFO: # loops 0
14:08:32:ST3_smx:INFO: # loops 1
14:08:33:ST3_smx:INFO: # loops 2
14:08:35:ST3_smx:INFO: Total # of broken channels: 0
14:08:35:ST3_smx:INFO: List of broken channels: []
14:08:35:ST3_smx:INFO: Total # of broken channels: 0
14:08:35:ST3_smx:INFO: List of broken channels: []
14:08:37:ST3_smx:INFO: chip: 5-4 28.225000 C 1200.969315 mV
14:08:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:08:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:08:37:ST3_smx:INFO: Electrons
14:08:37:ST3_smx:INFO: # loops 0
14:08:38:ST3_smx:INFO: # loops 1
14:08:40:ST3_smx:INFO: # loops 2
14:08:42:ST3_smx:INFO: Total # of broken channels: 0
14:08:42:ST3_smx:INFO: List of broken channels: []
14:08:42:ST3_smx:INFO: Total # of broken channels: 0
14:08:42:ST3_smx:INFO: List of broken channels: []
14:08:44:ST3_smx:INFO: chip: 12-5 28.225000 C 1212.728715 mV
14:08:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:08:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:08:44:ST3_smx:INFO: Electrons
14:08:44:ST3_smx:INFO: # loops 0
14:08:45:ST3_smx:INFO: # loops 1
14:08:47:ST3_smx:INFO: # loops 2
14:08:48:ST3_smx:INFO: Total # of broken channels: 0
14:08:48:ST3_smx:INFO: List of broken channels: []
14:08:48:ST3_smx:INFO: Total # of broken channels: 0
14:08:48:ST3_smx:INFO: List of broken channels: []
14:08:50:ST3_smx:INFO: chip: 7-6 40.898880 C 1165.571835 mV
14:08:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:08:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:08:50:ST3_smx:INFO: Electrons
14:08:50:ST3_smx:INFO: # loops 0
14:08:51:ST3_smx:INFO: # loops 1
14:08:53:ST3_smx:INFO: # loops 2
14:08:54:ST3_smx:INFO: Total # of broken channels: 0
14:08:54:ST3_smx:INFO: List of broken channels: []
14:08:54:ST3_smx:INFO: Total # of broken channels: 0
14:08:54:ST3_smx:INFO: List of broken channels: []
14:08:56:ST3_smx:INFO: chip: 14-7 40.898880 C 1165.571835 mV
14:08:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:08:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:08:56:ST3_smx:INFO: Electrons
14:08:56:ST3_smx:INFO: # loops 0
14:08:58:ST3_smx:INFO: # loops 1
14:08:59:ST3_smx:INFO: # loops 2
14:09:01:ST3_smx:INFO: Total # of broken channels: 0
14:09:01:ST3_smx:INFO: List of broken channels: []
14:09:01:ST3_smx:INFO: Total # of broken channels: 0
14:09:01:ST3_smx:INFO: List of broken channels: []
14:09:01:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:09:01:febtest:INFO: 01-00 | XA-000-09-004-004-005-009-04 | 40.9 | 1189.2
14:09:01:febtest:INFO: 08-01 | XA-000-09-004-004-005-005-04 | 47.3 | 1165.6
14:09:02:febtest:INFO: 03-02 | XA-000-09-004-004-005-008-04 | 34.6 | 1212.7
14:09:02:febtest:INFO: 10-03 | XA-000-09-004-004-005-004-04 | 40.9 | 1183.3
14:09:02:febtest:INFO: 05-04 | XA-000-09-004-004-005-007-04 | 31.4 | 1230.3
14:09:02:febtest:INFO: 12-05 | XA-000-09-004-004-006-004-10 | 28.2 | 1236.2
14:09:02:febtest:INFO: 07-06 | XA-000-09-004-004-005-006-04 | 40.9 | 1183.3
14:09:03:febtest:INFO: 14-07 | XA-000-09-004-004-006-005-10 | 40.9 | 1183.3
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_11_06-14_07_40
OPERATOR : Benjamin;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3087| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.8500', '1.850', '2.3180', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9920', '1.850', '2.4130', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9840', '1.850', '0.5248', '0.000', '0.0000', '0.000', '0.0000']