FEB_3090 07.11.24 10:31:52
Info
10:31:52:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:31:52:ST3_Shared:INFO: FEB-Microcable
10:31:52:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:31:52:febtest:INFO: Testing FEB with SN 3090
10:31:54:smx_tester:INFO: Scanning setup
10:31:54:elinks:INFO: Disabling clock on downlink 0
10:31:54:elinks:INFO: Disabling clock on downlink 1
10:31:54:elinks:INFO: Disabling clock on downlink 2
10:31:54:elinks:INFO: Disabling clock on downlink 3
10:31:54:elinks:INFO: Disabling clock on downlink 4
10:31:54:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:31:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:31:54:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:31:54:elinks:INFO: Disabling clock on downlink 0
10:31:54:elinks:INFO: Disabling clock on downlink 1
10:31:54:elinks:INFO: Disabling clock on downlink 2
10:31:54:elinks:INFO: Disabling clock on downlink 3
10:31:54:elinks:INFO: Disabling clock on downlink 4
10:31:54:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:31:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:31:54:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
10:31:54:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
10:31:54:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
10:31:54:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
10:31:54:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
10:31:54:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
10:31:54:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
10:31:54:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
10:31:54:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:31:54:elinks:INFO: Disabling clock on downlink 0
10:31:54:elinks:INFO: Disabling clock on downlink 1
10:31:54:elinks:INFO: Disabling clock on downlink 2
10:31:54:elinks:INFO: Disabling clock on downlink 3
10:31:54:elinks:INFO: Disabling clock on downlink 4
10:31:54:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:31:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:31:54:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:31:54:elinks:INFO: Disabling clock on downlink 0
10:31:54:elinks:INFO: Disabling clock on downlink 1
10:31:54:elinks:INFO: Disabling clock on downlink 2
10:31:54:elinks:INFO: Disabling clock on downlink 3
10:31:54:elinks:INFO: Disabling clock on downlink 4
10:31:54:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:31:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:31:55:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:31:55:elinks:INFO: Disabling clock on downlink 0
10:31:55:elinks:INFO: Disabling clock on downlink 1
10:31:55:elinks:INFO: Disabling clock on downlink 2
10:31:55:elinks:INFO: Disabling clock on downlink 3
10:31:55:elinks:INFO: Disabling clock on downlink 4
10:31:55:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:31:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:31:55:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:31:55:setup_element:INFO: Scanning clock phase
10:31:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:31:55:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:31:55:setup_element:INFO: Clock phase scan results for group 0, downlink 1
10:31:55:setup_element:INFO: Eye window for uplink 8 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
10:31:55:setup_element:INFO: Eye window for uplink 9 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
10:31:55:setup_element:INFO: Eye window for uplink 10: ______________________________________________________________________XXXXXX____
Clock Delay: 32
10:31:55:setup_element:INFO: Eye window for uplink 11: ______________________________________________________________________XXXXXX____
Clock Delay: 32
10:31:55:setup_element:INFO: Eye window for uplink 12: ______________________________________________________________________XXXXX_____
Clock Delay: 32
10:31:55:setup_element:INFO: Eye window for uplink 13: ______________________________________________________________________XXXXX_____
Clock Delay: 32
10:31:55:setup_element:INFO: Eye window for uplink 14: _____________________________________________________________________XXXXX______
Clock Delay: 31
10:31:55:setup_element:INFO: Eye window for uplink 15: _____________________________________________________________________XXXXX______
Clock Delay: 31
10:31:55:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 1
10:31:55:setup_element:INFO: Scanning data phases
10:31:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:31:55:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:32:00:setup_element:INFO: Data phase scan results for group 0, downlink 1
10:32:00:setup_element:INFO: Eye window for uplink 8 : ______________________XXXXXXXXXXXXXXXXXX
Data delay found: 10
10:32:00:setup_element:INFO: Eye window for uplink 9 : ___________________________XXXXXXXXXXXXX
Data delay found: 13
10:32:00:setup_element:INFO: Eye window for uplink 10: ________________________XXXXXXXX________
Data delay found: 7
10:32:00:setup_element:INFO: Eye window for uplink 11: ____________________________XXXXXXXX____
Data delay found: 11
10:32:00:setup_element:INFO: Eye window for uplink 12: _______________________XXXXXXXX_________
Data delay found: 6
10:32:00:setup_element:INFO: Eye window for uplink 13: ___________________________XXXXXXX______
Data delay found: 10
10:32:00:setup_element:INFO: Eye window for uplink 14: _________________________XXXXXX_________
Data delay found: 7
10:32:00:setup_element:INFO: Eye window for uplink 15: ___________________________XXXXXX_______
Data delay found: 9
10:32:00:setup_element:INFO: Setting the data phase to 10 for uplink 8
10:32:00:setup_element:INFO: Setting the data phase to 13 for uplink 9
10:32:00:setup_element:INFO: Setting the data phase to 7 for uplink 10
10:32:00:setup_element:INFO: Setting the data phase to 11 for uplink 11
10:32:00:setup_element:INFO: Setting the data phase to 6 for uplink 12
10:32:00:setup_element:INFO: Setting the data phase to 10 for uplink 13
10:32:00:setup_element:INFO: Setting the data phase to 7 for uplink 14
10:32:00:setup_element:INFO: Setting the data phase to 9 for uplink 15
10:32:00:setup_element:INFO: Beginning SMX ASICs map scan
10:32:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:32:00:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:32:00:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
10:32:00:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
10:32:00:uplink:INFO: Setting uplinks mask [8, 9, 10, 11, 12, 13, 14, 15]
10:32:00:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
10:32:00:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
10:32:01:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
10:32:01:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
10:32:01:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
10:32:01:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
10:32:01:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
10:32:01:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
10:32:03:setup_element:INFO: Performing Elink synchronization
10:32:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:32:03:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:32:03:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
10:32:03:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
10:32:03:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
10:32:03:uplink:INFO: Enabling uplinks [8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
10:32:03:febtest:INFO: Init all SMX (CSA): 30
10:32:11:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:32:11:febtest:INFO: 08-01 | XA-000-09-004-004-011-003-13 | 37.7 | 1159.7
10:32:11:febtest:INFO: 10-03 | XA-000-09-004-004-010-024-07 | 40.9 | 1153.7
10:32:11:febtest:INFO: 12-05 | XA-000-09-004-004-010-021-07 | 40.9 | 1147.8
10:32:11:febtest:INFO: 14-07 | XA-000-09-004-004-010-018-07 | 25.1 | 1195.1
10:32:12:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
10:32:14:ST3_smx:INFO: chip: 8-1 37.726682 C 1171.483840 mV
10:32:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:32:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:32:14:ST3_smx:INFO: Electrons
10:32:14:ST3_smx:INFO: # loops 0
10:32:16:ST3_smx:INFO: # loops 1
10:32:17:ST3_smx:INFO: # loops 2
10:32:19:ST3_smx:INFO: Total # of broken channels: 0
10:32:19:ST3_smx:INFO: List of broken channels: []
10:32:19:ST3_smx:INFO: Total # of broken channels: 0
10:32:19:ST3_smx:INFO: List of broken channels: []
10:32:21:ST3_smx:INFO: chip: 10-3 40.898880 C 1165.571835 mV
10:32:21:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:32:21:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:32:21:ST3_smx:INFO: Electrons
10:32:21:ST3_smx:INFO: # loops 0
10:32:23:ST3_smx:INFO: # loops 1
10:32:25:ST3_smx:INFO: # loops 2
10:32:27:ST3_smx:INFO: Total # of broken channels: 0
10:32:27:ST3_smx:INFO: List of broken channels: []
10:32:27:ST3_smx:INFO: Total # of broken channels: 0
10:32:27:ST3_smx:INFO: List of broken channels: []
10:32:28:ST3_smx:INFO: chip: 12-5 40.898880 C 1159.654860 mV
10:32:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:32:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:32:28:ST3_smx:INFO: Electrons
10:32:28:ST3_smx:INFO: # loops 0
10:32:30:ST3_smx:INFO: # loops 1
10:32:32:ST3_smx:INFO: # loops 2
10:32:34:ST3_smx:INFO: Total # of broken channels: 0
10:32:34:ST3_smx:INFO: List of broken channels: []
10:32:34:ST3_smx:INFO: Total # of broken channels: 0
10:32:34:ST3_smx:INFO: List of broken channels: []
10:32:35:ST3_smx:INFO: chip: 14-7 28.225000 C 1206.851500 mV
10:32:35:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:32:35:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:32:35:ST3_smx:INFO: Electrons
10:32:35:ST3_smx:INFO: # loops 0
10:32:37:ST3_smx:INFO: # loops 1
10:32:39:ST3_smx:INFO: # loops 2
10:32:41:ST3_smx:INFO: Total # of broken channels: 0
10:32:41:ST3_smx:INFO: List of broken channels: []
10:32:41:ST3_smx:INFO: Total # of broken channels: 0
10:32:41:ST3_smx:INFO: List of broken channels: []
10:32:41:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:32:41:febtest:INFO: 08-01 | XA-000-09-004-004-011-003-13 | 37.7 | 1195.1
10:32:42:febtest:INFO: 10-03 | XA-000-09-004-004-010-024-07 | 40.9 | 1183.3
10:32:42:febtest:INFO: 12-05 | XA-000-09-004-004-010-021-07 | 44.1 | 1183.3
10:32:42:febtest:INFO: 14-07 | XA-000-09-004-004-010-018-07 | 28.2 | 1224.5
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_11_07-10_31_52
OPERATOR : Benjamin;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3090| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '0.7581', '1.850', '1.1820', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.0240', '1.850', '1.1520', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '0.9946', '1.850', '0.2668', '0.000', '0.0000', '0.000', '0.0000']