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FEB_3092 08.11.24 15:06:25
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15:06:25:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:06:25:ST3_Shared:INFO: FEB-Microcable
15:06:25:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:06:25:febtest:INFO: Testing FEB with SN 3092
15:06:27:smx_tester:INFO: Scanning setup
15:06:27:elinks:INFO: Disabling clock on downlink 0
15:06:27:elinks:INFO: Disabling clock on downlink 1
15:06:27:elinks:INFO: Disabling clock on downlink 2
15:06:27:elinks:INFO: Disabling clock on downlink 3
15:06:27:elinks:INFO: Disabling clock on downlink 4
15:06:27:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:06:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
15:06:27:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:06:27:elinks:INFO: Disabling clock on downlink 0
15:06:27:elinks:INFO: Disabling clock on downlink 1
15:06:27:elinks:INFO: Disabling clock on downlink 2
15:06:27:elinks:INFO: Disabling clock on downlink 3
15:06:27:elinks:INFO: Disabling clock on downlink 4
15:06:27:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:06:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:06:27:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
15:06:27:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
15:06:27:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
15:06:27:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
15:06:27:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
15:06:27:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
15:06:27:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
15:06:27:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
15:06:27:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
15:06:27:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
15:06:27:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
15:06:27:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
15:06:27:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
15:06:27:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
15:06:27:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
15:06:27:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
15:06:27:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:06:27:elinks:INFO: Disabling clock on downlink 0
15:06:27:elinks:INFO: Disabling clock on downlink 1
15:06:27:elinks:INFO: Disabling clock on downlink 2
15:06:27:elinks:INFO: Disabling clock on downlink 3
15:06:27:elinks:INFO: Disabling clock on downlink 4
15:06:27:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:06:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:06:27:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:06:27:elinks:INFO: Disabling clock on downlink 0
15:06:27:elinks:INFO: Disabling clock on downlink 1
15:06:27:elinks:INFO: Disabling clock on downlink 2
15:06:27:elinks:INFO: Disabling clock on downlink 3
15:06:27:elinks:INFO: Disabling clock on downlink 4
15:06:27:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:06:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
15:06:28:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:06:28:elinks:INFO: Disabling clock on downlink 0
15:06:28:elinks:INFO: Disabling clock on downlink 1
15:06:28:elinks:INFO: Disabling clock on downlink 2
15:06:28:elinks:INFO: Disabling clock on downlink 3
15:06:28:elinks:INFO: Disabling clock on downlink 4
15:06:28:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:06:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
15:06:28:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:06:28:setup_element:INFO: Scanning clock phase
15:06:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:06:28:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
15:06:28:setup_element:INFO: Clock phase scan results for group 0, downlink 1
15:06:28:setup_element:INFO: Eye window for uplink 0 : ________________________________________________________________________________
Clock Delay: 40
15:06:28:setup_element:INFO: Eye window for uplink 1 : ________________________________________________________________________________
Clock Delay: 40
15:06:28:setup_element:INFO: Eye window for uplink 2 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
15:06:28:setup_element:INFO: Eye window for uplink 3 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
15:06:28:setup_element:INFO: Eye window for uplink 4 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
15:06:28:setup_element:INFO: Eye window for uplink 5 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
15:06:28:setup_element:INFO: Eye window for uplink 6 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
15:06:28:setup_element:INFO: Eye window for uplink 7 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
15:06:28:setup_element:INFO: Eye window for uplink 8 : _____________________________________________________________________XXXXXXX____
Clock Delay: 32
15:06:28:setup_element:INFO: Eye window for uplink 9 : _____________________________________________________________________XXXXXXX____
Clock Delay: 32
15:06:28:setup_element:INFO: Eye window for uplink 10: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
15:06:28:setup_element:INFO: Eye window for uplink 11: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
15:06:28:setup_element:INFO: Eye window for uplink 12: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
15:06:28:setup_element:INFO: Eye window for uplink 13: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
15:06:28:setup_element:INFO: Eye window for uplink 14: _______________________________________________________________________XXXXXX___
Clock Delay: 33
15:06:28:setup_element:INFO: Eye window for uplink 15: _______________________________________________________________________XXXXXX___
Clock Delay: 33
15:06:28:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 1
15:06:28:setup_element:INFO: Scanning data phases
15:06:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:06:28:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
15:06:33:setup_element:INFO: Data phase scan results for group 0, downlink 1
15:06:33:setup_element:INFO: Eye window for uplink 0 : ______XXXXXXXXX_________________________
Data delay found: 30
15:06:33:setup_element:INFO: Eye window for uplink 1 : _XXXXXXXXX______________________________
Data delay found: 25
15:06:33:setup_element:INFO: Eye window for uplink 2 : ___XXXXXXXXX____________________________
Data delay found: 27
15:06:33:setup_element:INFO: Eye window for uplink 3 : XXXXXXX_______________________________XX
Data delay found: 22
15:06:33:setup_element:INFO: Eye window for uplink 4 : XXXXXXX________________________________X
Data delay found: 22
15:06:33:setup_element:INFO: Eye window for uplink 5 : XXX________________________________XXXXX
Data delay found: 18
15:06:33:setup_element:INFO: Eye window for uplink 6 : XXX___________________________XXXXXXXXXX
Data delay found: 16
15:06:33:setup_element:INFO: Eye window for uplink 7 : ___________________________XXXXXXXXXX___
Data delay found: 11
15:06:33:setup_element:INFO: Eye window for uplink 8 : ___________________XXXXXXX______________
Data delay found: 2
15:06:33:setup_element:INFO: Eye window for uplink 9 : _______________________XXXXXXXX_________
Data delay found: 6
15:06:33:setup_element:INFO: Eye window for uplink 10: _____________________XXXXXX_____________
Data delay found: 3
15:06:33:setup_element:INFO: Eye window for uplink 11: _________________________XXXXX__________
Data delay found: 7
15:06:33:setup_element:INFO: Eye window for uplink 12: _______________XXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 7
15:06:33:setup_element:INFO: Eye window for uplink 13: _______________XXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 7
15:06:33:setup_element:INFO: Eye window for uplink 14: _______________________XXXXXXXXXX_______
Data delay found: 7
15:06:33:setup_element:INFO: Eye window for uplink 15: __________________________XXXXXXXXX_____
Data delay found: 10
15:06:33:setup_element:INFO: Setting the data phase to 30 for uplink 0
15:06:33:setup_element:INFO: Setting the data phase to 25 for uplink 1
15:06:33:setup_element:INFO: Setting the data phase to 27 for uplink 2
15:06:33:setup_element:INFO: Setting the data phase to 22 for uplink 3
15:06:33:setup_element:INFO: Setting the data phase to 22 for uplink 4
15:06:33:setup_element:INFO: Setting the data phase to 18 for uplink 5
15:06:33:setup_element:INFO: Setting the data phase to 16 for uplink 6
15:06:33:setup_element:INFO: Setting the data phase to 11 for uplink 7
15:06:33:setup_element:INFO: Setting the data phase to 2 for uplink 8
15:06:33:setup_element:INFO: Setting the data phase to 6 for uplink 9
15:06:33:setup_element:INFO: Setting the data phase to 3 for uplink 10
15:06:33:setup_element:INFO: Setting the data phase to 7 for uplink 11
15:06:33:setup_element:INFO: Setting the data phase to 7 for uplink 12
15:06:33:setup_element:INFO: Setting the data phase to 7 for uplink 13
15:06:33:setup_element:INFO: Setting the data phase to 7 for uplink 14
15:06:33:setup_element:INFO: Setting the data phase to 10 for uplink 15
15:06:33:setup_element:INFO: Beginning SMX ASICs map scan
15:06:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:06:33:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
15:06:33:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
15:06:33:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
15:06:33:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
15:06:33:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
15:06:33:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
15:06:34:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
15:06:34:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
15:06:34:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
15:06:34:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
15:06:34:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
15:06:34:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
15:06:34:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
15:06:34:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
15:06:34:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
15:06:34:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
15:06:34:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
15:06:35:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
15:06:35:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
15:06:35:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
15:06:36:setup_element:INFO: Performing Elink synchronization
15:06:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:06:36:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
15:06:36:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
15:06:36:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
15:06:36:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
15:06:36:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
15:06:37:febtest:INFO: Init all SMX (CSA): 30
15:06:53:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
15:06:53:febtest:INFO: 01-00 | XA-000-09-004-006-009-022-00 | 44.1 | 1147.8
15:06:53:febtest:INFO: 08-01 | XA-000-09-004-006-007-024-09 | 44.1 | 1153.7
15:06:53:febtest:INFO: 03-02 | XA-000-09-004-006-007-023-09 | 47.3 | 1130.0
15:06:53:febtest:INFO: 10-03 | XA-000-09-004-006-008-024-13 | 44.1 | 1147.8
15:06:54:febtest:INFO: 05-04 | XA-000-09-004-006-008-023-13 | 37.7 | 1165.6
15:06:54:febtest:INFO: 12-05 | XA-000-09-004-006-009-024-00 | 37.7 | 1165.6
15:06:54:febtest:INFO: 07-06 | XA-000-09-004-006-009-023-00 | 37.7 | 1165.6
15:06:54:febtest:INFO: 14-07 | XA-000-09-004-006-007-025-09 | 40.9 | 1147.8
15:06:55:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
15:06:57:ST3_smx:INFO: chip: 1-0 44.073563 C 1159.654860 mV
15:06:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:06:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:06:57:ST3_smx:INFO: Electrons
15:06:57:ST3_smx:INFO: # loops 0
15:06:59:ST3_smx:INFO: # loops 1
15:07:01:ST3_smx:INFO: # loops 2
15:07:03:ST3_smx:INFO: Total # of broken channels: 0
15:07:03:ST3_smx:INFO: List of broken channels: []
15:07:03:ST3_smx:INFO: Total # of broken channels: 0
15:07:03:ST3_smx:INFO: List of broken channels: []
15:07:04:ST3_smx:INFO: chip: 8-1 44.073563 C 1165.571835 mV
15:07:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:07:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:07:04:ST3_smx:INFO: Electrons
15:07:04:ST3_smx:INFO: # loops 0
15:07:06:ST3_smx:INFO: # loops 1
15:07:08:ST3_smx:INFO: # loops 2
15:07:10:ST3_smx:INFO: Total # of broken channels: 0
15:07:10:ST3_smx:INFO: List of broken channels: []
15:07:10:ST3_smx:INFO: Total # of broken channels: 0
15:07:10:ST3_smx:INFO: List of broken channels: []
15:07:11:ST3_smx:INFO: chip: 3-2 47.250730 C 1141.874115 mV
15:07:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:07:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:07:11:ST3_smx:INFO: Electrons
15:07:11:ST3_smx:INFO: # loops 0
15:07:13:ST3_smx:INFO: # loops 1
15:07:15:ST3_smx:INFO: # loops 2
15:07:17:ST3_smx:INFO: Total # of broken channels: 0
15:07:17:ST3_smx:INFO: List of broken channels: []
15:07:17:ST3_smx:INFO: Total # of broken channels: 0
15:07:17:ST3_smx:INFO: List of broken channels: []
15:07:18:ST3_smx:INFO: chip: 10-3 44.073563 C 1159.654860 mV
15:07:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:07:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:07:18:ST3_smx:INFO: Electrons
15:07:18:ST3_smx:INFO: # loops 0
15:07:20:ST3_smx:INFO: # loops 1
15:07:22:ST3_smx:INFO: # loops 2
15:07:24:ST3_smx:INFO: Total # of broken channels: 0
15:07:24:ST3_smx:INFO: List of broken channels: []
15:07:24:ST3_smx:INFO: Total # of broken channels: 18
15:07:24:ST3_smx:INFO: List of broken channels: [11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45]
15:07:25:ST3_smx:INFO: chip: 5-4 37.726682 C 1177.390875 mV
15:07:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:07:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:07:25:ST3_smx:INFO: Electrons
15:07:25:ST3_smx:INFO: # loops 0
15:07:27:ST3_smx:INFO: # loops 1
15:07:29:ST3_smx:INFO: # loops 2
15:07:31:ST3_smx:INFO: Total # of broken channels: 0
15:07:31:ST3_smx:INFO: List of broken channels: []
15:07:31:ST3_smx:INFO: Total # of broken channels: 0
15:07:31:ST3_smx:INFO: List of broken channels: []
15:07:32:ST3_smx:INFO: chip: 12-5 40.898880 C 1177.390875 mV
15:07:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:07:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:07:32:ST3_smx:INFO: Electrons
15:07:32:ST3_smx:INFO: # loops 0
15:07:34:ST3_smx:INFO: # loops 1
15:07:36:ST3_smx:INFO: # loops 2
15:07:38:ST3_smx:INFO: Total # of broken channels: 0
15:07:38:ST3_smx:INFO: List of broken channels: []
15:07:38:ST3_smx:INFO: Total # of broken channels: 0
15:07:38:ST3_smx:INFO: List of broken channels: []
15:07:39:ST3_smx:INFO: chip: 7-6 40.898880 C 1177.390875 mV
15:07:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:07:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:07:39:ST3_smx:INFO: Electrons
15:07:39:ST3_smx:INFO: # loops 0
15:07:41:ST3_smx:INFO: # loops 1
15:07:43:ST3_smx:INFO: # loops 2
15:07:45:ST3_smx:INFO: Total # of broken channels: 0
15:07:45:ST3_smx:INFO: List of broken channels: []
15:07:45:ST3_smx:INFO: Total # of broken channels: 0
15:07:45:ST3_smx:INFO: List of broken channels: []
15:07:46:ST3_smx:INFO: chip: 14-7 44.073563 C 1159.654860 mV
15:07:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:07:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:07:46:ST3_smx:INFO: Electrons
15:07:46:ST3_smx:INFO: # loops 0
15:07:48:ST3_smx:INFO: # loops 1
15:07:50:ST3_smx:INFO: # loops 2
15:07:52:ST3_smx:INFO: Total # of broken channels: 0
15:07:52:ST3_smx:INFO: List of broken channels: []
15:07:52:ST3_smx:INFO: Total # of broken channels: 0
15:07:52:ST3_smx:INFO: List of broken channels: []
15:07:52:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
15:07:52:febtest:INFO: 01-00 | XA-000-09-004-006-009-022-00 | 44.1 | 1183.3
15:07:53:febtest:INFO: 08-01 | XA-000-09-004-006-007-024-09 | 44.1 | 1195.1
15:07:53:febtest:INFO: 03-02 | XA-000-09-004-006-007-023-09 | 47.3 | 1165.6
15:07:53:febtest:INFO: 10-03 | XA-000-09-004-006-008-024-13 | 44.1 | 1183.3
15:07:53:febtest:INFO: 05-04 | XA-000-09-004-006-008-023-13 | 40.9 | 1206.9
15:07:53:febtest:INFO: 12-05 | XA-000-09-004-006-009-024-00 | 40.9 | 1201.0
15:07:54:febtest:INFO: 07-06 | XA-000-09-004-006-009-023-00 | 40.9 | 1195.1
15:07:54:febtest:INFO: 14-07 | XA-000-09-004-006-007-025-09 | 47.3 | 1177.4
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_11_08-15_06_25
OPERATOR : Henrik;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3092| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.4190', '1.851', '2.2720', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0050', '1.850', '2.5010', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9600', '1.850', '0.5230', '0.000', '0.0000', '0.000', '0.0000']