14:44:33:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:44:33:ST3_Shared:INFO:	                         FEB-Sensor                         
14:44:33:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:44:51:ST3_ModuleSelector:INFO:	L5UR001156 M5UR0B0011560B2 42 A

14:44:51:ST3_ModuleSelector:INFO:	08312

14:44:51:febtest:INFO:	Testing FEB with SN 3095
14:44:52:smx_tester:INFO:	Scanning setup
14:44:52:elinks:INFO:	Disabling clock on downlink 0
14:44:52:elinks:INFO:	Disabling clock on downlink 1
14:44:52:elinks:INFO:	Disabling clock on downlink 2
14:44:52:elinks:INFO:	Disabling clock on downlink 3
14:44:52:elinks:INFO:	Disabling clock on downlink 4
14:44:52:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:44:52:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
14:44:52:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:44:52:elinks:INFO:	Disabling clock on downlink 0
14:44:52:elinks:INFO:	Disabling clock on downlink 1
14:44:52:elinks:INFO:	Disabling clock on downlink 2
14:44:52:elinks:INFO:	Disabling clock on downlink 3
14:44:52:elinks:INFO:	Disabling clock on downlink 4
14:44:52:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:44:52:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:44:53:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
14:44:53:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
14:44:53:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
14:44:53:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
14:44:53:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
14:44:53:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
14:44:53:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
14:44:53:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
14:44:53:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
14:44:53:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
14:44:53:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
14:44:53:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
14:44:53:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
14:44:53:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
14:44:53:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
14:44:53:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
14:44:53:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:44:53:elinks:INFO:	Disabling clock on downlink 0
14:44:53:elinks:INFO:	Disabling clock on downlink 1
14:44:53:elinks:INFO:	Disabling clock on downlink 2
14:44:53:elinks:INFO:	Disabling clock on downlink 3
14:44:53:elinks:INFO:	Disabling clock on downlink 4
14:44:53:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:44:53:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:44:53:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:44:53:elinks:INFO:	Disabling clock on downlink 0
14:44:53:elinks:INFO:	Disabling clock on downlink 1
14:44:53:elinks:INFO:	Disabling clock on downlink 2
14:44:53:elinks:INFO:	Disabling clock on downlink 3
14:44:53:elinks:INFO:	Disabling clock on downlink 4
14:44:53:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:44:53:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
14:44:53:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:44:53:elinks:INFO:	Disabling clock on downlink 0
14:44:53:elinks:INFO:	Disabling clock on downlink 1
14:44:53:elinks:INFO:	Disabling clock on downlink 2
14:44:53:elinks:INFO:	Disabling clock on downlink 3
14:44:53:elinks:INFO:	Disabling clock on downlink 4
14:44:53:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:44:53:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
14:44:53:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:44:53:setup_element:INFO:	Scanning clock phase
14:44:53:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:44:53:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:44:53:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
14:44:53:setup_element:INFO:	Eye window for uplink 0 : _______________________________________________________________________XXXXX____
Clock Delay: 33
14:44:53:setup_element:INFO:	Eye window for uplink 1 : _______________________________________________________________________XXXXX____
Clock Delay: 33
14:44:53:setup_element:INFO:	Eye window for uplink 2 : ______________________________________________________________________XXXXXX____
Clock Delay: 32
14:44:53:setup_element:INFO:	Eye window for uplink 3 : ______________________________________________________________________XXXXXX____
Clock Delay: 32
14:44:53:setup_element:INFO:	Eye window for uplink 4 : ______________________________________________________________________XXXXXX____
Clock Delay: 32
14:44:53:setup_element:INFO:	Eye window for uplink 5 : ______________________________________________________________________XXXXXX____
Clock Delay: 32
14:44:53:setup_element:INFO:	Eye window for uplink 6 : _____________________________________________________________________XXXX_______
Clock Delay: 30
14:44:53:setup_element:INFO:	Eye window for uplink 7 : _____________________________________________________________________XXXX_______
Clock Delay: 30
14:44:53:setup_element:INFO:	Eye window for uplink 8 : ______________________________________________________________________XXXXXX____
Clock Delay: 32
14:44:53:setup_element:INFO:	Eye window for uplink 9 : ______________________________________________________________________XXXXXX____
Clock Delay: 32
14:44:53:setup_element:INFO:	Eye window for uplink 10: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
14:44:53:setup_element:INFO:	Eye window for uplink 11: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
14:44:53:setup_element:INFO:	Eye window for uplink 12: _____________________________________________________________________XXXXX______
Clock Delay: 31
14:44:53:setup_element:INFO:	Eye window for uplink 13: _____________________________________________________________________XXXXX______
Clock Delay: 31
14:44:53:setup_element:INFO:	Eye window for uplink 14: ______________________________________________________________________XXXXXX____
Clock Delay: 32
14:44:53:setup_element:INFO:	Eye window for uplink 15: ______________________________________________________________________XXXXXX____
Clock Delay: 32
14:44:53:setup_element:INFO:	Setting the clock phase to 32 for group 0, downlink 1
14:44:53:setup_element:INFO:	Scanning data phases
14:44:53:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:44:53:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:44:58:setup_element:INFO:	Data phase scan results for group 0, downlink 1
14:44:58:setup_element:INFO:	Eye window for uplink 0 : ______XXXXXXX___________________________
Data delay found: 29
14:44:58:setup_element:INFO:	Eye window for uplink 1 : __XXXXX_________________________________
Data delay found: 24
14:44:58:setup_element:INFO:	Eye window for uplink 2 : ____XXXXXX______________________________
Data delay found: 26
14:44:58:setup_element:INFO:	Eye window for uplink 3 : XXXXXX_________________________________X
Data delay found: 22
14:44:58:setup_element:INFO:	Eye window for uplink 4 : XXXXXX_________________________________X
Data delay found: 22
14:44:58:setup_element:INFO:	Eye window for uplink 5 : XX_________________________________XXXXX
Data delay found: 18
14:44:58:setup_element:INFO:	Eye window for uplink 6 : _____________________________XXXXXXXX___
Data delay found: 12
14:44:58:setup_element:INFO:	Eye window for uplink 7 : __________________________XXXXXXXX______
Data delay found: 9
14:44:58:setup_element:INFO:	Eye window for uplink 8 : __________________XXXXXXXXX_____________
Data delay found: 2
14:44:58:setup_element:INFO:	Eye window for uplink 9 : ________________________XXXXXXX_________
Data delay found: 7
14:44:58:setup_element:INFO:	Eye window for uplink 10: _________________XXXXXXXX_______________
Data delay found: 0
14:44:58:setup_element:INFO:	Eye window for uplink 11: _____________________XXXXXXXX___________
Data delay found: 4
14:44:58:setup_element:INFO:	Eye window for uplink 12: _____________________XXXXXXX____________
Data delay found: 4
14:44:58:setup_element:INFO:	Eye window for uplink 13: _________________________XXXXX__________
Data delay found: 7
14:44:58:setup_element:INFO:	Eye window for uplink 14: ____________________XXXXXXXXX___________
Data delay found: 4
14:44:58:setup_element:INFO:	Eye window for uplink 15: _______________________XXXXXXXX_________
Data delay found: 6
14:44:58:setup_element:INFO:	Setting the data phase to 29 for uplink 0
14:44:58:setup_element:INFO:	Setting the data phase to 24 for uplink 1
14:44:58:setup_element:INFO:	Setting the data phase to 26 for uplink 2
14:44:58:setup_element:INFO:	Setting the data phase to 22 for uplink 3
14:44:58:setup_element:INFO:	Setting the data phase to 22 for uplink 4
14:44:58:setup_element:INFO:	Setting the data phase to 18 for uplink 5
14:44:58:setup_element:INFO:	Setting the data phase to 12 for uplink 6
14:44:58:setup_element:INFO:	Setting the data phase to 9 for uplink 7
14:44:58:setup_element:INFO:	Setting the data phase to 2 for uplink 8
14:44:58:setup_element:INFO:	Setting the data phase to 7 for uplink 9
14:44:58:setup_element:INFO:	Setting the data phase to 0 for uplink 10
14:44:58:setup_element:INFO:	Setting the data phase to 4 for uplink 11
14:44:58:setup_element:INFO:	Setting the data phase to 4 for uplink 12
14:44:58:setup_element:INFO:	Setting the data phase to 7 for uplink 13
14:44:58:setup_element:INFO:	Setting the data phase to 4 for uplink 14
14:44:58:setup_element:INFO:	Setting the data phase to 6 for uplink 15
14:44:58:setup_element:INFO:	Beginning SMX ASICs map scan
14:44:58:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:44:58:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:44:59:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
14:44:59:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
14:44:59:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
14:44:59:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
14:44:59:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
14:44:59:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
14:44:59:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
14:44:59:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
14:44:59:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
14:44:59:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
14:44:59:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
14:44:59:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
14:44:59:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
14:44:59:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
14:44:59:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
14:45:00:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
14:45:00:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
14:45:00:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
14:45:00:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
14:45:01:setup_element:INFO:	Performing Elink synchronization
14:45:01:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:45:01:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:45:01:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
14:45:01:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
14:45:01:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
14:45:01:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   1   |  0  |   [1]   |    2    | [(0, 1), (1, 0)]
 1   | [0]  |   1   |  0  |   [8]   |    2    | [(0, 8), (1, 9)]
 2   | [0]  |   1   |  0  |   [3]   |    2    | [(0, 3), (1, 2)]
 3   | [0]  |   1   |  0  |  [10]   |    2    | [(0, 10), (1, 11)]
 4   | [0]  |   1   |  0  |   [5]   |    2    | [(0, 5), (1, 4)]
 5   | [0]  |   1   |  0  |  [12]   |    2    | [(0, 12), (1, 13)]
 6   | [0]  |   1   |  0  |   [7]   |    2    | [(0, 7), (1, 6)]
 7   | [0]  |   1   |  0  |  [14]   |    2    | [(0, 14), (1, 15)]
|_________________________________________________________________________|
14:45:02:febtest:INFO:	Init all SMX (CSA): 30
14:45:16:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:45:16:febtest:INFO:	01-00 | XA-000-09-004-004-010-009-00 |  50.4 | 1118.1
14:45:16:febtest:INFO:	08-01 | XA-000-09-004-004-010-013-00 |  47.3 | 1141.9
14:45:16:febtest:INFO:	03-02 | XA-000-09-004-004-010-010-00 |  44.1 | 1147.8
14:45:17:febtest:INFO:	10-03 | XA-000-09-004-006-005-009-13 |  44.1 | 1159.7
14:45:17:febtest:INFO:	05-04 | XA-000-09-004-004-010-011-00 |  47.3 | 1124.0
14:45:17:febtest:INFO:	12-05 | XA-000-09-004-006-005-010-13 |  34.6 | 1212.7
14:45:17:febtest:INFO:	07-06 | XA-000-09-004-004-010-012-00 |  31.4 | 1189.2
14:45:17:febtest:INFO:	14-07 | XA-000-09-004-006-005-011-13 |  37.7 | 1177.4
14:45:18:febtest:INFO:	Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
14:45:20:ST3_smx:INFO:	chip: 1-0 	 50.430383 C 	 1135.937260 mV
14:45:20:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:45:20:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:45:20:ST3_smx:INFO:		Electrons
14:45:20:ST3_smx:INFO:	# loops 0
14:45:22:ST3_smx:INFO:	# loops 1
14:45:24:ST3_smx:INFO:	# loops 2
14:45:26:ST3_smx:INFO:	Total # of broken channels: 0
14:45:26:ST3_smx:INFO:	List of broken channels: []
14:45:26:ST3_smx:INFO:	Total # of broken channels: 0
14:45:26:ST3_smx:INFO:	List of broken channels: []
14:45:27:ST3_smx:INFO:	chip: 8-1 	 47.250730 C 	 1159.654860 mV
14:45:27:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:45:27:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:45:27:ST3_smx:INFO:		Electrons
14:45:27:ST3_smx:INFO:	# loops 0
14:45:29:ST3_smx:INFO:	# loops 1
14:45:30:ST3_smx:INFO:	# loops 2
14:45:32:ST3_smx:INFO:	Total # of broken channels: 0
14:45:32:ST3_smx:INFO:	List of broken channels: []
14:45:32:ST3_smx:INFO:	Total # of broken channels: 0
14:45:32:ST3_smx:INFO:	List of broken channels: []
14:45:34:ST3_smx:INFO:	chip: 3-2 	 47.250730 C 	 1159.654860 mV
14:45:34:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:45:34:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:45:34:ST3_smx:INFO:		Electrons
14:45:34:ST3_smx:INFO:	# loops 0
14:45:35:ST3_smx:INFO:	# loops 1
14:45:37:ST3_smx:INFO:	# loops 2
14:45:39:ST3_smx:INFO:	Total # of broken channels: 0
14:45:39:ST3_smx:INFO:	List of broken channels: []
14:45:39:ST3_smx:INFO:	Total # of broken channels: 0
14:45:39:ST3_smx:INFO:	List of broken channels: []
14:45:40:ST3_smx:INFO:	chip: 10-3 	 44.073563 C 	 1171.483840 mV
14:45:40:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:45:40:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:45:40:ST3_smx:INFO:		Electrons
14:45:40:ST3_smx:INFO:	# loops 0
14:45:42:ST3_smx:INFO:	# loops 1
14:45:44:ST3_smx:INFO:	# loops 2
14:45:46:ST3_smx:INFO:	Total # of broken channels: 0
14:45:46:ST3_smx:INFO:	List of broken channels: []
14:45:46:ST3_smx:INFO:	Total # of broken channels: 0
14:45:46:ST3_smx:INFO:	List of broken channels: []
14:45:47:ST3_smx:INFO:	chip: 5-4 	 50.430383 C 	 1135.937260 mV
14:45:47:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:45:47:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:45:47:ST3_smx:INFO:		Electrons
14:45:47:ST3_smx:INFO:	# loops 0
14:45:49:ST3_smx:INFO:	# loops 1
14:45:51:ST3_smx:INFO:	# loops 2
14:45:52:ST3_smx:INFO:	Total # of broken channels: 1
14:45:52:ST3_smx:INFO:	List of broken channels: [73]
14:45:52:ST3_smx:INFO:	Total # of broken channels: 1
14:45:52:ST3_smx:INFO:	List of broken channels: [73]
14:45:54:ST3_smx:INFO:	chip: 12-5 	 34.556970 C 	 1230.330540 mV
14:45:54:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:45:54:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:45:54:ST3_smx:INFO:		Electrons
14:45:54:ST3_smx:INFO:	# loops 0
14:45:56:ST3_smx:INFO:	# loops 1
14:45:58:ST3_smx:INFO:	# loops 2
14:46:00:ST3_smx:INFO:	Total # of broken channels: 0
14:46:00:ST3_smx:INFO:	List of broken channels: []
14:46:00:ST3_smx:INFO:	Total # of broken channels: 0
14:46:00:ST3_smx:INFO:	List of broken channels: []
14:46:01:ST3_smx:INFO:	chip: 7-6 	 34.556970 C 	 1200.969315 mV
14:46:01:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:46:01:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:46:01:ST3_smx:INFO:		Electrons
14:46:01:ST3_smx:INFO:	# loops 0
14:46:03:ST3_smx:INFO:	# loops 1
14:46:05:ST3_smx:INFO:	# loops 2
14:46:07:ST3_smx:INFO:	Total # of broken channels: 0
14:46:07:ST3_smx:INFO:	List of broken channels: []
14:46:07:ST3_smx:INFO:	Total # of broken channels: 0
14:46:07:ST3_smx:INFO:	List of broken channels: []
14:46:08:ST3_smx:INFO:	chip: 14-7 	 40.898880 C 	 1189.190035 mV
14:46:08:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:46:08:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:46:08:ST3_smx:INFO:		Electrons
14:46:08:ST3_smx:INFO:	# loops 0
14:46:10:ST3_smx:INFO:	# loops 1
14:46:12:ST3_smx:INFO:	# loops 2
14:46:13:ST3_smx:INFO:	Total # of broken channels: 0
14:46:13:ST3_smx:INFO:	List of broken channels: []
14:46:13:ST3_smx:INFO:	Total # of broken channels: 0
14:46:13:ST3_smx:INFO:	List of broken channels: []
14:46:14:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:46:14:febtest:INFO:	01-00 | XA-000-09-004-004-010-009-00 |  53.6 | 1153.7
14:46:14:febtest:INFO:	08-01 | XA-000-09-004-004-010-013-00 |  50.4 | 1177.4
14:46:14:febtest:INFO:	03-02 | XA-000-09-004-004-010-010-00 |  47.3 | 1183.3
14:46:14:febtest:INFO:	10-03 | XA-000-09-004-006-005-009-13 |  47.3 | 1195.1
14:46:15:febtest:INFO:	05-04 | XA-000-09-004-004-010-011-00 |  50.4 | 1153.7
14:46:15:febtest:INFO:	12-05 | XA-000-09-004-006-005-010-13 |  34.6 | 1288.7
14:46:15:febtest:INFO:	07-06 | XA-000-09-004-004-010-012-00 |  34.6 | 1218.6
14:46:15:febtest:INFO:	14-07 | XA-000-09-004-006-005-011-13 |  40.9 | 1206.9
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_11_19-14_44_33
OPERATOR  : Benjamin; 
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3095| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
SENSOR_ID:	08312

MODULE_NAME:	L5UR001156 M5UR0B0011560B2 42 A

MODULE_TYPE:	
MODULE_LADDER:	L5UR001156
MODULE_MODULE:	M5UR0B0011560B2
MODULE_SIZE:	42
MODULE_GRADE:	A
------------------------------------------------------------
VI_before_Init : ['2.450', '1.5660', '1.850', '2.5740', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9740', '1.850', '2.3730', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9780', '1.850', '0.5300', '0.000', '0.0000', '0.000', '0.0000']