FEB_3095 15.11.24 13:08:58
Info
13:08:58:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:08:58:ST3_Shared:INFO: FEB-Microcable
13:08:58:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:08:59:febtest:INFO: Testing FEB with SN 3095
13:09:00:smx_tester:INFO: Scanning setup
13:09:00:elinks:INFO: Disabling clock on downlink 0
13:09:00:elinks:INFO: Disabling clock on downlink 1
13:09:00:elinks:INFO: Disabling clock on downlink 2
13:09:00:elinks:INFO: Disabling clock on downlink 3
13:09:00:elinks:INFO: Disabling clock on downlink 4
13:09:00:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:09:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:09:00:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:09:00:elinks:INFO: Disabling clock on downlink 0
13:09:00:elinks:INFO: Disabling clock on downlink 1
13:09:00:elinks:INFO: Disabling clock on downlink 2
13:09:00:elinks:INFO: Disabling clock on downlink 3
13:09:00:elinks:INFO: Disabling clock on downlink 4
13:09:00:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:09:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:09:00:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
13:09:00:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
13:09:00:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
13:09:00:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
13:09:00:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
13:09:00:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
13:09:00:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
13:09:00:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
13:09:00:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
13:09:00:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
13:09:00:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
13:09:00:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
13:09:00:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
13:09:00:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
13:09:00:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
13:09:00:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
13:09:00:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:09:00:elinks:INFO: Disabling clock on downlink 0
13:09:00:elinks:INFO: Disabling clock on downlink 1
13:09:00:elinks:INFO: Disabling clock on downlink 2
13:09:00:elinks:INFO: Disabling clock on downlink 3
13:09:00:elinks:INFO: Disabling clock on downlink 4
13:09:00:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:09:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:09:01:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:09:01:elinks:INFO: Disabling clock on downlink 0
13:09:01:elinks:INFO: Disabling clock on downlink 1
13:09:01:elinks:INFO: Disabling clock on downlink 2
13:09:01:elinks:INFO: Disabling clock on downlink 3
13:09:01:elinks:INFO: Disabling clock on downlink 4
13:09:01:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:09:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
13:09:01:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:09:01:elinks:INFO: Disabling clock on downlink 0
13:09:01:elinks:INFO: Disabling clock on downlink 1
13:09:01:elinks:INFO: Disabling clock on downlink 2
13:09:01:elinks:INFO: Disabling clock on downlink 3
13:09:01:elinks:INFO: Disabling clock on downlink 4
13:09:01:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:09:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
13:09:01:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:09:01:setup_element:INFO: Scanning clock phase
13:09:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:09:01:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:09:01:setup_element:INFO: Clock phase scan results for group 0, downlink 1
13:09:01:setup_element:INFO: Eye window for uplink 0 : _______________________________________________________________________XXXXX____
Clock Delay: 33
13:09:01:setup_element:INFO: Eye window for uplink 1 : _______________________________________________________________________XXXXX____
Clock Delay: 33
13:09:01:setup_element:INFO: Eye window for uplink 2 : ______________________________________________________________________XXXXXX____
Clock Delay: 32
13:09:01:setup_element:INFO: Eye window for uplink 3 : ______________________________________________________________________XXXXXX____
Clock Delay: 32
13:09:01:setup_element:INFO: Eye window for uplink 4 : ______________________________________________________________________XXXXXX____
Clock Delay: 32
13:09:01:setup_element:INFO: Eye window for uplink 5 : ______________________________________________________________________XXXXXX____
Clock Delay: 32
13:09:01:setup_element:INFO: Eye window for uplink 6 : _____________________________________________________________________XXXX_______
Clock Delay: 30
13:09:01:setup_element:INFO: Eye window for uplink 7 : _____________________________________________________________________XXXX_______
Clock Delay: 30
13:09:01:setup_element:INFO: Eye window for uplink 8 : ______________________________________________________________________XXXXXX____
Clock Delay: 32
13:09:01:setup_element:INFO: Eye window for uplink 9 : ______________________________________________________________________XXXXXX____
Clock Delay: 32
13:09:01:setup_element:INFO: Eye window for uplink 10: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
13:09:01:setup_element:INFO: Eye window for uplink 11: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
13:09:01:setup_element:INFO: Eye window for uplink 12: _____________________________________________________________________XXXXX______
Clock Delay: 31
13:09:01:setup_element:INFO: Eye window for uplink 13: _____________________________________________________________________XXXXX______
Clock Delay: 31
13:09:01:setup_element:INFO: Eye window for uplink 14: ______________________________________________________________________XXXXXX____
Clock Delay: 32
13:09:01:setup_element:INFO: Eye window for uplink 15: ______________________________________________________________________XXXXXX____
Clock Delay: 32
13:09:01:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 1
13:09:01:setup_element:INFO: Scanning data phases
13:09:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:09:01:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:09:06:setup_element:INFO: Data phase scan results for group 0, downlink 1
13:09:06:setup_element:INFO: Eye window for uplink 0 : ______XXXXXXX___________________________
Data delay found: 29
13:09:06:setup_element:INFO: Eye window for uplink 1 : __XXXXXX________________________________
Data delay found: 24
13:09:06:setup_element:INFO: Eye window for uplink 2 : ____XXXXXXXX____________________________
Data delay found: 27
13:09:06:setup_element:INFO: Eye window for uplink 3 : XXXXXXX_________________________________
Data delay found: 23
13:09:06:setup_element:INFO: Eye window for uplink 4 : XXXXXX_________________________________X
Data delay found: 22
13:09:06:setup_element:INFO: Eye window for uplink 5 : XXX________________________________XXXXX
Data delay found: 18
13:09:06:setup_element:INFO: Eye window for uplink 6 : ______________________________XXXXXXX___
Data delay found: 13
13:09:06:setup_element:INFO: Eye window for uplink 7 : __________________________XXXXXXX_______
Data delay found: 9
13:09:06:setup_element:INFO: Eye window for uplink 8 : ___________________XXXXXXXX_____________
Data delay found: 2
13:09:06:setup_element:INFO: Eye window for uplink 9 : ________________________XXXXXXX_________
Data delay found: 7
13:09:06:setup_element:INFO: Eye window for uplink 10: _________________XXXXXXXXX______________
Data delay found: 1
13:09:06:setup_element:INFO: Eye window for uplink 11: _____________________XXXXXXXX___________
Data delay found: 4
13:09:06:setup_element:INFO: Eye window for uplink 12: ______________________XXXXXX____________
Data delay found: 4
13:09:06:setup_element:INFO: Eye window for uplink 13: _________________________XXXXXXX________
Data delay found: 8
13:09:06:setup_element:INFO: Eye window for uplink 14: _____________________XXXXXXXX___________
Data delay found: 4
13:09:06:setup_element:INFO: Eye window for uplink 15: _______________________XXXXXXXXX________
Data delay found: 7
13:09:06:setup_element:INFO: Setting the data phase to 29 for uplink 0
13:09:06:setup_element:INFO: Setting the data phase to 24 for uplink 1
13:09:06:setup_element:INFO: Setting the data phase to 27 for uplink 2
13:09:06:setup_element:INFO: Setting the data phase to 23 for uplink 3
13:09:06:setup_element:INFO: Setting the data phase to 22 for uplink 4
13:09:06:setup_element:INFO: Setting the data phase to 18 for uplink 5
13:09:06:setup_element:INFO: Setting the data phase to 13 for uplink 6
13:09:06:setup_element:INFO: Setting the data phase to 9 for uplink 7
13:09:06:setup_element:INFO: Setting the data phase to 2 for uplink 8
13:09:06:setup_element:INFO: Setting the data phase to 7 for uplink 9
13:09:06:setup_element:INFO: Setting the data phase to 1 for uplink 10
13:09:06:setup_element:INFO: Setting the data phase to 4 for uplink 11
13:09:06:setup_element:INFO: Setting the data phase to 4 for uplink 12
13:09:06:setup_element:INFO: Setting the data phase to 8 for uplink 13
13:09:06:setup_element:INFO: Setting the data phase to 4 for uplink 14
13:09:06:setup_element:INFO: Setting the data phase to 7 for uplink 15
13:09:06:setup_element:INFO: Beginning SMX ASICs map scan
13:09:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:09:06:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:09:06:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
13:09:06:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
13:09:06:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
13:09:06:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
13:09:07:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
13:09:07:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
13:09:07:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
13:09:07:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
13:09:07:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
13:09:07:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
13:09:07:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
13:09:07:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
13:09:07:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
13:09:07:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
13:09:07:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
13:09:08:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
13:09:08:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
13:09:08:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
13:09:08:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
13:09:09:setup_element:INFO: Performing Elink synchronization
13:09:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:09:09:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:09:09:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
13:09:09:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
13:09:09:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
13:09:09:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
13:09:10:febtest:INFO: Init all SMX (CSA): 30
13:09:26:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:09:26:febtest:INFO: 01-00 | XA-000-09-004-004-010-009-00 | 53.6 | 1118.1
13:09:26:febtest:INFO: 08-01 | XA-000-09-004-004-010-013-00 | 47.3 | 1141.9
13:09:27:febtest:INFO: 03-02 | XA-000-09-004-004-010-010-00 | 47.3 | 1147.8
13:09:27:febtest:INFO: 10-03 | XA-000-09-004-006-005-009-13 | 44.1 | 1159.7
13:09:27:febtest:INFO: 05-04 | XA-000-09-004-004-010-011-00 | 50.4 | 1130.0
13:09:27:febtest:INFO: 12-05 | XA-000-09-004-006-005-010-13 | 31.4 | 1212.7
13:09:27:febtest:INFO: 07-06 | XA-000-09-004-004-010-012-00 | 34.6 | 1189.2
13:09:28:febtest:INFO: 14-07 | XA-000-09-004-006-005-011-13 | 34.6 | 1177.4
13:09:29:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
13:09:30:ST3_smx:INFO: chip: 1-0 53.612520 C 1129.995435 mV
13:09:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:09:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:09:30:ST3_smx:INFO: Electrons
13:09:30:ST3_smx:INFO: # loops 0
13:09:32:ST3_smx:INFO: # loops 1
13:09:34:ST3_smx:INFO: # loops 2
13:09:36:ST3_smx:INFO: Total # of broken channels: 0
13:09:36:ST3_smx:INFO: List of broken channels: []
13:09:36:ST3_smx:INFO: Total # of broken channels: 0
13:09:36:ST3_smx:INFO: List of broken channels: []
13:09:38:ST3_smx:INFO: chip: 8-1 50.430383 C 1153.732915 mV
13:09:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:09:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:09:38:ST3_smx:INFO: Electrons
13:09:38:ST3_smx:INFO: # loops 0
13:09:39:ST3_smx:INFO: # loops 1
13:09:41:ST3_smx:INFO: # loops 2
13:09:43:ST3_smx:INFO: Total # of broken channels: 0
13:09:43:ST3_smx:INFO: List of broken channels: []
13:09:43:ST3_smx:INFO: Total # of broken channels: 0
13:09:43:ST3_smx:INFO: List of broken channels: []
13:09:44:ST3_smx:INFO: chip: 3-2 50.430383 C 1153.732915 mV
13:09:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:09:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:09:44:ST3_smx:INFO: Electrons
13:09:44:ST3_smx:INFO: # loops 0
13:09:46:ST3_smx:INFO: # loops 1
13:09:48:ST3_smx:INFO: # loops 2
13:09:50:ST3_smx:INFO: Total # of broken channels: 0
13:09:50:ST3_smx:INFO: List of broken channels: []
13:09:50:ST3_smx:INFO: Total # of broken channels: 0
13:09:50:ST3_smx:INFO: List of broken channels: []
13:09:51:ST3_smx:INFO: chip: 10-3 47.250730 C 1171.483840 mV
13:09:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:09:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:09:51:ST3_smx:INFO: Electrons
13:09:51:ST3_smx:INFO: # loops 0
13:09:53:ST3_smx:INFO: # loops 1
13:09:54:ST3_smx:INFO: # loops 2
13:09:56:ST3_smx:INFO: Total # of broken channels: 0
13:09:56:ST3_smx:INFO: List of broken channels: []
13:09:56:ST3_smx:INFO: Total # of broken channels: 0
13:09:56:ST3_smx:INFO: List of broken channels: []
13:09:58:ST3_smx:INFO: chip: 5-4 50.430383 C 1141.874115 mV
13:09:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:09:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:09:58:ST3_smx:INFO: Electrons
13:09:58:ST3_smx:INFO: # loops 0
13:10:00:ST3_smx:INFO: # loops 1
13:10:01:ST3_smx:INFO: # loops 2
13:10:03:ST3_smx:INFO: Total # of broken channels: 0
13:10:03:ST3_smx:INFO: List of broken channels: []
13:10:03:ST3_smx:INFO: Total # of broken channels: 0
13:10:03:ST3_smx:INFO: List of broken channels: []
13:10:05:ST3_smx:INFO: chip: 12-5 34.556970 C 1230.330540 mV
13:10:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:10:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:10:05:ST3_smx:INFO: Electrons
13:10:05:ST3_smx:INFO: # loops 0
13:10:07:ST3_smx:INFO: # loops 1
13:10:09:ST3_smx:INFO: # loops 2
13:10:11:ST3_smx:INFO: Total # of broken channels: 0
13:10:11:ST3_smx:INFO: List of broken channels: []
13:10:11:ST3_smx:INFO: Total # of broken channels: 0
13:10:11:ST3_smx:INFO: List of broken channels: []
13:10:12:ST3_smx:INFO: chip: 7-6 37.726682 C 1200.969315 mV
13:10:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:10:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:10:12:ST3_smx:INFO: Electrons
13:10:12:ST3_smx:INFO: # loops 0
13:10:14:ST3_smx:INFO: # loops 1
13:10:16:ST3_smx:INFO: # loops 2
13:10:18:ST3_smx:INFO: Total # of broken channels: 0
13:10:18:ST3_smx:INFO: List of broken channels: []
13:10:18:ST3_smx:INFO: Total # of broken channels: 0
13:10:18:ST3_smx:INFO: List of broken channels: []
13:10:19:ST3_smx:INFO: chip: 14-7 37.726682 C 1189.190035 mV
13:10:19:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:10:19:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:10:19:ST3_smx:INFO: Electrons
13:10:19:ST3_smx:INFO: # loops 0
13:10:21:ST3_smx:INFO: # loops 1
13:10:22:ST3_smx:INFO: # loops 2
13:10:24:ST3_smx:INFO: Total # of broken channels: 0
13:10:24:ST3_smx:INFO: List of broken channels: []
13:10:24:ST3_smx:INFO: Total # of broken channels: 0
13:10:24:ST3_smx:INFO: List of broken channels: []
13:10:24:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:10:24:febtest:INFO: 01-00 | XA-000-09-004-004-010-009-00 | 56.8 | 1159.7
13:10:25:febtest:INFO: 08-01 | XA-000-09-004-004-010-013-00 | 53.6 | 1177.4
13:10:25:febtest:INFO: 03-02 | XA-000-09-004-004-010-010-00 | 50.4 | 1183.3
13:10:25:febtest:INFO: 10-03 | XA-000-09-004-006-005-009-13 | 47.3 | 1189.2
13:10:25:febtest:INFO: 05-04 | XA-000-09-004-004-010-011-00 | 53.6 | 1159.7
13:10:25:febtest:INFO: 12-05 | XA-000-09-004-006-005-010-13 | 34.6 | 1288.7
13:10:26:febtest:INFO: 07-06 | XA-000-09-004-004-010-012-00 | 37.7 | 1218.6
13:10:26:febtest:INFO: 14-07 | XA-000-09-004-006-005-011-13 | 37.7 | 1206.9
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_11_15-13_08_58
OPERATOR : Benjamin;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3095| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.5590', '1.850', '2.5750', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9740', '1.850', '2.4580', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9740', '1.850', '0.5299', '0.000', '0.0000', '0.000', '0.0000']