
FEB_3098 15.01.25 11:12:07
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11:12:07:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 11:12:07:ST3_Shared:INFO: FEB-Microcable 11:12:07:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 11:12:07:febtest:INFO: Testing FEB with SN 3098 11:12:09:smx_tester:INFO: Scanning setup 11:12:09:elinks:INFO: Disabling clock on downlink 0 11:12:09:elinks:INFO: Disabling clock on downlink 1 11:12:09:elinks:INFO: Disabling clock on downlink 2 11:12:09:elinks:INFO: Disabling clock on downlink 3 11:12:09:elinks:INFO: Disabling clock on downlink 4 11:12:09:setup_element:INFO: Checking SOS, encoding_mode: SOS 11:12:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 11:12:09:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 11:12:09:elinks:INFO: Disabling clock on downlink 0 11:12:09:elinks:INFO: Disabling clock on downlink 1 11:12:09:elinks:INFO: Disabling clock on downlink 2 11:12:09:elinks:INFO: Disabling clock on downlink 3 11:12:09:elinks:INFO: Disabling clock on downlink 4 11:12:09:setup_element:INFO: Checking SOS, encoding_mode: SOS 11:12:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 11:12:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8 11:12:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9 11:12:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10 11:12:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11 11:12:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12 11:12:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13 11:12:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14 11:12:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15 11:12:09:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 11:12:09:elinks:INFO: Disabling clock on downlink 0 11:12:09:elinks:INFO: Disabling clock on downlink 1 11:12:09:elinks:INFO: Disabling clock on downlink 2 11:12:09:elinks:INFO: Disabling clock on downlink 3 11:12:09:elinks:INFO: Disabling clock on downlink 4 11:12:09:setup_element:INFO: Checking SOS, encoding_mode: SOS 11:12:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 11:12:09:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 11:12:09:elinks:INFO: Disabling clock on downlink 0 11:12:09:elinks:INFO: Disabling clock on downlink 1 11:12:09:elinks:INFO: Disabling clock on downlink 2 11:12:09:elinks:INFO: Disabling clock on downlink 3 11:12:09:elinks:INFO: Disabling clock on downlink 4 11:12:09:setup_element:INFO: Checking SOS, encoding_mode: SOS 11:12:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 11:12:09:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 11:12:09:elinks:INFO: Disabling clock on downlink 0 11:12:09:elinks:INFO: Disabling clock on downlink 1 11:12:09:elinks:INFO: Disabling clock on downlink 2 11:12:09:elinks:INFO: Disabling clock on downlink 3 11:12:09:elinks:INFO: Disabling clock on downlink 4 11:12:09:setup_element:INFO: Checking SOS, encoding_mode: SOS 11:12:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 11:12:10:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 11:12:10:setup_element:INFO: Scanning clock phase 11:12:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 11:12:10:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 11:12:10:setup_element:INFO: Clock phase scan results for group 0, downlink 1 11:12:10:setup_element:INFO: Eye window for uplink 8 : ________________________________________________________________________XXXXX___ Clock Delay: 34 11:12:10:setup_element:INFO: Eye window for uplink 9 : ________________________________________________________________________XXXXX___ Clock Delay: 34 11:12:10:setup_element:INFO: Eye window for uplink 10: _______________________________________________________________________XXXXXX___ Clock Delay: 33 11:12:10:setup_element:INFO: Eye window for uplink 11: _______________________________________________________________________XXXXXX___ Clock Delay: 33 11:12:10:setup_element:INFO: Eye window for uplink 12: ________________________________________________________________________XXXXXX__ Clock Delay: 34 11:12:10:setup_element:INFO: Eye window for uplink 13: ________________________________________________________________________XXXXXX__ Clock Delay: 34 11:12:10:setup_element:INFO: Eye window for uplink 14: _________________________________________________________________________XXXXXX_ Clock Delay: 35 11:12:10:setup_element:INFO: Eye window for uplink 15: _________________________________________________________________________XXXXXX_ Clock Delay: 35 11:12:10:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 1 11:12:10:setup_element:INFO: Scanning data phases 11:12:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 11:12:10:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 11:12:15:setup_element:INFO: Data phase scan results for group 0, downlink 1 11:12:15:setup_element:INFO: Eye window for uplink 8 : _________________________XXXXX__________ Data delay found: 7 11:12:15:setup_element:INFO: Eye window for uplink 9 : _____________________________XXXXX______ Data delay found: 11 11:12:15:setup_element:INFO: Eye window for uplink 10: ____________________________XXXXX_______ Data delay found: 10 11:12:15:setup_element:INFO: Eye window for uplink 11: _______________________________XXXXX____ Data delay found: 13 11:12:15:setup_element:INFO: Eye window for uplink 12: _______________________________XXXX_____ Data delay found: 12 11:12:15:setup_element:INFO: Eye window for uplink 13: __________________________________XXXX__ Data delay found: 15 11:12:15:setup_element:INFO: Eye window for uplink 14: _______________________________XXXXX____ Data delay found: 13 11:12:15:setup_element:INFO: Eye window for uplink 15: _________________________________XXXXX__ Data delay found: 15 11:12:15:setup_element:INFO: Setting the data phase to 7 for uplink 8 11:12:15:setup_element:INFO: Setting the data phase to 11 for uplink 9 11:12:15:setup_element:INFO: Setting the data phase to 10 for uplink 10 11:12:15:setup_element:INFO: Setting the data phase to 13 for uplink 11 11:12:15:setup_element:INFO: Setting the data phase to 12 for uplink 12 11:12:15:setup_element:INFO: Setting the data phase to 15 for uplink 13 11:12:15:setup_element:INFO: Setting the data phase to 13 for uplink 14 11:12:15:setup_element:INFO: Setting the data phase to 15 for uplink 15 11:12:15:setup_element:INFO: Beginning SMX ASICs map scan 11:12:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 11:12:15:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 11:12:15:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 11:12:15:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 11:12:15:uplink:INFO: Setting uplinks mask [8, 9, 10, 11, 12, 13, 14, 15] 11:12:15:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8 11:12:15:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9 11:12:16:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10 11:12:16:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11 11:12:16:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12 11:12:16:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13 11:12:16:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14 11:12:16:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15 11:12:18:setup_element:INFO: Performing Elink synchronization 11:12:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 11:12:18:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 11:12:18:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 11:12:18:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 11:12:18:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1 11:12:18:uplink:INFO: Enabling uplinks [8, 9, 10, 11, 12, 13, 14, 15] |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)] 3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)] 5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)] 7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)] |_________________________________________________________________________| 11:12:18:febtest:INFO: Init all SMX (CSA): 30 11:12:26:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 11:12:27:febtest:INFO: 08-01 | XA-000-09-004-006-008-018-13 | 40.9 | 1153.7 11:12:27:febtest:INFO: 10-03 | XA-000-09-004-006-009-018-00 | 40.9 | 1147.8 11:12:27:febtest:INFO: 12-05 | XA-000-09-004-006-007-019-09 | 50.4 | 1112.1 11:12:27:febtest:INFO: 14-07 | XA-000-09-004-006-008-019-13 | 37.7 | 1153.7 11:12:28:febtest:INFO: Set all CSA to ZERO FEB type: A FEB_A: 1 FEB_B: 0 11:12:30:ST3_smx:INFO: chip: 8-1 40.898880 C 1159.654860 mV 11:12:30:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:12:30:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:12:30:ST3_smx:INFO: Electrons 11:12:30:ST3_smx:INFO: # loops 0 11:12:32:ST3_smx:INFO: # loops 1 11:12:33:ST3_smx:INFO: # loops 2 11:12:35:ST3_smx:INFO: Total # of broken channels: 0 11:12:35:ST3_smx:INFO: List of broken channels: [] 11:12:35:ST3_smx:INFO: Total # of broken channels: 0 11:12:35:ST3_smx:INFO: List of broken channels: [] 11:12:37:ST3_smx:INFO: chip: 10-3 40.898880 C 1159.654860 mV 11:12:37:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:12:37:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:12:37:ST3_smx:INFO: Electrons 11:12:37:ST3_smx:INFO: # loops 0 11:12:38:ST3_smx:INFO: # loops 1 11:12:40:ST3_smx:INFO: # loops 2 11:12:41:ST3_smx:INFO: Total # of broken channels: 0 11:12:41:ST3_smx:INFO: List of broken channels: [] 11:12:41:ST3_smx:INFO: Total # of broken channels: 10 11:12:41:ST3_smx:INFO: List of broken channels: [5, 7, 9, 11, 13, 17, 19, 21, 23, 27] 11:12:43:ST3_smx:INFO: chip: 12-5 53.612520 C 1124.048640 mV 11:12:43:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:12:43:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:12:43:ST3_smx:INFO: Electrons 11:12:43:ST3_smx:INFO: # loops 0 11:12:45:ST3_smx:INFO: # loops 1 11:12:46:ST3_smx:INFO: # loops 2 11:12:48:ST3_smx:INFO: Total # of broken channels: 0 11:12:48:ST3_smx:INFO: List of broken channels: [] 11:12:48:ST3_smx:INFO: Total # of broken channels: 11 11:12:48:ST3_smx:INFO: List of broken channels: [7, 9, 15, 17, 19, 21, 23, 25, 27, 39, 87] 11:12:49:ST3_smx:INFO: chip: 14-7 40.898880 C 1165.571835 mV 11:12:49:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:12:49:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:12:49:ST3_smx:INFO: Electrons 11:12:49:ST3_smx:INFO: # loops 0 11:12:51:ST3_smx:INFO: # loops 1 11:12:52:ST3_smx:INFO: # loops 2 11:12:54:ST3_smx:INFO: Total # of broken channels: 0 11:12:54:ST3_smx:INFO: List of broken channels: [] 11:12:54:ST3_smx:INFO: Total # of broken channels: 0 11:12:54:ST3_smx:INFO: List of broken channels: [] 11:12:54:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 11:12:54:febtest:INFO: 08-01 | XA-000-09-004-006-008-018-13 | 40.9 | 1183.3 11:12:55:febtest:INFO: 10-03 | XA-000-09-004-006-009-018-00 | 44.1 | 1177.4 11:12:55:febtest:INFO: 12-05 | XA-000-09-004-006-007-019-09 | 53.6 | 1141.9 11:12:55:febtest:INFO: 14-07 | XA-000-09-004-006-008-019-13 | 40.9 | 1183.3 ############################################################ # S U M M A R Y # ############################################################ {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 25_01_15-11_12_07 OPERATOR : Alois Alzheimer SITE : KIT | SETUP : KIT_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 3098| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['2.450', '0.8126', '1.850', '1.2720', '0.000', '0.0000', '0.000', '0.0000'] VI_after__Init : ['2.450', '1.0410', '1.850', '1.1010', '0.000', '0.0000', '0.000', '0.0000'] VI_at__the_End : ['2.450', '1.0070', '1.850', '0.2721', '0.000', '0.0000', '0.000', '0.0000']