FEB_3101 30.04.25 12:42:30
Info
12:42:30:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:42:30:ST3_Shared:INFO: FEB-Microcable
12:42:30:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:42:30:febtest:INFO: Testing FEB with SN 3101
12:42:32:smx_tester:INFO: Scanning setup
12:42:32:elinks:INFO: Disabling clock on downlink 0
12:42:32:elinks:INFO: Disabling clock on downlink 1
12:42:32:elinks:INFO: Disabling clock on downlink 2
12:42:32:elinks:INFO: Disabling clock on downlink 3
12:42:32:elinks:INFO: Disabling clock on downlink 4
12:42:32:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:42:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
12:42:32:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:42:32:elinks:INFO: Disabling clock on downlink 0
12:42:32:elinks:INFO: Disabling clock on downlink 1
12:42:32:elinks:INFO: Disabling clock on downlink 2
12:42:32:elinks:INFO: Disabling clock on downlink 3
12:42:32:elinks:INFO: Disabling clock on downlink 4
12:42:32:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:42:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
12:42:32:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
12:42:32:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
12:42:32:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
12:42:32:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
12:42:32:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
12:42:32:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
12:42:32:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
12:42:32:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
12:42:32:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
12:42:32:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
12:42:32:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
12:42:32:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
12:42:32:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
12:42:32:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
12:42:32:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
12:42:32:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
12:42:32:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:42:32:elinks:INFO: Disabling clock on downlink 0
12:42:32:elinks:INFO: Disabling clock on downlink 1
12:42:32:elinks:INFO: Disabling clock on downlink 2
12:42:32:elinks:INFO: Disabling clock on downlink 3
12:42:32:elinks:INFO: Disabling clock on downlink 4
12:42:32:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:42:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
12:42:33:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:42:33:elinks:INFO: Disabling clock on downlink 0
12:42:33:elinks:INFO: Disabling clock on downlink 1
12:42:33:elinks:INFO: Disabling clock on downlink 2
12:42:33:elinks:INFO: Disabling clock on downlink 3
12:42:33:elinks:INFO: Disabling clock on downlink 4
12:42:33:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:42:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
12:42:33:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:42:33:elinks:INFO: Disabling clock on downlink 0
12:42:33:elinks:INFO: Disabling clock on downlink 1
12:42:33:elinks:INFO: Disabling clock on downlink 2
12:42:33:elinks:INFO: Disabling clock on downlink 3
12:42:33:elinks:INFO: Disabling clock on downlink 4
12:42:33:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:42:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
12:42:33:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:42:33:setup_element:INFO: Scanning clock phase
12:42:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
12:42:33:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
12:42:33:setup_element:INFO: Clock phase scan results for group 0, downlink 1
12:42:33:setup_element:INFO: Eye window for uplink 0 : XXXXXXXXXXXXXXXXXXXX_XX____________________________________________________XXXXX
Clock Delay: 48
12:42:33:setup_element:INFO: Eye window for uplink 1 : XXXXXXXXXXXXXXXXXXXX_XX____________________________________________________XXXXX
Clock Delay: 48
12:42:33:setup_element:INFO: Eye window for uplink 2 : XXXXXXXXXXXXXXXXXXXX_X___________________________________________________X_X____
Clock Delay: 47
12:42:33:setup_element:INFO: Eye window for uplink 3 : XXXXXXXXXXXXXXXXXXXX_X___________________________________________________X_X____
Clock Delay: 47
12:42:33:setup_element:INFO: Eye window for uplink 4 : XXXXXXXXXXXXXXXXX_______________________________________________________XXXXXXXX
Clock Delay: 44
12:42:33:setup_element:INFO: Eye window for uplink 5 : XXXXXXXXXXXXXXXXX_______________________________________________________XXXXXXXX
Clock Delay: 44
12:42:33:setup_element:INFO: Eye window for uplink 6 : XXXXXXX___________________________________________________________________XXXXXX
Clock Delay: 40
12:42:33:setup_element:INFO: Eye window for uplink 7 : XXXXXXX___________________________________________________________________XXXXXX
Clock Delay: 40
12:42:33:setup_element:INFO: Eye window for uplink 8 : XXXXXXXX________________________________________________________________XXXXXXXX
Clock Delay: 39
12:42:33:setup_element:INFO: Eye window for uplink 9 : XXXXXXXX________________________________________________________________XXXXXXXX
Clock Delay: 39
12:42:33:setup_element:INFO: Eye window for uplink 10: XXXXX___________________________________________________________________XXXXXXXX
Clock Delay: 38
12:42:33:setup_element:INFO: Eye window for uplink 11: XXXXX___________________________________________________________________XXXXXXXX
Clock Delay: 38
12:42:33:setup_element:INFO: Eye window for uplink 12: XXXXXX________________________________________________________________XXXXXXXXXX
Clock Delay: 37
12:42:33:setup_element:INFO: Eye window for uplink 13: XXXXXX________________________________________________________________XXXXXXXXXX
Clock Delay: 37
12:42:33:setup_element:INFO: Eye window for uplink 14: XXXXXXXXXXX_____________________________________________________________XXXXXXXX
Clock Delay: 41
12:42:33:setup_element:INFO: Eye window for uplink 15: XXXXXXXXXXX_____________________________________________________________XXXXXXXX
Clock Delay: 41
12:42:33:setup_element:INFO: Setting the clock phase to 46 for group 0, downlink 1
12:42:33:setup_element:INFO: Scanning data phases
12:42:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
12:42:33:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
12:42:38:setup_element:INFO: Data phase scan results for group 0, downlink 1
12:42:38:setup_element:INFO: Eye window for uplink 0 : XXXXX_______________________________XXXX
Data delay found: 20
12:42:38:setup_element:INFO: Eye window for uplink 1 : __________________________________XXXXXX
Data delay found: 16
12:42:38:setup_element:INFO: Eye window for uplink 2 : X_________XXXXXXXXXXXXXXXXXXXXX_XXXXXXXX
Data delay found: 5
12:42:38:setup_element:INFO: Eye window for uplink 3 : __________XXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 4
12:42:38:setup_element:INFO: Eye window for uplink 4 : ____________________________XXXXXX______
Data delay found: 10
12:42:38:setup_element:INFO: Eye window for uplink 5 : ________________________XXXXXXX_________
Data delay found: 7
12:42:38:setup_element:INFO: Eye window for uplink 6 : ___________________________XXXXXX_______
Data delay found: 9
12:42:38:setup_element:INFO: Eye window for uplink 7 : _______________________XXXXXX___________
Data delay found: 5
12:42:38:setup_element:INFO: Eye window for uplink 8 : __________XXXXXXX_______________________
Data delay found: 33
12:42:38:setup_element:INFO: Eye window for uplink 9 : ________________XXXXXXX_________________
Data delay found: 39
12:42:38:setup_element:INFO: Eye window for uplink 10: _________XXXXXXX________________________
Data delay found: 32
12:42:38:setup_element:INFO: Eye window for uplink 11: ____________XXXXXXXX____________________
Data delay found: 35
12:42:38:setup_element:INFO: Eye window for uplink 12: _______XXXXXXXXXX_______________________
Data delay found: 31
12:42:38:setup_element:INFO: Eye window for uplink 13: _______XXXXXXXXXXXX_____________________
Data delay found: 32
12:42:38:setup_element:INFO: Eye window for uplink 14: ___________XXXXXXXXXX___________________
Data delay found: 35
12:42:38:setup_element:INFO: Eye window for uplink 15: ___________X_XXXXXXXXXX_________________
Data delay found: 36
12:42:38:setup_element:INFO: Setting the data phase to 20 for uplink 0
12:42:38:setup_element:INFO: Setting the data phase to 16 for uplink 1
12:42:38:setup_element:INFO: Setting the data phase to 5 for uplink 2
12:42:39:setup_element:INFO: Setting the data phase to 4 for uplink 3
12:42:39:setup_element:INFO: Setting the data phase to 10 for uplink 4
12:42:39:setup_element:INFO: Setting the data phase to 7 for uplink 5
12:42:39:setup_element:INFO: Setting the data phase to 9 for uplink 6
12:42:39:setup_element:INFO: Setting the data phase to 5 for uplink 7
12:42:39:setup_element:INFO: Setting the data phase to 33 for uplink 8
12:42:39:setup_element:INFO: Setting the data phase to 39 for uplink 9
12:42:39:setup_element:INFO: Setting the data phase to 32 for uplink 10
12:42:39:setup_element:INFO: Setting the data phase to 35 for uplink 11
12:42:39:setup_element:INFO: Setting the data phase to 31 for uplink 12
12:42:39:setup_element:INFO: Setting the data phase to 32 for uplink 13
12:42:39:setup_element:INFO: Setting the data phase to 35 for uplink 14
12:42:39:setup_element:INFO: Setting the data phase to 36 for uplink 15
12:42:39:setup_element:INFO: Beginning SMX ASICs map scan
12:42:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
12:42:39:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
12:42:39:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
12:42:39:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
12:42:39:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
12:42:39:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
12:42:39:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
12:42:39:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
12:42:39:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
12:42:39:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
12:42:39:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
12:42:39:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
12:42:39:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
12:42:39:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
12:42:39:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
12:42:40:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
12:42:40:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
12:42:40:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
12:42:40:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
12:42:40:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
12:42:40:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
12:42:41:setup_element:INFO: Performing Elink synchronization
12:42:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
12:42:41:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
12:42:41:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
12:42:41:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
12:42:41:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
12:42:41:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
12:42:42:febtest:INFO: Init all SMX (CSA): 30
12:43:02:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
12:43:02:febtest:INFO: 01-00 | XA-000-09-004-020-006-014-05 | 31.4 | 1189.2
12:43:02:febtest:INFO: 08-01 | XA-000-09-004-020-003-013-14 | 40.9 | 1147.8
12:43:02:febtest:INFO: 03-02 | XA-000-09-004-020-006-013-05 | 37.7 | 1171.5
12:43:03:febtest:INFO: 10-03 | XA-000-09-004-020-015-012-04 | 34.6 | 1171.5
12:43:03:febtest:INFO: 05-04 | XA-000-09-004-020-012-015-10 | 44.1 | 1141.9
12:43:03:febtest:INFO: 12-05 | XA-000-09-004-020-012-012-10 | 31.4 | 1183.3
12:43:03:febtest:INFO: 07-06 | XA-000-09-004-020-003-014-14 | 28.2 | 1195.1
12:43:03:febtest:INFO: 14-07 | XA-000-09-004-020-012-011-10 | 37.7 | 1171.5
12:43:04:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
12:43:06:ST3_smx:INFO: chip: 1-0 31.389742 C 1200.969315 mV
12:43:06:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:43:06:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:43:06:ST3_smx:INFO: Electrons
12:43:06:ST3_smx:INFO: # loops 0
12:43:09:ST3_smx:INFO: # loops 1
12:43:11:ST3_smx:INFO: # loops 2
12:43:13:ST3_smx:INFO: Total # of broken channels: 0
12:43:13:ST3_smx:INFO: List of broken channels: []
12:43:13:ST3_smx:INFO: Total # of broken channels: 0
12:43:13:ST3_smx:INFO: List of broken channels: []
12:43:15:ST3_smx:INFO: chip: 8-1 40.898880 C 1159.654860 mV
12:43:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:43:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:43:15:ST3_smx:INFO: Electrons
12:43:15:ST3_smx:INFO: # loops 0
12:43:17:ST3_smx:INFO: # loops 1
12:43:19:ST3_smx:INFO: # loops 2
12:43:21:ST3_smx:INFO: Total # of broken channels: 0
12:43:21:ST3_smx:INFO: List of broken channels: []
12:43:21:ST3_smx:INFO: Total # of broken channels: 0
12:43:21:ST3_smx:INFO: List of broken channels: []
12:43:22:ST3_smx:INFO: chip: 3-2 37.726682 C 1183.292940 mV
12:43:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:43:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:43:22:ST3_smx:INFO: Electrons
12:43:22:ST3_smx:INFO: # loops 0
12:43:24:ST3_smx:INFO: # loops 1
12:43:26:ST3_smx:INFO: # loops 2
12:43:28:ST3_smx:INFO: Total # of broken channels: 0
12:43:28:ST3_smx:INFO: List of broken channels: []
12:43:28:ST3_smx:INFO: Total # of broken channels: 0
12:43:28:ST3_smx:INFO: List of broken channels: []
12:43:30:ST3_smx:INFO: chip: 10-3 34.556970 C 1183.292940 mV
12:43:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:43:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:43:30:ST3_smx:INFO: Electrons
12:43:30:ST3_smx:INFO: # loops 0
12:43:32:ST3_smx:INFO: # loops 1
12:43:34:ST3_smx:INFO: # loops 2
12:43:36:ST3_smx:INFO: Total # of broken channels: 0
12:43:36:ST3_smx:INFO: List of broken channels: []
12:43:36:ST3_smx:INFO: Total # of broken channels: 0
12:43:36:ST3_smx:INFO: List of broken channels: []
12:43:38:ST3_smx:INFO: chip: 5-4 44.073563 C 1147.806000 mV
12:43:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:43:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:43:38:ST3_smx:INFO: Electrons
12:43:38:ST3_smx:INFO: # loops 0
12:43:40:ST3_smx:INFO: # loops 1
12:43:42:ST3_smx:INFO: # loops 2
12:43:44:ST3_smx:INFO: Total # of broken channels: 0
12:43:44:ST3_smx:INFO: List of broken channels: []
12:43:44:ST3_smx:INFO: Total # of broken channels: 0
12:43:44:ST3_smx:INFO: List of broken channels: []
12:43:45:ST3_smx:INFO: chip: 12-5 31.389742 C 1200.969315 mV
12:43:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:43:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:43:45:ST3_smx:INFO: Electrons
12:43:45:ST3_smx:INFO: # loops 0
12:43:48:ST3_smx:INFO: # loops 1
12:43:50:ST3_smx:INFO: # loops 2
12:43:52:ST3_smx:INFO: Total # of broken channels: 0
12:43:52:ST3_smx:INFO: List of broken channels: []
12:43:52:ST3_smx:INFO: Total # of broken channels: 0
12:43:52:ST3_smx:INFO: List of broken channels: []
12:43:53:ST3_smx:INFO: chip: 7-6 28.225000 C 1206.851500 mV
12:43:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:43:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:43:53:ST3_smx:INFO: Electrons
12:43:53:ST3_smx:INFO: # loops 0
12:43:55:ST3_smx:INFO: # loops 1
12:43:57:ST3_smx:INFO: # loops 2
12:43:59:ST3_smx:INFO: Total # of broken channels: 0
12:43:59:ST3_smx:INFO: List of broken channels: []
12:43:59:ST3_smx:INFO: Total # of broken channels: 0
12:43:59:ST3_smx:INFO: List of broken channels: []
12:44:01:ST3_smx:INFO: chip: 14-7 37.726682 C 1183.292940 mV
12:44:01:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:44:01:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:44:01:ST3_smx:INFO: Electrons
12:44:01:ST3_smx:INFO: # loops 0
12:44:03:ST3_smx:INFO: # loops 1
12:44:05:ST3_smx:INFO: # loops 2
12:44:07:ST3_smx:INFO: Total # of broken channels: 0
12:44:07:ST3_smx:INFO: List of broken channels: []
12:44:07:ST3_smx:INFO: Total # of broken channels: 0
12:44:07:ST3_smx:INFO: List of broken channels: []
12:44:07:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
12:44:07:febtest:INFO: 01-00 | XA-000-09-004-020-006-014-05 | 31.4 | 1218.6
12:44:08:febtest:INFO: 08-01 | XA-000-09-004-020-003-013-14 | 40.9 | 1183.3
12:44:08:febtest:INFO: 03-02 | XA-000-09-004-020-006-013-05 | 37.7 | 1201.0
12:44:08:febtest:INFO: 10-03 | XA-000-09-004-020-015-012-04 | 34.6 | 1206.9
12:44:08:febtest:INFO: 05-04 | XA-000-09-004-020-012-015-10 | 47.3 | 1165.6
12:44:08:febtest:INFO: 12-05 | XA-000-09-004-020-012-012-10 | 34.6 | 1218.6
12:44:09:febtest:INFO: 07-06 | XA-000-09-004-020-003-014-14 | 31.4 | 1224.5
12:44:09:febtest:INFO: 14-07 | XA-000-09-004-020-012-011-10 | 37.7 | 1206.9
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_04_30-12_42_30
OPERATOR : Benjamin;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3101| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.4710', '1.852', '2.4190', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9790', '1.850', '2.3480', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9650', '1.850', '0.5349', '0.000', '0.0000', '0.000', '0.0000']