FEB_3105 29.04.25 09:59:38
Info
09:59:38:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:59:38:ST3_Shared:INFO: FEB-Microcable
09:59:38:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:59:38:febtest:INFO: Testing FEB with SN 3105
09:59:40:smx_tester:INFO: Scanning setup
09:59:40:elinks:INFO: Disabling clock on downlink 0
09:59:40:elinks:INFO: Disabling clock on downlink 1
09:59:40:elinks:INFO: Disabling clock on downlink 2
09:59:40:elinks:INFO: Disabling clock on downlink 3
09:59:40:elinks:INFO: Disabling clock on downlink 4
09:59:40:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:59:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:59:40:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:59:40:elinks:INFO: Disabling clock on downlink 0
09:59:40:elinks:INFO: Disabling clock on downlink 1
09:59:40:elinks:INFO: Disabling clock on downlink 2
09:59:40:elinks:INFO: Disabling clock on downlink 3
09:59:40:elinks:INFO: Disabling clock on downlink 4
09:59:40:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:59:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:59:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
09:59:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
09:59:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
09:59:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
09:59:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
09:59:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
09:59:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
09:59:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
09:59:40:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:59:40:elinks:INFO: Disabling clock on downlink 0
09:59:40:elinks:INFO: Disabling clock on downlink 1
09:59:40:elinks:INFO: Disabling clock on downlink 2
09:59:40:elinks:INFO: Disabling clock on downlink 3
09:59:40:elinks:INFO: Disabling clock on downlink 4
09:59:40:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:59:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:59:40:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:59:40:elinks:INFO: Disabling clock on downlink 0
09:59:40:elinks:INFO: Disabling clock on downlink 1
09:59:40:elinks:INFO: Disabling clock on downlink 2
09:59:40:elinks:INFO: Disabling clock on downlink 3
09:59:40:elinks:INFO: Disabling clock on downlink 4
09:59:40:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:59:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
09:59:41:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:59:41:elinks:INFO: Disabling clock on downlink 0
09:59:41:elinks:INFO: Disabling clock on downlink 1
09:59:41:elinks:INFO: Disabling clock on downlink 2
09:59:41:elinks:INFO: Disabling clock on downlink 3
09:59:41:elinks:INFO: Disabling clock on downlink 4
09:59:41:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:59:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
09:59:41:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:59:41:setup_element:INFO: Scanning clock phase
09:59:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:59:41:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:59:41:setup_element:INFO: Clock phase scan results for group 0, downlink 1
09:59:41:setup_element:INFO: Eye window for uplink 8 : XXXXXX________________________________________________________________X_XXXXXXXX
Clock Delay: 37
09:59:41:setup_element:INFO: Eye window for uplink 9 : XXXXXX________________________________________________________________X_XXXXXXXX
Clock Delay: 37
09:59:41:setup_element:INFO: Eye window for uplink 10: XXXXXXXX_________________________________________________________________XXXXXXX
Clock Delay: 40
09:59:41:setup_element:INFO: Eye window for uplink 11: XXXXXXXX_________________________________________________________________XXXXXXX
Clock Delay: 40
09:59:41:setup_element:INFO: Eye window for uplink 12: XXXXXXXXX________________________________________________________________XXXXXXX
Clock Delay: 40
09:59:41:setup_element:INFO: Eye window for uplink 13: XXXXXXXXX________________________________________________________________XXXXXXX
Clock Delay: 40
09:59:41:setup_element:INFO: Eye window for uplink 14: XXXXXXXXX_____________________________________________________________XXXXXXXXXX
Clock Delay: 39
09:59:41:setup_element:INFO: Eye window for uplink 15: XXXXXXXXX_____________________________________________________________XXXXXXXXXX
Clock Delay: 39
09:59:41:setup_element:INFO: Setting the clock phase to 39 for group 0, downlink 1
09:59:41:setup_element:INFO: Scanning data phases
09:59:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:59:41:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:59:46:setup_element:INFO: Data phase scan results for group 0, downlink 1
09:59:46:setup_element:INFO: Eye window for uplink 8 : _________________XXXXXXXX_______________
Data delay found: 0
09:59:46:setup_element:INFO: Eye window for uplink 9 : _______________________XXXXXXX__________
Data delay found: 6
09:59:46:setup_element:INFO: Eye window for uplink 10: ______________________X__XXXXXXX________
Data delay found: 6
09:59:46:setup_element:INFO: Eye window for uplink 11: __________________________XXXXXXXXX_____
Data delay found: 10
09:59:46:setup_element:INFO: Eye window for uplink 12: __________________________XXXXXXX_______
Data delay found: 9
09:59:46:setup_element:INFO: Eye window for uplink 13: ______________________________XXXXXXX___
Data delay found: 13
09:59:46:setup_element:INFO: Eye window for uplink 14: _____________________XXXXXXXX___________
Data delay found: 4
09:59:46:setup_element:INFO: Eye window for uplink 15: _________________________XXXXXXX________
Data delay found: 8
09:59:46:setup_element:INFO: Setting the data phase to 0 for uplink 8
09:59:46:setup_element:INFO: Setting the data phase to 6 for uplink 9
09:59:46:setup_element:INFO: Setting the data phase to 6 for uplink 10
09:59:46:setup_element:INFO: Setting the data phase to 10 for uplink 11
09:59:46:setup_element:INFO: Setting the data phase to 9 for uplink 12
09:59:46:setup_element:INFO: Setting the data phase to 13 for uplink 13
09:59:46:setup_element:INFO: Setting the data phase to 4 for uplink 14
09:59:46:setup_element:INFO: Setting the data phase to 8 for uplink 15
09:59:46:setup_element:INFO: Beginning SMX ASICs map scan
09:59:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:59:46:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:59:46:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
09:59:46:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
09:59:46:uplink:INFO: Setting uplinks mask [8, 9, 10, 11, 12, 13, 14, 15]
09:59:46:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
09:59:46:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
09:59:47:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
09:59:47:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
09:59:47:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
09:59:47:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
09:59:47:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
09:59:47:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
09:59:49:setup_element:INFO: Performing Elink synchronization
09:59:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:59:49:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:59:49:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
09:59:49:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
09:59:49:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
09:59:49:uplink:INFO: Enabling uplinks [8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
09:59:49:febtest:INFO: Init all SMX (CSA): 30
09:59:56:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:59:56:febtest:INFO: 08-01 | XA-000-09-004-020-006-018-02 | 47.3 | 1130.0
09:59:56:febtest:INFO: 10-03 | XA-000-09-004-020-003-019-09 | 44.1 | 1141.9
09:59:57:febtest:INFO: 12-05 | XA-000-09-004-020-018-019-08 | 44.1 | 1130.0
09:59:57:febtest:INFO: 14-07 | XA-000-09-004-020-009-018-06 | 44.1 | 1135.9
09:59:58:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
10:00:00:ST3_smx:INFO: chip: 8-1 47.250730 C 1141.874115 mV
10:00:00:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:00:00:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:00:00:ST3_smx:INFO: Electrons
10:00:00:ST3_smx:INFO: # loops 0
10:00:01:ST3_smx:INFO: # loops 1
10:00:03:ST3_smx:INFO: # loops 2
10:00:04:ST3_smx:INFO: Total # of broken channels: 0
10:00:04:ST3_smx:INFO: List of broken channels: []
10:00:04:ST3_smx:INFO: Total # of broken channels: 0
10:00:04:ST3_smx:INFO: List of broken channels: []
10:00:06:ST3_smx:INFO: chip: 10-3 44.073563 C 1153.732915 mV
10:00:06:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:00:06:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:00:06:ST3_smx:INFO: Electrons
10:00:06:ST3_smx:INFO: # loops 0
10:00:07:ST3_smx:INFO: # loops 1
10:00:09:ST3_smx:INFO: # loops 2
10:00:10:ST3_smx:INFO: Total # of broken channels: 0
10:00:10:ST3_smx:INFO: List of broken channels: []
10:00:10:ST3_smx:INFO: Total # of broken channels: 0
10:00:10:ST3_smx:INFO: List of broken channels: []
10:00:12:ST3_smx:INFO: chip: 12-5 44.073563 C 1141.874115 mV
10:00:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:00:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:00:12:ST3_smx:INFO: Electrons
10:00:12:ST3_smx:INFO: # loops 0
10:00:13:ST3_smx:INFO: # loops 1
10:00:15:ST3_smx:INFO: # loops 2
10:00:16:ST3_smx:INFO: Total # of broken channels: 0
10:00:16:ST3_smx:INFO: List of broken channels: []
10:00:16:ST3_smx:INFO: Total # of broken channels: 0
10:00:16:ST3_smx:INFO: List of broken channels: []
10:00:18:ST3_smx:INFO: chip: 14-7 44.073563 C 1141.874115 mV
10:00:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:00:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:00:18:ST3_smx:INFO: Electrons
10:00:18:ST3_smx:INFO: # loops 0
10:00:20:ST3_smx:INFO: # loops 1
10:00:21:ST3_smx:INFO: # loops 2
10:00:23:ST3_smx:INFO: Total # of broken channels: 0
10:00:23:ST3_smx:INFO: List of broken channels: []
10:00:23:ST3_smx:INFO: Total # of broken channels: 0
10:00:23:ST3_smx:INFO: List of broken channels: []
10:00:23:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:00:23:febtest:INFO: 08-01 | XA-000-09-004-020-006-018-02 | 44.1 | 1165.6
10:00:24:febtest:INFO: 10-03 | XA-000-09-004-020-003-019-09 | 44.1 | 1171.5
10:00:24:febtest:INFO: 12-05 | XA-000-09-004-020-018-019-08 | 44.1 | 1165.6
10:00:24:febtest:INFO: 14-07 | XA-000-09-004-020-009-018-06 | 47.3 | 1165.6
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_04_29-09_59_38
OPERATOR : Henrik;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3105| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '0.7180', '1.850', '1.2340', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.0400', '1.850', '1.1760', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '0.9987', '1.850', '0.2737', '0.000', '0.0000', '0.000', '0.0000']