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FEB_3109 04.02.25 11:46:31
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11:46:31:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:46:31:ST3_Shared:INFO: FEB-Microcable
11:46:31:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:46:31:febtest:INFO: Testing FEB with SN 3109
11:46:33:smx_tester:INFO: Scanning setup
11:46:33:elinks:INFO: Disabling clock on downlink 0
11:46:33:elinks:INFO: Disabling clock on downlink 1
11:46:33:elinks:INFO: Disabling clock on downlink 2
11:46:33:elinks:INFO: Disabling clock on downlink 3
11:46:33:elinks:INFO: Disabling clock on downlink 4
11:46:33:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:46:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:46:33:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:46:33:elinks:INFO: Disabling clock on downlink 0
11:46:33:elinks:INFO: Disabling clock on downlink 1
11:46:33:elinks:INFO: Disabling clock on downlink 2
11:46:33:elinks:INFO: Disabling clock on downlink 3
11:46:33:elinks:INFO: Disabling clock on downlink 4
11:46:33:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:46:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:46:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
11:46:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
11:46:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
11:46:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
11:46:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
11:46:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
11:46:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
11:46:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
11:46:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
11:46:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
11:46:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
11:46:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
11:46:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
11:46:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
11:46:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
11:46:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
11:46:33:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:46:33:elinks:INFO: Disabling clock on downlink 0
11:46:33:elinks:INFO: Disabling clock on downlink 1
11:46:33:elinks:INFO: Disabling clock on downlink 2
11:46:33:elinks:INFO: Disabling clock on downlink 3
11:46:33:elinks:INFO: Disabling clock on downlink 4
11:46:33:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:46:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:46:33:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:46:33:elinks:INFO: Disabling clock on downlink 0
11:46:33:elinks:INFO: Disabling clock on downlink 1
11:46:33:elinks:INFO: Disabling clock on downlink 2
11:46:33:elinks:INFO: Disabling clock on downlink 3
11:46:33:elinks:INFO: Disabling clock on downlink 4
11:46:33:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:46:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
11:46:33:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:46:33:elinks:INFO: Disabling clock on downlink 0
11:46:33:elinks:INFO: Disabling clock on downlink 1
11:46:33:elinks:INFO: Disabling clock on downlink 2
11:46:33:elinks:INFO: Disabling clock on downlink 3
11:46:33:elinks:INFO: Disabling clock on downlink 4
11:46:33:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:46:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
11:46:34:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:46:34:setup_element:INFO: Scanning clock phase
11:46:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:46:34:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:46:34:setup_element:INFO: Clock phase scan results for group 0, downlink 1
11:46:34:setup_element:INFO: Eye window for uplink 0 : XX_________________________________________________________________________XXXXX
Clock Delay: 38
11:46:34:setup_element:INFO: Eye window for uplink 1 : XX_________________________________________________________________________XXXXX
Clock Delay: 38
11:46:34:setup_element:INFO: Eye window for uplink 2 : __________________________________________________________________________XXXXXX
Clock Delay: 36
11:46:34:setup_element:INFO: Eye window for uplink 3 : __________________________________________________________________________XXXXXX
Clock Delay: 36
11:46:34:setup_element:INFO: Eye window for uplink 4 : __________________________________________________________________________XXXX__
Clock Delay: 35
11:46:34:setup_element:INFO: Eye window for uplink 5 : __________________________________________________________________________XXXX__
Clock Delay: 35
11:46:34:setup_element:INFO: Eye window for uplink 6 : __________________________________________________________________________XXXXX_
Clock Delay: 36
11:46:34:setup_element:INFO: Eye window for uplink 7 : __________________________________________________________________________XXXXX_
Clock Delay: 36
11:46:34:setup_element:INFO: Eye window for uplink 8 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
11:46:34:setup_element:INFO: Eye window for uplink 9 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
11:46:34:setup_element:INFO: Eye window for uplink 10: _________________________________________________________________________XXXXXX_
Clock Delay: 35
11:46:34:setup_element:INFO: Eye window for uplink 11: _________________________________________________________________________XXXXXX_
Clock Delay: 35
11:46:34:setup_element:INFO: Eye window for uplink 12: _________________________________________________________________________XXXXX__
Clock Delay: 35
11:46:34:setup_element:INFO: Eye window for uplink 13: _________________________________________________________________________XXXXX__
Clock Delay: 35
11:46:34:setup_element:INFO: Eye window for uplink 14: __________________________________________________________________________XXXXX_
Clock Delay: 36
11:46:34:setup_element:INFO: Eye window for uplink 15: __________________________________________________________________________XXXXX_
Clock Delay: 36
11:46:34:setup_element:INFO: Setting the clock phase to 37 for group 0, downlink 1
11:46:34:setup_element:INFO: Scanning data phases
11:46:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:46:34:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:46:39:setup_element:INFO: Data phase scan results for group 0, downlink 1
11:46:39:setup_element:INFO: Eye window for uplink 0 : __________XXXXX_________________________
Data delay found: 32
11:46:39:setup_element:INFO: Eye window for uplink 1 : ______XXXXX_____________________________
Data delay found: 28
11:46:39:setup_element:INFO: Eye window for uplink 2 : ____XXXXX_______________________________
Data delay found: 26
11:46:39:setup_element:INFO: Eye window for uplink 3 : _XXXXX__________________________________
Data delay found: 23
11:46:39:setup_element:INFO: Eye window for uplink 4 : XXXXX__________________________________X
Data delay found: 21
11:46:39:setup_element:INFO: Eye window for uplink 5 : X___________________________________XXXX
Data delay found: 18
11:46:39:setup_element:INFO: Eye window for uplink 6 : __________________________________XXXX__
Data delay found: 15
11:46:39:setup_element:INFO: Eye window for uplink 7 : _______________________________XXXX_____
Data delay found: 12
11:46:39:setup_element:INFO: Eye window for uplink 8 : ______________________XXXXX_____________
Data delay found: 4
11:46:39:setup_element:INFO: Eye window for uplink 9 : __________________________XXXXX_________
Data delay found: 8
11:46:39:setup_element:INFO: Eye window for uplink 10: ________________________XXXXX___________
Data delay found: 6
11:46:39:setup_element:INFO: Eye window for uplink 11: ____________________________XXXX________
Data delay found: 9
11:46:39:setup_element:INFO: Eye window for uplink 12: _________________________XXXX___________
Data delay found: 6
11:46:39:setup_element:INFO: Eye window for uplink 13: ____________________________XXXX________
Data delay found: 9
11:46:39:setup_element:INFO: Eye window for uplink 14: _________________________XXXX___________
Data delay found: 6
11:46:39:setup_element:INFO: Eye window for uplink 15: ___________________________XXXX_________
Data delay found: 8
11:46:39:setup_element:INFO: Setting the data phase to 32 for uplink 0
11:46:39:setup_element:INFO: Setting the data phase to 28 for uplink 1
11:46:39:setup_element:INFO: Setting the data phase to 26 for uplink 2
11:46:39:setup_element:INFO: Setting the data phase to 23 for uplink 3
11:46:39:setup_element:INFO: Setting the data phase to 21 for uplink 4
11:46:39:setup_element:INFO: Setting the data phase to 18 for uplink 5
11:46:39:setup_element:INFO: Setting the data phase to 15 for uplink 6
11:46:39:setup_element:INFO: Setting the data phase to 12 for uplink 7
11:46:39:setup_element:INFO: Setting the data phase to 4 for uplink 8
11:46:39:setup_element:INFO: Setting the data phase to 8 for uplink 9
11:46:39:setup_element:INFO: Setting the data phase to 6 for uplink 10
11:46:39:setup_element:INFO: Setting the data phase to 9 for uplink 11
11:46:39:setup_element:INFO: Setting the data phase to 6 for uplink 12
11:46:39:setup_element:INFO: Setting the data phase to 9 for uplink 13
11:46:39:setup_element:INFO: Setting the data phase to 6 for uplink 14
11:46:39:setup_element:INFO: Setting the data phase to 8 for uplink 15
11:46:39:setup_element:INFO: Beginning SMX ASICs map scan
11:46:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:46:39:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:46:39:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
11:46:39:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
11:46:39:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
11:46:39:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
11:46:39:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
11:46:39:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
11:46:39:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
11:46:40:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
11:46:40:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
11:46:40:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
11:46:40:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
11:46:40:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
11:46:40:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
11:46:40:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
11:46:40:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
11:46:40:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
11:46:40:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
11:46:40:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
11:46:41:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
11:46:42:setup_element:INFO: Performing Elink synchronization
11:46:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:46:42:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:46:42:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
11:46:42:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
11:46:42:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
11:46:42:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
11:46:43:febtest:INFO: Init all SMX (CSA): 30
11:46:57:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:46:58:febtest:INFO: 01-00 | XA-000-09-004-002-012-004-07 | 40.9 | 1141.9
11:46:58:febtest:INFO: 08-01 | XA-000-09-004-002-009-002-12 | 56.8 | 1100.2
11:46:58:febtest:INFO: 03-02 | XA-000-09-004-002-012-003-07 | 44.1 | 1135.9
11:46:58:febtest:INFO: 10-03 | XA-000-09-004-002-005-017-01 | 40.9 | 1159.7
11:46:58:febtest:INFO: 05-04 | XA-000-09-004-002-012-006-07 | 37.7 | 1159.7
11:46:59:febtest:INFO: 12-05 | XA-000-09-004-002-008-017-06 | 37.7 | 1177.4
11:46:59:febtest:INFO: 07-06 | XA-000-09-004-002-009-018-11 | 40.9 | 1159.7
11:46:59:febtest:INFO: 14-07 | XA-000-09-004-002-005-015-06 | 44.1 | 1153.7
11:47:00:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
11:47:02:ST3_smx:INFO: chip: 1-0 40.898880 C 1153.732915 mV
11:47:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:47:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:47:02:ST3_smx:INFO: Electrons
11:47:02:ST3_smx:INFO: # loops 0
11:47:04:ST3_smx:INFO: # loops 1
11:47:05:ST3_smx:INFO: # loops 2
11:47:07:ST3_smx:INFO: Total # of broken channels: 0
11:47:07:ST3_smx:INFO: List of broken channels: []
11:47:07:ST3_smx:INFO: Total # of broken channels: 0
11:47:07:ST3_smx:INFO: List of broken channels: []
11:47:08:ST3_smx:INFO: chip: 3-2 44.073563 C 1147.806000 mV
11:47:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:47:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:47:08:ST3_smx:INFO: Electrons
11:47:08:ST3_smx:INFO: # loops 0
11:47:10:ST3_smx:INFO: # loops 1
11:47:11:ST3_smx:INFO: # loops 2
11:47:13:ST3_smx:INFO: Total # of broken channels: 0
11:47:13:ST3_smx:INFO: List of broken channels: []
11:47:13:ST3_smx:INFO: Total # of broken channels: 0
11:47:13:ST3_smx:INFO: List of broken channels: []
11:47:14:ST3_smx:INFO: chip: 5-4 40.898880 C 1171.483840 mV
11:47:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:47:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:47:14:ST3_smx:INFO: Electrons
11:47:14:ST3_smx:INFO: # loops 0
11:47:16:ST3_smx:INFO: # loops 1
11:47:18:ST3_smx:INFO: # loops 2
11:47:19:ST3_smx:INFO: Total # of broken channels: 2
11:47:19:ST3_smx:INFO: List of broken channels: [11, 99]
11:47:19:ST3_smx:INFO: Total # of broken channels: 10
11:47:19:ST3_smx:INFO: List of broken channels: [0, 10, 11, 12, 14, 16, 18, 20, 22, 99]
11:47:21:ST3_smx:INFO: chip: 7-6 40.898880 C 1171.483840 mV
11:47:21:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:47:21:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:47:21:ST3_smx:INFO: Electrons
11:47:21:ST3_smx:INFO: # loops 0
11:47:23:ST3_smx:INFO: # loops 1
11:47:24:ST3_smx:INFO: # loops 2
11:47:26:ST3_smx:INFO: Total # of broken channels: 0
11:47:26:ST3_smx:INFO: List of broken channels: []
11:47:26:ST3_smx:INFO: Total # of broken channels: 0
11:47:26:ST3_smx:INFO: List of broken channels: []
11:47:26:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:47:26:febtest:INFO: 01-00 | XA-000-09-004-002-012-004-07 | 40.9 | 1171.5
11:47:26:febtest:INFO: 08-01 | XA-000-09-004-002-009-002-12 | 56.8 | 1135.9
11:47:27:febtest:INFO: 03-02 | XA-000-09-004-002-012-003-07 | 44.1 | 1171.5
11:47:27:febtest:INFO: 10-03 | XA-000-09-004-002-005-017-01 | 44.1 | 1195.1
11:47:27:febtest:INFO: 05-04 | XA-000-09-004-002-012-006-07 | 40.9 | 1189.2
11:47:27:febtest:INFO: 12-05 | XA-000-09-004-002-008-017-06 | 40.9 | 1206.9
11:47:27:febtest:INFO: 07-06 | XA-000-09-004-002-009-018-11 | 44.1 | 1189.2
11:47:28:febtest:INFO: 14-07 | XA-000-09-004-002-005-015-06 | 47.3 | 1183.3
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_02_04-11_46_31
OPERATOR : Henrik;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3109| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.9880', '1.850', '2.0030', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9970', '1.850', '2.4340', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9720', '1.850', '0.5316', '0.000', '0.0000', '0.000', '0.0000']