
FEB_3110 28.01.25 10:58:36
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10:58:36:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 10:58:36:ST3_Shared:INFO: FEB-Microcable 10:58:36:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 10:58:36:febtest:INFO: Testing FEB with SN 3110 10:58:37:smx_tester:INFO: Scanning setup 10:58:37:elinks:INFO: Disabling clock on downlink 0 10:58:37:elinks:INFO: Disabling clock on downlink 1 10:58:37:elinks:INFO: Disabling clock on downlink 2 10:58:37:elinks:INFO: Disabling clock on downlink 3 10:58:37:elinks:INFO: Disabling clock on downlink 4 10:58:37:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:58:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 10:58:38:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:58:38:elinks:INFO: Disabling clock on downlink 0 10:58:38:elinks:INFO: Disabling clock on downlink 1 10:58:38:elinks:INFO: Disabling clock on downlink 2 10:58:38:elinks:INFO: Disabling clock on downlink 3 10:58:38:elinks:INFO: Disabling clock on downlink 4 10:58:38:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:58:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 10:58:38:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8 10:58:38:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9 10:58:38:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10 10:58:38:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11 10:58:38:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12 10:58:38:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13 10:58:38:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14 10:58:38:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15 10:58:38:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:58:38:elinks:INFO: Disabling clock on downlink 0 10:58:38:elinks:INFO: Disabling clock on downlink 1 10:58:38:elinks:INFO: Disabling clock on downlink 2 10:58:38:elinks:INFO: Disabling clock on downlink 3 10:58:38:elinks:INFO: Disabling clock on downlink 4 10:58:38:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:58:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 10:58:38:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:58:38:elinks:INFO: Disabling clock on downlink 0 10:58:38:elinks:INFO: Disabling clock on downlink 1 10:58:38:elinks:INFO: Disabling clock on downlink 2 10:58:38:elinks:INFO: Disabling clock on downlink 3 10:58:38:elinks:INFO: Disabling clock on downlink 4 10:58:38:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:58:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 10:58:38:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:58:38:elinks:INFO: Disabling clock on downlink 0 10:58:38:elinks:INFO: Disabling clock on downlink 1 10:58:38:elinks:INFO: Disabling clock on downlink 2 10:58:38:elinks:INFO: Disabling clock on downlink 3 10:58:38:elinks:INFO: Disabling clock on downlink 4 10:58:38:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:58:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 10:58:38:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:58:38:setup_element:INFO: Scanning clock phase 10:58:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 10:58:38:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 10:58:38:setup_element:INFO: Clock phase scan results for group 0, downlink 1 10:58:38:setup_element:INFO: Eye window for uplink 8 : __________________________________________________________________________XXXXX_ Clock Delay: 36 10:58:38:setup_element:INFO: Eye window for uplink 9 : __________________________________________________________________________XXXXX_ Clock Delay: 36 10:58:38:setup_element:INFO: Eye window for uplink 10: ________________________________________________________________________XXXXX___ Clock Delay: 34 10:58:38:setup_element:INFO: Eye window for uplink 11: ________________________________________________________________________XXXXX___ Clock Delay: 34 10:58:38:setup_element:INFO: Eye window for uplink 12: ________________________________________________________________________________ Clock Delay: 40 10:58:38:setup_element:INFO: Eye window for uplink 13: ________________________________________________________________________________ Clock Delay: 40 10:58:38:setup_element:INFO: Eye window for uplink 14: __________________________________________________________________________XXXXX_ Clock Delay: 36 10:58:38:setup_element:INFO: Eye window for uplink 15: __________________________________________________________________________XXXXX_ Clock Delay: 36 10:58:38:setup_element:INFO: Setting the clock phase to 35 for group 0, downlink 1 10:58:38:setup_element:INFO: Scanning data phases 10:58:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 10:58:38:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 10:58:43:setup_element:INFO: Data phase scan results for group 0, downlink 1 10:58:43:setup_element:INFO: Eye window for uplink 8 : ___________________________XXXXX________ Data delay found: 9 10:58:43:setup_element:INFO: Eye window for uplink 9 : ________________________________XXXXX___ Data delay found: 14 10:58:43:setup_element:INFO: Eye window for uplink 10: _________________________XXXXX__________ Data delay found: 7 10:58:43:setup_element:INFO: Eye window for uplink 11: _____________________________XXXX_______ Data delay found: 10 10:58:43:setup_element:INFO: Eye window for uplink 12: ___________________________XXXX______XXX Data delay found: 13 10:58:43:setup_element:INFO: Eye window for uplink 13: ______________________________XXXX___XXX Data delay found: 14 10:58:43:setup_element:INFO: Eye window for uplink 14: _____________________________XXXXX______ Data delay found: 11 10:58:43:setup_element:INFO: Eye window for uplink 15: _______________________________XXXXX____ Data delay found: 13 10:58:43:setup_element:INFO: Setting the data phase to 9 for uplink 8 10:58:43:setup_element:INFO: Setting the data phase to 14 for uplink 9 10:58:43:setup_element:INFO: Setting the data phase to 7 for uplink 10 10:58:43:setup_element:INFO: Setting the data phase to 10 for uplink 11 10:58:43:setup_element:INFO: Setting the data phase to 13 for uplink 12 10:58:43:setup_element:INFO: Setting the data phase to 14 for uplink 13 10:58:43:setup_element:INFO: Setting the data phase to 11 for uplink 14 10:58:43:setup_element:INFO: Setting the data phase to 13 for uplink 15 10:58:43:setup_element:INFO: Beginning SMX ASICs map scan 10:58:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 10:58:44:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 10:58:44:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 10:58:44:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 10:58:44:uplink:INFO: Setting uplinks mask [8, 9, 10, 11, 12, 13, 14, 15] 10:58:44:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8 10:58:44:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9 10:58:44:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10 10:58:44:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11 10:58:44:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12 10:58:44:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13 10:58:45:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14 10:58:45:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15 10:58:46:setup_element:INFO: Performing Elink synchronization 10:58:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 10:58:46:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 10:58:46:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 10:58:46:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 10:58:46:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1 10:58:46:uplink:INFO: Enabling uplinks [8, 9, 10, 11, 12, 13, 14, 15] |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)] 3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)] 5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)] 7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)] |_________________________________________________________________________| 10:58:47:febtest:INFO: Init all SMX (CSA): 30 10:58:54:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 10:58:54:febtest:INFO: 08-01 | XA-000-09-004-002-011-002-15 | 37.7 | 1153.7 10:58:54:febtest:INFO: 10-03 | XA-000-09-004-005-011-009-05 | 31.4 | 1183.3 10:58:55:febtest:INFO: 12-05 | XA-000-09-004-005-008-009-11 | 28.2 | 1201.0 10:58:55:febtest:INFO: 14-07 | XA-000-09-004-005-005-009-12 | 28.2 | 1189.2 10:58:56:febtest:INFO: Set all CSA to ZERO FEB type: A FEB_A: 1 FEB_B: 0 10:58:58:ST3_smx:INFO: chip: 8-1 37.726682 C 1165.571835 mV 10:58:58:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:58:58:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:58:58:ST3_smx:INFO: Electrons 10:58:58:ST3_smx:INFO: # loops 0 10:58:59:ST3_smx:INFO: # loops 1 10:59:01:ST3_smx:INFO: # loops 2 10:59:02:ST3_smx:INFO: Total # of broken channels: 0 10:59:02:ST3_smx:INFO: List of broken channels: [] 10:59:02:ST3_smx:INFO: Total # of broken channels: 0 10:59:02:ST3_smx:INFO: List of broken channels: [] 10:59:04:ST3_smx:INFO: chip: 10-3 31.389742 C 1195.082160 mV 10:59:04:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:59:04:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:59:04:ST3_smx:INFO: Electrons 10:59:04:ST3_smx:INFO: # loops 0 10:59:06:ST3_smx:INFO: # loops 1 10:59:07:ST3_smx:INFO: # loops 2 10:59:09:ST3_smx:INFO: Total # of broken channels: 0 10:59:09:ST3_smx:INFO: List of broken channels: [] 10:59:09:ST3_smx:INFO: Total # of broken channels: 0 10:59:09:ST3_smx:INFO: List of broken channels: [] 10:59:11:ST3_smx:INFO: chip: 12-5 25.062742 C 1206.851500 mV 10:59:11:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:59:11:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:59:11:ST3_smx:INFO: Electrons 10:59:11:ST3_smx:INFO: # loops 0 10:59:12:ST3_smx:INFO: # loops 1 10:59:14:ST3_smx:INFO: # loops 2 10:59:15:ST3_smx:INFO: Total # of broken channels: 0 10:59:15:ST3_smx:INFO: List of broken channels: [] 10:59:15:ST3_smx:INFO: Total # of broken channels: 0 10:59:15:ST3_smx:INFO: List of broken channels: [] 10:59:17:ST3_smx:INFO: chip: 14-7 31.389742 C 1200.969315 mV 10:59:17:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:59:17:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:59:17:ST3_smx:INFO: Electrons 10:59:17:ST3_smx:INFO: # loops 0 10:59:19:ST3_smx:INFO: # loops 1 10:59:20:ST3_smx:INFO: # loops 2 10:59:22:ST3_smx:INFO: Total # of broken channels: 0 10:59:22:ST3_smx:INFO: List of broken channels: [] 10:59:22:ST3_smx:INFO: Total # of broken channels: 0 10:59:22:ST3_smx:INFO: List of broken channels: [] 10:59:22:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 10:59:22:febtest:INFO: 08-01 | XA-000-09-004-002-011-002-15 | 37.7 | 1177.4 10:59:23:febtest:INFO: 10-03 | XA-000-09-004-005-011-009-05 | 31.4 | 1218.6 10:59:23:febtest:INFO: 12-05 | XA-000-09-004-005-008-009-11 | 25.1 | 1230.3 10:59:23:febtest:INFO: 14-07 | XA-000-09-004-005-005-009-12 | 31.4 | 1224.5 ############################################################ # S U M M A R Y # ############################################################ {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 25_01_28-10_58_36 OPERATOR : Benjamin; SITE : KIT | SETUP : KIT_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 3110| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['2.449', '0.7504', '1.852', '1.2510', '0.000', '0.0000', '0.000', '0.0000'] VI_after__Init : ['2.450', '1.0000', '1.849', '1.0560', '0.000', '0.0000', '0.000', '0.0000'] VI_at__the_End : ['2.450', '0.9890', '1.850', '0.2668', '0.000', '0.0000', '0.000', '0.0000']