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FEB_3112 31.01.25 08:32:18
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08:32:18:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:32:18:ST3_Shared:INFO: FEB-Microcable
08:32:18:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:32:18:febtest:INFO: Testing FEB with SN 3112
08:32:19:smx_tester:INFO: Scanning setup
08:32:19:elinks:INFO: Disabling clock on downlink 0
08:32:19:elinks:INFO: Disabling clock on downlink 1
08:32:19:elinks:INFO: Disabling clock on downlink 2
08:32:19:elinks:INFO: Disabling clock on downlink 3
08:32:19:elinks:INFO: Disabling clock on downlink 4
08:32:19:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:32:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:32:19:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:32:19:elinks:INFO: Disabling clock on downlink 0
08:32:19:elinks:INFO: Disabling clock on downlink 1
08:32:19:elinks:INFO: Disabling clock on downlink 2
08:32:19:elinks:INFO: Disabling clock on downlink 3
08:32:19:elinks:INFO: Disabling clock on downlink 4
08:32:19:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:32:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:32:19:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
08:32:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
08:32:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
08:32:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
08:32:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
08:32:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
08:32:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
08:32:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
08:32:20:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:32:20:elinks:INFO: Disabling clock on downlink 0
08:32:20:elinks:INFO: Disabling clock on downlink 1
08:32:20:elinks:INFO: Disabling clock on downlink 2
08:32:20:elinks:INFO: Disabling clock on downlink 3
08:32:20:elinks:INFO: Disabling clock on downlink 4
08:32:20:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:32:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:32:20:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:32:20:elinks:INFO: Disabling clock on downlink 0
08:32:20:elinks:INFO: Disabling clock on downlink 1
08:32:20:elinks:INFO: Disabling clock on downlink 2
08:32:20:elinks:INFO: Disabling clock on downlink 3
08:32:20:elinks:INFO: Disabling clock on downlink 4
08:32:20:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:32:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
08:32:20:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:32:20:elinks:INFO: Disabling clock on downlink 0
08:32:20:elinks:INFO: Disabling clock on downlink 1
08:32:20:elinks:INFO: Disabling clock on downlink 2
08:32:20:elinks:INFO: Disabling clock on downlink 3
08:32:20:elinks:INFO: Disabling clock on downlink 4
08:32:20:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:32:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
08:32:20:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:32:20:setup_element:INFO: Scanning clock phase
08:32:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:32:20:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:32:20:setup_element:INFO: Clock phase scan results for group 0, downlink 1
08:32:20:setup_element:INFO: Eye window for uplink 8 : _________________________________________________________________________XXXXX__
Clock Delay: 35
08:32:20:setup_element:INFO: Eye window for uplink 9 : _________________________________________________________________________XXXXX__
Clock Delay: 35
08:32:20:setup_element:INFO: Eye window for uplink 10: _________________________________________________________________________XXXXXX_
Clock Delay: 35
08:32:20:setup_element:INFO: Eye window for uplink 11: _________________________________________________________________________XXXXXX_
Clock Delay: 35
08:32:20:setup_element:INFO: Eye window for uplink 12: __________________________________________________________________________XXXXX_
Clock Delay: 36
08:32:20:setup_element:INFO: Eye window for uplink 13: __________________________________________________________________________XXXXX_
Clock Delay: 36
08:32:20:setup_element:INFO: Eye window for uplink 14: ________________________________________________________________________________
Clock Delay: 40
08:32:20:setup_element:INFO: Eye window for uplink 15: ________________________________________________________________________________
Clock Delay: 40
08:32:20:setup_element:INFO: Setting the clock phase to 35 for group 0, downlink 1
08:32:20:setup_element:INFO: Scanning data phases
08:32:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:32:20:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:32:25:setup_element:INFO: Data phase scan results for group 0, downlink 1
08:32:25:setup_element:INFO: Eye window for uplink 8 : _________________________XXXXXX_________
Data delay found: 7
08:32:25:setup_element:INFO: Eye window for uplink 9 : _____________________________XXXXXX_____
Data delay found: 11
08:32:25:setup_element:INFO: Eye window for uplink 10: ___________________________XXXXXX_______
Data delay found: 9
08:32:25:setup_element:INFO: Eye window for uplink 11: ______________________________XXXXXX____
Data delay found: 12
08:32:25:setup_element:INFO: Eye window for uplink 12: ____________________________XXXXX_______
Data delay found: 10
08:32:25:setup_element:INFO: Eye window for uplink 13: ________________________________XXXX____
Data delay found: 13
08:32:25:setup_element:INFO: Eye window for uplink 14: _______________________________XXXXX____
Data delay found: 13
08:32:25:setup_element:INFO: Eye window for uplink 15: ________________________________XXXXX___
Data delay found: 14
08:32:25:setup_element:INFO: Setting the data phase to 7 for uplink 8
08:32:25:setup_element:INFO: Setting the data phase to 11 for uplink 9
08:32:25:setup_element:INFO: Setting the data phase to 9 for uplink 10
08:32:25:setup_element:INFO: Setting the data phase to 12 for uplink 11
08:32:25:setup_element:INFO: Setting the data phase to 10 for uplink 12
08:32:25:setup_element:INFO: Setting the data phase to 13 for uplink 13
08:32:25:setup_element:INFO: Setting the data phase to 13 for uplink 14
08:32:25:setup_element:INFO: Setting the data phase to 14 for uplink 15
08:32:25:setup_element:INFO: Beginning SMX ASICs map scan
08:32:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:32:25:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:32:25:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
08:32:25:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
08:32:25:uplink:INFO: Setting uplinks mask [8, 9, 10, 11, 12, 13, 14, 15]
08:32:26:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
08:32:26:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
08:32:26:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
08:32:26:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
08:32:26:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
08:32:26:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
08:32:27:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
08:32:27:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
08:32:28:setup_element:INFO: Performing Elink synchronization
08:32:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:32:28:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:32:28:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
08:32:28:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
08:32:28:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
08:32:28:uplink:INFO: Enabling uplinks [8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
08:32:28:febtest:INFO: Init all SMX (CSA): 30
08:32:38:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:32:38:febtest:INFO: 08-01 | XA-000-09-004-002-007-016-02 | 40.9 | 1153.7
08:32:38:febtest:INFO: 10-03 | XA-000-09-004-002-010-016-05 | 40.9 | 1159.7
08:32:38:febtest:INFO: 12-05 | XA-000-09-004-002-010-017-05 | 50.4 | 1118.1
08:32:39:febtest:INFO: 14-07 | XA-000-09-004-002-007-017-02 | 34.6 | 1165.6
08:32:40:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
08:32:42:ST3_smx:INFO: chip: 8-1 40.898880 C 1159.654860 mV
08:32:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:32:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:32:42:ST3_smx:INFO: Electrons
08:32:42:ST3_smx:INFO: # loops 0
08:32:43:ST3_smx:INFO: # loops 1
08:32:45:ST3_smx:INFO: # loops 2
08:32:47:ST3_smx:INFO: Total # of broken channels: 0
08:32:47:ST3_smx:INFO: List of broken channels: []
08:32:47:ST3_smx:INFO: Total # of broken channels: 0
08:32:47:ST3_smx:INFO: List of broken channels: []
08:32:48:ST3_smx:INFO: chip: 10-3 40.898880 C 1177.390875 mV
08:32:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:32:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:32:48:ST3_smx:INFO: Electrons
08:32:48:ST3_smx:INFO: # loops 0
08:32:50:ST3_smx:INFO: # loops 1
08:32:52:ST3_smx:INFO: # loops 2
08:32:53:ST3_smx:INFO: Total # of broken channels: 0
08:32:53:ST3_smx:INFO: List of broken channels: []
08:32:53:ST3_smx:INFO: Total # of broken channels: 0
08:32:53:ST3_smx:INFO: List of broken channels: []
08:32:55:ST3_smx:INFO: chip: 12-5 50.430383 C 1129.995435 mV
08:32:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:32:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:32:55:ST3_smx:INFO: Electrons
08:32:55:ST3_smx:INFO: # loops 0
08:32:57:ST3_smx:INFO: # loops 1
08:32:58:ST3_smx:INFO: # loops 2
08:33:00:ST3_smx:INFO: Total # of broken channels: 0
08:33:00:ST3_smx:INFO: List of broken channels: []
08:33:00:ST3_smx:INFO: Total # of broken channels: 0
08:33:00:ST3_smx:INFO: List of broken channels: []
08:33:02:ST3_smx:INFO: chip: 14-7 37.726682 C 1177.390875 mV
08:33:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:33:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:33:02:ST3_smx:INFO: Electrons
08:33:02:ST3_smx:INFO: # loops 0
08:33:04:ST3_smx:INFO: # loops 1
08:33:05:ST3_smx:INFO: # loops 2
08:33:07:ST3_smx:INFO: Total # of broken channels: 0
08:33:07:ST3_smx:INFO: List of broken channels: []
08:33:07:ST3_smx:INFO: Total # of broken channels: 0
08:33:07:ST3_smx:INFO: List of broken channels: []
08:33:07:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:33:08:febtest:INFO: 08-01 | XA-000-09-004-002-007-016-02 | 40.9 | 1183.3
08:33:08:febtest:INFO: 10-03 | XA-000-09-004-002-010-016-05 | 40.9 | 1230.3
08:33:08:febtest:INFO: 12-05 | XA-000-09-004-002-010-017-05 | 50.4 | 1147.8
08:33:08:febtest:INFO: 14-07 | XA-000-09-004-002-007-017-02 | 37.7 | 1201.0
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_01_31-08_32_18
OPERATOR : Benjamin;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3112| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '0.8034', '1.852', '1.0720', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '0.9963', '1.850', '1.1800', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '0.9963', '1.850', '0.2671', '0.000', '0.0000', '0.000', '0.0000']