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FEB_3113 13.02.25 09:45:48
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09:45:48:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:45:48:ST3_Shared:INFO: FEB-Microcable
09:45:48:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:45:48:febtest:INFO: Testing FEB with SN 3113
09:45:50:smx_tester:INFO: Scanning setup
09:45:50:elinks:INFO: Disabling clock on downlink 0
09:45:50:elinks:INFO: Disabling clock on downlink 1
09:45:50:elinks:INFO: Disabling clock on downlink 2
09:45:50:elinks:INFO: Disabling clock on downlink 3
09:45:50:elinks:INFO: Disabling clock on downlink 4
09:45:50:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:45:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:45:50:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:45:50:elinks:INFO: Disabling clock on downlink 0
09:45:50:elinks:INFO: Disabling clock on downlink 1
09:45:50:elinks:INFO: Disabling clock on downlink 2
09:45:50:elinks:INFO: Disabling clock on downlink 3
09:45:50:elinks:INFO: Disabling clock on downlink 4
09:45:50:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:45:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:45:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
09:45:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
09:45:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
09:45:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
09:45:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
09:45:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
09:45:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
09:45:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
09:45:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
09:45:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
09:45:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
09:45:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
09:45:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
09:45:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
09:45:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
09:45:50:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
09:45:50:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:45:50:elinks:INFO: Disabling clock on downlink 0
09:45:50:elinks:INFO: Disabling clock on downlink 1
09:45:50:elinks:INFO: Disabling clock on downlink 2
09:45:50:elinks:INFO: Disabling clock on downlink 3
09:45:50:elinks:INFO: Disabling clock on downlink 4
09:45:50:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:45:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:45:50:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:45:50:elinks:INFO: Disabling clock on downlink 0
09:45:50:elinks:INFO: Disabling clock on downlink 1
09:45:50:elinks:INFO: Disabling clock on downlink 2
09:45:50:elinks:INFO: Disabling clock on downlink 3
09:45:50:elinks:INFO: Disabling clock on downlink 4
09:45:50:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:45:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
09:45:51:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:45:51:elinks:INFO: Disabling clock on downlink 0
09:45:51:elinks:INFO: Disabling clock on downlink 1
09:45:51:elinks:INFO: Disabling clock on downlink 2
09:45:51:elinks:INFO: Disabling clock on downlink 3
09:45:51:elinks:INFO: Disabling clock on downlink 4
09:45:51:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:45:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
09:45:51:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:45:51:setup_element:INFO: Scanning clock phase
09:45:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:45:51:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:45:51:setup_element:INFO: Clock phase scan results for group 0, downlink 1
09:45:51:setup_element:INFO: Eye window for uplink 0 : ___________________________________________________________________________XXXX_
Clock Delay: 36
09:45:51:setup_element:INFO: Eye window for uplink 1 : ___________________________________________________________________________XXXX_
Clock Delay: 36
09:45:51:setup_element:INFO: Eye window for uplink 2 : __________________________________________________________________________XXXXXX
Clock Delay: 36
09:45:51:setup_element:INFO: Eye window for uplink 3 : __________________________________________________________________________XXXXXX
Clock Delay: 36
09:45:51:setup_element:INFO: Eye window for uplink 4 : ___________________________________________________________________________XXXXX
Clock Delay: 37
09:45:51:setup_element:INFO: Eye window for uplink 5 : ___________________________________________________________________________XXXXX
Clock Delay: 37
09:45:51:setup_element:INFO: Eye window for uplink 6 : ________________________________________________________________________________
Clock Delay: 40
09:45:51:setup_element:INFO: Eye window for uplink 7 : ________________________________________________________________________________
Clock Delay: 40
09:45:51:setup_element:INFO: Eye window for uplink 8 : __________________________________________________________________________XXXXXX
Clock Delay: 36
09:45:51:setup_element:INFO: Eye window for uplink 9 : __________________________________________________________________________XXXXXX
Clock Delay: 36
09:45:51:setup_element:INFO: Eye window for uplink 10: _________________________________________________________________________XXXXXX_
Clock Delay: 35
09:45:51:setup_element:INFO: Eye window for uplink 11: _________________________________________________________________________XXXXXX_
Clock Delay: 35
09:45:51:setup_element:INFO: Eye window for uplink 12: ___________________________________________________________________________XXXXX
Clock Delay: 37
09:45:51:setup_element:INFO: Eye window for uplink 13: ___________________________________________________________________________XXXXX
Clock Delay: 37
09:45:51:setup_element:INFO: Eye window for uplink 14: ____________________________________________________________________________XXXX
Clock Delay: 37
09:45:51:setup_element:INFO: Eye window for uplink 15: ____________________________________________________________________________XXXX
Clock Delay: 37
09:45:51:setup_element:INFO: Setting the clock phase to 36 for group 0, downlink 1
09:45:51:setup_element:INFO: Scanning data phases
09:45:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:45:51:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:45:56:setup_element:INFO: Data phase scan results for group 0, downlink 1
09:45:56:setup_element:INFO: Eye window for uplink 0 : _______XXXXX____________________________
Data delay found: 29
09:45:56:setup_element:INFO: Eye window for uplink 1 : ___XXXX_________________________________
Data delay found: 24
09:45:56:setup_element:INFO: Eye window for uplink 2 : _______XXXXX____________________________
Data delay found: 29
09:45:56:setup_element:INFO: Eye window for uplink 3 : ___XXXXX________________________________
Data delay found: 25
09:45:56:setup_element:INFO: Eye window for uplink 4 : __XXXXXX________________________________
Data delay found: 24
09:45:56:setup_element:INFO: Eye window for uplink 5 : XXXX__________________________________XX
Data delay found: 20
09:45:56:setup_element:INFO: Eye window for uplink 6 : X__________________________________XXXXX
Data delay found: 17
09:45:56:setup_element:INFO: Eye window for uplink 7 : ________________________________XXXX____
Data delay found: 13
09:45:56:setup_element:INFO: Eye window for uplink 8 : _______________________XXXXXX___________
Data delay found: 5
09:45:56:setup_element:INFO: Eye window for uplink 9 : ____________________________XXXXX_______
Data delay found: 10
09:45:56:setup_element:INFO: Eye window for uplink 10: ________________________XXXXX___________
Data delay found: 6
09:45:56:setup_element:INFO: Eye window for uplink 11: ___________________________XXXXXX_______
Data delay found: 9
09:45:56:setup_element:INFO: Eye window for uplink 12: _XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 20
09:45:56:setup_element:INFO: Eye window for uplink 13: _XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 20
09:45:56:setup_element:INFO: Eye window for uplink 14: ____________________________XXXX________
Data delay found: 9
09:45:56:setup_element:INFO: Eye window for uplink 15: _____________________________XXXXX______
Data delay found: 11
09:45:56:setup_element:INFO: Setting the data phase to 29 for uplink 0
09:45:56:setup_element:INFO: Setting the data phase to 24 for uplink 1
09:45:56:setup_element:INFO: Setting the data phase to 29 for uplink 2
09:45:56:setup_element:INFO: Setting the data phase to 25 for uplink 3
09:45:56:setup_element:INFO: Setting the data phase to 24 for uplink 4
09:45:56:setup_element:INFO: Setting the data phase to 20 for uplink 5
09:45:56:setup_element:INFO: Setting the data phase to 17 for uplink 6
09:45:56:setup_element:INFO: Setting the data phase to 13 for uplink 7
09:45:56:setup_element:INFO: Setting the data phase to 5 for uplink 8
09:45:56:setup_element:INFO: Setting the data phase to 10 for uplink 9
09:45:56:setup_element:INFO: Setting the data phase to 6 for uplink 10
09:45:56:setup_element:INFO: Setting the data phase to 9 for uplink 11
09:45:56:setup_element:INFO: Setting the data phase to 20 for uplink 12
09:45:56:setup_element:INFO: Setting the data phase to 20 for uplink 13
09:45:56:setup_element:INFO: Setting the data phase to 9 for uplink 14
09:45:56:setup_element:INFO: Setting the data phase to 11 for uplink 15
09:45:56:setup_element:INFO: Beginning SMX ASICs map scan
09:45:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:45:56:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:45:56:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
09:45:56:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
09:45:56:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
09:45:57:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
09:45:57:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
09:45:57:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
09:45:57:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
09:45:57:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
09:45:57:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
09:45:57:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
09:45:57:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
09:45:57:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
09:45:57:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
09:45:57:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
09:45:57:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
09:45:58:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
09:45:58:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
09:45:58:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
09:45:58:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
09:45:59:setup_element:INFO: Performing Elink synchronization
09:45:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:45:59:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:45:59:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
09:45:59:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
09:45:59:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
09:45:59:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
09:46:00:febtest:INFO: Init all SMX (CSA): 30
09:46:17:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:46:17:febtest:INFO: 01-00 | XA-000-09-004-005-013-012-00 | 28.2 | 1189.2
09:46:17:febtest:INFO: 08-01 | XA-000-09-004-005-016-014-11 | 25.1 | 1206.9
09:46:17:febtest:INFO: 03-02 | XA-000-09-004-005-013-014-00 | 37.7 | 1165.6
09:46:18:febtest:INFO: 10-03 | XA-000-09-004-005-013-013-00 | 31.4 | 1189.2
09:46:18:febtest:INFO: 05-04 | XA-000-09-004-005-010-013-08 | 37.7 | 1165.6
09:46:18:febtest:INFO: 12-05 | XA-000-09-004-005-016-013-11 | 37.7 | 1159.7
09:46:18:febtest:INFO: 07-06 | XA-000-09-004-005-016-012-11 | 28.2 | 1189.2
09:46:18:febtest:INFO: 14-07 | XA-000-09-004-002-010-002-02 | 34.6 | 1177.4
09:46:19:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
09:46:21:ST3_smx:INFO: chip: 1-0 28.225000 C 1200.969315 mV
09:46:21:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:46:21:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:46:21:ST3_smx:INFO: Electrons
09:46:21:ST3_smx:INFO: # loops 0
09:46:23:ST3_smx:INFO: # loops 1
09:46:25:ST3_smx:INFO: # loops 2
09:46:27:ST3_smx:INFO: Total # of broken channels: 0
09:46:27:ST3_smx:INFO: List of broken channels: []
09:46:27:ST3_smx:INFO: Total # of broken channels: 0
09:46:27:ST3_smx:INFO: List of broken channels: []
09:46:29:ST3_smx:INFO: chip: 8-1 25.062742 C 1224.468235 mV
09:46:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:46:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:46:29:ST3_smx:INFO: Electrons
09:46:29:ST3_smx:INFO: # loops 0
09:46:31:ST3_smx:INFO: # loops 1
09:46:33:ST3_smx:INFO: # loops 2
09:46:36:ST3_smx:INFO: Total # of broken channels: 0
09:46:36:ST3_smx:INFO: List of broken channels: []
09:46:36:ST3_smx:INFO: Total # of broken channels: 0
09:46:36:ST3_smx:INFO: List of broken channels: []
09:46:37:ST3_smx:INFO: chip: 3-2 37.726682 C 1177.390875 mV
09:46:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:46:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:46:37:ST3_smx:INFO: Electrons
09:46:37:ST3_smx:INFO: # loops 0
09:46:39:ST3_smx:INFO: # loops 1
09:46:41:ST3_smx:INFO: # loops 2
09:46:43:ST3_smx:INFO: Total # of broken channels: 0
09:46:43:ST3_smx:INFO: List of broken channels: []
09:46:43:ST3_smx:INFO: Total # of broken channels: 0
09:46:43:ST3_smx:INFO: List of broken channels: []
09:46:45:ST3_smx:INFO: chip: 10-3 31.389742 C 1200.969315 mV
09:46:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:46:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:46:45:ST3_smx:INFO: Electrons
09:46:45:ST3_smx:INFO: # loops 0
09:46:47:ST3_smx:INFO: # loops 1
09:46:49:ST3_smx:INFO: # loops 2
09:46:51:ST3_smx:INFO: Total # of broken channels: 0
09:46:51:ST3_smx:INFO: List of broken channels: []
09:46:51:ST3_smx:INFO: Total # of broken channels: 0
09:46:51:ST3_smx:INFO: List of broken channels: []
09:46:53:ST3_smx:INFO: chip: 5-4 40.898880 C 1171.483840 mV
09:46:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:46:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:46:53:ST3_smx:INFO: Electrons
09:46:53:ST3_smx:INFO: # loops 0
09:46:54:ST3_smx:INFO: # loops 1
09:46:56:ST3_smx:INFO: # loops 2
09:46:58:ST3_smx:INFO: Total # of broken channels: 0
09:46:58:ST3_smx:INFO: List of broken channels: []
09:46:58:ST3_smx:INFO: Total # of broken channels: 0
09:46:58:ST3_smx:INFO: List of broken channels: []
09:47:00:ST3_smx:INFO: chip: 12-5 40.898880 C 1171.483840 mV
09:47:00:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:47:00:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:47:00:ST3_smx:INFO: Electrons
09:47:00:ST3_smx:INFO: # loops 0
09:47:02:ST3_smx:INFO: # loops 1
09:47:04:ST3_smx:INFO: # loops 2
09:47:06:ST3_smx:INFO: Total # of broken channels: 0
09:47:06:ST3_smx:INFO: List of broken channels: []
09:47:06:ST3_smx:INFO: Total # of broken channels: 0
09:47:06:ST3_smx:INFO: List of broken channels: []
09:47:08:ST3_smx:INFO: chip: 7-6 31.389742 C 1200.969315 mV
09:47:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:47:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:47:08:ST3_smx:INFO: Electrons
09:47:08:ST3_smx:INFO: # loops 0
09:47:10:ST3_smx:INFO: # loops 1
09:47:12:ST3_smx:INFO: # loops 2
09:47:14:ST3_smx:INFO: Total # of broken channels: 0
09:47:14:ST3_smx:INFO: List of broken channels: []
09:47:14:ST3_smx:INFO: Total # of broken channels: 0
09:47:14:ST3_smx:INFO: List of broken channels: []
09:47:15:ST3_smx:INFO: chip: 14-7 37.726682 C 1189.190035 mV
09:47:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:47:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:47:15:ST3_smx:INFO: Electrons
09:47:15:ST3_smx:INFO: # loops 0
09:47:17:ST3_smx:INFO: # loops 1
09:47:19:ST3_smx:INFO: # loops 2
09:47:21:ST3_smx:INFO: Total # of broken channels: 0
09:47:21:ST3_smx:INFO: List of broken channels: []
09:47:21:ST3_smx:INFO: Total # of broken channels: 0
09:47:21:ST3_smx:INFO: List of broken channels: []
09:47:21:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:47:22:febtest:INFO: 01-00 | XA-000-09-004-005-013-012-00 | 31.4 | 1218.6
09:47:22:febtest:INFO: 08-01 | XA-000-09-004-005-016-014-11 | 25.1 | 1242.0
09:47:22:febtest:INFO: 03-02 | XA-000-09-004-005-013-014-00 | 40.9 | 1195.1
09:47:22:febtest:INFO: 10-03 | XA-000-09-004-005-013-013-00 | 31.4 | 1224.5
09:47:22:febtest:INFO: 05-04 | XA-000-09-004-005-010-013-08 | 40.9 | 1195.1
09:47:23:febtest:INFO: 12-05 | XA-000-09-004-005-016-013-11 | 40.9 | 1189.2
09:47:23:febtest:INFO: 07-06 | XA-000-09-004-005-016-012-11 | 31.4 | 1224.5
09:47:23:febtest:INFO: 14-07 | XA-000-09-004-002-010-002-02 | 37.7 | 1206.9
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_02_13-09_45_48
OPERATOR : Henrik;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3113| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.4630', '1.850', '2.7240', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9370', '1.850', '2.3330', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9460', '1.850', '0.5212', '0.000', '0.0000', '0.000', '0.0000']