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FEB_3114 03.02.25 16:02:57
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16:02:57:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
16:02:57:ST3_Shared:INFO: FEB-Microcable
16:02:57:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
16:02:57:febtest:INFO: Testing FEB with SN 3114
16:02:58:smx_tester:INFO: Scanning setup
16:02:58:elinks:INFO: Disabling clock on downlink 0
16:02:58:elinks:INFO: Disabling clock on downlink 1
16:02:58:elinks:INFO: Disabling clock on downlink 2
16:02:58:elinks:INFO: Disabling clock on downlink 3
16:02:58:elinks:INFO: Disabling clock on downlink 4
16:02:58:setup_element:INFO: Checking SOS, encoding_mode: SOS
16:02:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
16:02:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
16:02:59:elinks:INFO: Disabling clock on downlink 0
16:02:59:elinks:INFO: Disabling clock on downlink 1
16:02:59:elinks:INFO: Disabling clock on downlink 2
16:02:59:elinks:INFO: Disabling clock on downlink 3
16:02:59:elinks:INFO: Disabling clock on downlink 4
16:02:59:setup_element:INFO: Checking SOS, encoding_mode: SOS
16:02:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
16:02:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
16:02:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
16:02:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
16:02:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
16:02:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
16:02:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
16:02:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
16:02:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
16:02:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
16:02:59:elinks:INFO: Disabling clock on downlink 0
16:02:59:elinks:INFO: Disabling clock on downlink 1
16:02:59:elinks:INFO: Disabling clock on downlink 2
16:02:59:elinks:INFO: Disabling clock on downlink 3
16:02:59:elinks:INFO: Disabling clock on downlink 4
16:02:59:setup_element:INFO: Checking SOS, encoding_mode: SOS
16:02:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
16:02:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
16:02:59:elinks:INFO: Disabling clock on downlink 0
16:02:59:elinks:INFO: Disabling clock on downlink 1
16:02:59:elinks:INFO: Disabling clock on downlink 2
16:02:59:elinks:INFO: Disabling clock on downlink 3
16:02:59:elinks:INFO: Disabling clock on downlink 4
16:02:59:setup_element:INFO: Checking SOS, encoding_mode: SOS
16:02:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
16:02:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
16:02:59:elinks:INFO: Disabling clock on downlink 0
16:02:59:elinks:INFO: Disabling clock on downlink 1
16:02:59:elinks:INFO: Disabling clock on downlink 2
16:02:59:elinks:INFO: Disabling clock on downlink 3
16:02:59:elinks:INFO: Disabling clock on downlink 4
16:02:59:setup_element:INFO: Checking SOS, encoding_mode: SOS
16:02:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
16:02:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
16:02:59:setup_element:INFO: Scanning clock phase
16:02:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
16:02:59:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
16:02:59:setup_element:INFO: Clock phase scan results for group 0, downlink 1
16:02:59:setup_element:INFO: Eye window for uplink 8 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
16:02:59:setup_element:INFO: Eye window for uplink 9 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
16:02:59:setup_element:INFO: Eye window for uplink 10: _________________________________________________________________________XXXXX__
Clock Delay: 35
16:02:59:setup_element:INFO: Eye window for uplink 11: _________________________________________________________________________XXXXX__
Clock Delay: 35
16:02:59:setup_element:INFO: Eye window for uplink 12: ________________________________________________________________________________
Clock Delay: 40
16:02:59:setup_element:INFO: Eye window for uplink 13: ________________________________________________________________________________
Clock Delay: 40
16:02:59:setup_element:INFO: Eye window for uplink 14: _________________________________________________________________________XXXXX__
Clock Delay: 35
16:02:59:setup_element:INFO: Eye window for uplink 15: _________________________________________________________________________XXXXX__
Clock Delay: 35
16:02:59:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 1
16:02:59:setup_element:INFO: Scanning data phases
16:02:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
16:02:59:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
16:03:04:setup_element:INFO: Data phase scan results for group 0, downlink 1
16:03:04:setup_element:INFO: Eye window for uplink 8 : ____________________XXXXXXXXXXXXXXXXXXXX
Data delay found: 9
16:03:04:setup_element:INFO: Eye window for uplink 9 : ____________________XXXXXXXXXXXXXXXXXXXX
Data delay found: 9
16:03:04:setup_element:INFO: Eye window for uplink 10: ____________________________XXXXX_______
Data delay found: 10
16:03:04:setup_element:INFO: Eye window for uplink 11: _______________________________XXXXXX___
Data delay found: 13
16:03:04:setup_element:INFO: Eye window for uplink 12: _________________________________XXXXXXX
Data delay found: 16
16:03:04:setup_element:INFO: Eye window for uplink 13: X__________________________________XXXXX
Data delay found: 17
16:03:04:setup_element:INFO: Eye window for uplink 14: ________________________________XXXXX___
Data delay found: 14
16:03:04:setup_element:INFO: Eye window for uplink 15: __________________________________XXXX__
Data delay found: 15
16:03:04:setup_element:INFO: Setting the data phase to 9 for uplink 8
16:03:04:setup_element:INFO: Setting the data phase to 9 for uplink 9
16:03:04:setup_element:INFO: Setting the data phase to 10 for uplink 10
16:03:04:setup_element:INFO: Setting the data phase to 13 for uplink 11
16:03:04:setup_element:INFO: Setting the data phase to 16 for uplink 12
16:03:04:setup_element:INFO: Setting the data phase to 17 for uplink 13
16:03:04:setup_element:INFO: Setting the data phase to 14 for uplink 14
16:03:04:setup_element:INFO: Setting the data phase to 15 for uplink 15
16:03:04:setup_element:INFO: Beginning SMX ASICs map scan
16:03:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
16:03:04:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
16:03:04:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
16:03:04:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
16:03:04:uplink:INFO: Setting uplinks mask [8, 9, 10, 11, 12, 13, 14, 15]
16:03:05:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
16:03:05:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
16:03:05:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
16:03:05:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
16:03:05:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
16:03:05:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
16:03:06:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
16:03:06:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
16:03:07:setup_element:INFO: Performing Elink synchronization
16:03:07:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
16:03:07:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
16:03:07:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
16:03:07:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
16:03:07:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
16:03:07:uplink:INFO: Enabling uplinks [8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
16:03:08:febtest:INFO: Init all SMX (CSA): 30
16:03:14:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
16:03:14:febtest:INFO: 08-01 | XA-000-09-004-005-007-009-15 | 28.2 | 1177.4
16:03:15:febtest:INFO: 10-03 | XA-000-09-004-005-004-012-01 | 25.1 | 1195.1
16:03:15:febtest:INFO: 12-05 | XA-000-09-004-005-016-011-11 | 18.7 | 1206.9
16:03:15:febtest:INFO: 14-07 | XA-000-09-004-005-007-010-15 | 37.7 | 1159.7
16:03:16:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
16:03:18:ST3_smx:INFO: chip: 8-1 28.225000 C 1189.190035 mV
16:03:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
16:03:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
16:03:18:ST3_smx:INFO: Electrons
16:03:18:ST3_smx:INFO: # loops 0
16:03:20:ST3_smx:INFO: # loops 1
16:03:21:ST3_smx:INFO: # loops 2
16:03:23:ST3_smx:INFO: Total # of broken channels: 0
16:03:23:ST3_smx:INFO: List of broken channels: []
16:03:23:ST3_smx:INFO: Total # of broken channels: 0
16:03:23:ST3_smx:INFO: List of broken channels: []
16:03:25:ST3_smx:INFO: chip: 10-3 25.062742 C 1206.851500 mV
16:03:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
16:03:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
16:03:25:ST3_smx:INFO: Electrons
16:03:25:ST3_smx:INFO: # loops 0
16:03:26:ST3_smx:INFO: # loops 1
16:03:28:ST3_smx:INFO: # loops 2
16:03:29:ST3_smx:INFO: Total # of broken channels: 0
16:03:29:ST3_smx:INFO: List of broken channels: []
16:03:29:ST3_smx:INFO: Total # of broken channels: 0
16:03:29:ST3_smx:INFO: List of broken channels: []
16:03:31:ST3_smx:INFO: chip: 12-5 21.902970 C 1218.600960 mV
16:03:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
16:03:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
16:03:31:ST3_smx:INFO: Electrons
16:03:31:ST3_smx:INFO: # loops 0
16:03:32:ST3_smx:INFO: # loops 1
16:03:34:ST3_smx:INFO: # loops 2
16:03:35:ST3_smx:INFO: Total # of broken channels: 0
16:03:35:ST3_smx:INFO: List of broken channels: []
16:03:35:ST3_smx:INFO: Total # of broken channels: 0
16:03:35:ST3_smx:INFO: List of broken channels: []
16:03:37:ST3_smx:INFO: chip: 14-7 37.726682 C 1171.483840 mV
16:03:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
16:03:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
16:03:37:ST3_smx:INFO: Electrons
16:03:37:ST3_smx:INFO: # loops 0
16:03:38:ST3_smx:INFO: # loops 1
16:03:40:ST3_smx:INFO: # loops 2
16:03:41:ST3_smx:INFO: Total # of broken channels: 0
16:03:41:ST3_smx:INFO: List of broken channels: []
16:03:41:ST3_smx:INFO: Total # of broken channels: 0
16:03:41:ST3_smx:INFO: List of broken channels: []
16:03:42:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
16:03:42:febtest:INFO: 08-01 | XA-000-09-004-005-007-009-15 | 28.2 | 1212.7
16:03:42:febtest:INFO: 10-03 | XA-000-09-004-005-004-012-01 | 25.1 | 1230.3
16:03:42:febtest:INFO: 12-05 | XA-000-09-004-005-016-011-11 | 21.9 | 1242.0
16:03:42:febtest:INFO: 14-07 | XA-000-09-004-005-007-010-15 | 40.9 | 1189.2
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_02_03-16_02_57
OPERATOR : Henrik;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3114| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '0.9922', '1.852', '1.2660', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.0080', '1.850', '1.1650', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '0.9792', '1.851', '0.2647', '0.000', '0.0000', '0.000', '0.0000']