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FEB_3116 18.02.25 12:08:21
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12:08:21:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:08:21:ST3_Shared:INFO: FEB-Microcable
12:08:21:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:08:21:febtest:INFO: Testing FEB with SN 3116
12:08:22:smx_tester:INFO: Scanning setup
12:08:22:elinks:INFO: Disabling clock on downlink 0
12:08:22:elinks:INFO: Disabling clock on downlink 1
12:08:22:elinks:INFO: Disabling clock on downlink 2
12:08:22:elinks:INFO: Disabling clock on downlink 3
12:08:22:elinks:INFO: Disabling clock on downlink 4
12:08:22:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:08:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
12:08:23:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:08:23:elinks:INFO: Disabling clock on downlink 0
12:08:23:elinks:INFO: Disabling clock on downlink 1
12:08:23:elinks:INFO: Disabling clock on downlink 2
12:08:23:elinks:INFO: Disabling clock on downlink 3
12:08:23:elinks:INFO: Disabling clock on downlink 4
12:08:23:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:08:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
12:08:23:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
12:08:23:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
12:08:23:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
12:08:23:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
12:08:23:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
12:08:23:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
12:08:23:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
12:08:23:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
12:08:23:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
12:08:23:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
12:08:23:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
12:08:23:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
12:08:23:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
12:08:23:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
12:08:23:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
12:08:23:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
12:08:23:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:08:23:elinks:INFO: Disabling clock on downlink 0
12:08:23:elinks:INFO: Disabling clock on downlink 1
12:08:23:elinks:INFO: Disabling clock on downlink 2
12:08:23:elinks:INFO: Disabling clock on downlink 3
12:08:23:elinks:INFO: Disabling clock on downlink 4
12:08:23:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:08:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
12:08:23:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:08:23:elinks:INFO: Disabling clock on downlink 0
12:08:23:elinks:INFO: Disabling clock on downlink 1
12:08:23:elinks:INFO: Disabling clock on downlink 2
12:08:23:elinks:INFO: Disabling clock on downlink 3
12:08:23:elinks:INFO: Disabling clock on downlink 4
12:08:23:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:08:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
12:08:23:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:08:23:elinks:INFO: Disabling clock on downlink 0
12:08:23:elinks:INFO: Disabling clock on downlink 1
12:08:23:elinks:INFO: Disabling clock on downlink 2
12:08:23:elinks:INFO: Disabling clock on downlink 3
12:08:23:elinks:INFO: Disabling clock on downlink 4
12:08:23:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:08:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
12:08:23:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:08:23:setup_element:INFO: Scanning clock phase
12:08:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
12:08:23:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
12:08:23:setup_element:INFO: Clock phase scan results for group 0, downlink 1
12:08:23:setup_element:INFO: Eye window for uplink 0 : ___________________________________________________________________________XXXXX
Clock Delay: 37
12:08:23:setup_element:INFO: Eye window for uplink 1 : ___________________________________________________________________________XXXXX
Clock Delay: 37
12:08:23:setup_element:INFO: Eye window for uplink 2 : ___________________________________________________________________________XXXXX
Clock Delay: 37
12:08:23:setup_element:INFO: Eye window for uplink 3 : ___________________________________________________________________________XXXXX
Clock Delay: 37
12:08:23:setup_element:INFO: Eye window for uplink 4 : ___________________________________________________________________________XXXXX
Clock Delay: 37
12:08:23:setup_element:INFO: Eye window for uplink 5 : ___________________________________________________________________________XXXXX
Clock Delay: 37
12:08:23:setup_element:INFO: Eye window for uplink 6 : X__________________________________________________________________________XXXXX
Clock Delay: 37
12:08:23:setup_element:INFO: Eye window for uplink 7 : X__________________________________________________________________________XXXXX
Clock Delay: 37
12:08:23:setup_element:INFO: Eye window for uplink 8 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
12:08:23:setup_element:INFO: Eye window for uplink 9 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
12:08:23:setup_element:INFO: Eye window for uplink 10: __________________________________________________________________________XXXXX_
Clock Delay: 36
12:08:23:setup_element:INFO: Eye window for uplink 11: __________________________________________________________________________XXXXX_
Clock Delay: 36
12:08:23:setup_element:INFO: Eye window for uplink 12: __________________________________________________________________________XXXXX_
Clock Delay: 36
12:08:23:setup_element:INFO: Eye window for uplink 13: __________________________________________________________________________XXXXX_
Clock Delay: 36
12:08:23:setup_element:INFO: Eye window for uplink 14: __________________________________________________________________________XXXXX_
Clock Delay: 36
12:08:23:setup_element:INFO: Eye window for uplink 15: __________________________________________________________________________XXXXX_
Clock Delay: 36
12:08:23:setup_element:INFO: Setting the clock phase to 36 for group 0, downlink 1
12:08:23:setup_element:INFO: Scanning data phases
12:08:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
12:08:24:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
12:08:29:setup_element:INFO: Data phase scan results for group 0, downlink 1
12:08:29:setup_element:INFO: Eye window for uplink 0 : __________XXXXX_________________________
Data delay found: 32
12:08:29:setup_element:INFO: Eye window for uplink 1 : ______XXXXX_____________________________
Data delay found: 28
12:08:29:setup_element:INFO: Eye window for uplink 2 : ________XXXXX___________________________
Data delay found: 30
12:08:29:setup_element:INFO: Eye window for uplink 3 : ____XXXXX_______________________________
Data delay found: 26
12:08:29:setup_element:INFO: Eye window for uplink 4 : _______XXXX_____________________________
Data delay found: 28
12:08:29:setup_element:INFO: Eye window for uplink 5 : ___XXXX_________________________________
Data delay found: 24
12:08:29:setup_element:INFO: Eye window for uplink 6 : XXXX__________________________________XX
Data delay found: 20
12:08:29:setup_element:INFO: Eye window for uplink 7 : X__________________________________XXXXX
Data delay found: 17
12:08:29:setup_element:INFO: Eye window for uplink 8 : ______________________XXXXXX____________
Data delay found: 4
12:08:29:setup_element:INFO: Eye window for uplink 9 : ___________________________XXXXX________
Data delay found: 9
12:08:29:setup_element:INFO: Eye window for uplink 10: ___________________________XXXXX________
Data delay found: 9
12:08:29:setup_element:INFO: Eye window for uplink 11: ______________________________XXXXX_____
Data delay found: 12
12:08:29:setup_element:INFO: Eye window for uplink 12: __________________________XXXXX_________
Data delay found: 8
12:08:29:setup_element:INFO: Eye window for uplink 13: _____________________________XXXXX______
Data delay found: 11
12:08:29:setup_element:INFO: Eye window for uplink 14: ____________________________XXXX________
Data delay found: 9
12:08:29:setup_element:INFO: Eye window for uplink 15: ______________________________XXXXX_____
Data delay found: 12
12:08:29:setup_element:INFO: Setting the data phase to 32 for uplink 0
12:08:29:setup_element:INFO: Setting the data phase to 28 for uplink 1
12:08:29:setup_element:INFO: Setting the data phase to 30 for uplink 2
12:08:29:setup_element:INFO: Setting the data phase to 26 for uplink 3
12:08:29:setup_element:INFO: Setting the data phase to 28 for uplink 4
12:08:29:setup_element:INFO: Setting the data phase to 24 for uplink 5
12:08:29:setup_element:INFO: Setting the data phase to 20 for uplink 6
12:08:29:setup_element:INFO: Setting the data phase to 17 for uplink 7
12:08:29:setup_element:INFO: Setting the data phase to 4 for uplink 8
12:08:29:setup_element:INFO: Setting the data phase to 9 for uplink 9
12:08:29:setup_element:INFO: Setting the data phase to 9 for uplink 10
12:08:29:setup_element:INFO: Setting the data phase to 12 for uplink 11
12:08:29:setup_element:INFO: Setting the data phase to 8 for uplink 12
12:08:29:setup_element:INFO: Setting the data phase to 11 for uplink 13
12:08:29:setup_element:INFO: Setting the data phase to 9 for uplink 14
12:08:29:setup_element:INFO: Setting the data phase to 12 for uplink 15
12:08:29:setup_element:INFO: Beginning SMX ASICs map scan
12:08:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
12:08:29:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
12:08:29:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
12:08:29:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
12:08:29:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
12:08:29:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
12:08:29:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
12:08:29:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
12:08:29:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
12:08:29:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
12:08:29:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
12:08:29:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
12:08:29:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
12:08:29:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
12:08:29:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
12:08:30:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
12:08:30:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
12:08:30:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
12:08:30:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
12:08:30:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
12:08:30:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
12:08:31:setup_element:INFO: Performing Elink synchronization
12:08:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
12:08:31:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
12:08:31:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
12:08:31:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
12:08:31:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
12:08:31:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
12:08:32:febtest:INFO: Init all SMX (CSA): 30
12:08:46:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
12:08:46:febtest:INFO: 01-00 | XA-000-09-004-002-009-027-11 | 44.1 | 1130.0
12:08:46:febtest:INFO: 08-01 | XA-000-09-004-002-006-019-15 | 44.1 | 1141.9
12:08:46:febtest:INFO: 03-02 | XA-000-09-004-002-006-022-15 | 44.1 | 1135.9
12:08:47:febtest:INFO: 10-03 | XA-000-09-004-002-003-020-04 | 47.3 | 1135.9
12:08:47:febtest:INFO: 05-04 | XA-000-09-004-002-003-022-04 | 47.3 | 1130.0
12:08:47:febtest:INFO: 12-05 | XA-000-09-004-002-006-020-15 | 40.9 | 1159.7
12:08:47:febtest:INFO: 07-06 | XA-000-09-004-002-003-019-04 | 44.1 | 1159.7
12:08:47:febtest:INFO: 14-07 | XA-000-09-004-002-009-020-11 | 34.6 | 1177.4
12:08:48:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
12:08:50:ST3_smx:INFO: chip: 1-0 44.073563 C 1141.874115 mV
12:08:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:08:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:08:50:ST3_smx:INFO: Electrons
12:08:50:ST3_smx:INFO: # loops 0
12:08:52:ST3_smx:INFO: # loops 1
12:08:54:ST3_smx:INFO: # loops 2
12:08:55:ST3_smx:INFO: Total # of broken channels: 0
12:08:55:ST3_smx:INFO: List of broken channels: []
12:08:55:ST3_smx:INFO: Total # of broken channels: 0
12:08:55:ST3_smx:INFO: List of broken channels: []
12:08:57:ST3_smx:INFO: chip: 8-1 44.073563 C 1153.732915 mV
12:08:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:08:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:08:57:ST3_smx:INFO: Electrons
12:08:57:ST3_smx:INFO: # loops 0
12:08:58:ST3_smx:INFO: # loops 1
12:09:00:ST3_smx:INFO: # loops 2
12:09:02:ST3_smx:INFO: Total # of broken channels: 0
12:09:02:ST3_smx:INFO: List of broken channels: []
12:09:02:ST3_smx:INFO: Total # of broken channels: 0
12:09:02:ST3_smx:INFO: List of broken channels: []
12:09:03:ST3_smx:INFO: chip: 3-2 44.073563 C 1147.806000 mV
12:09:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:09:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:09:03:ST3_smx:INFO: Electrons
12:09:03:ST3_smx:INFO: # loops 0
12:09:05:ST3_smx:INFO: # loops 1
12:09:06:ST3_smx:INFO: # loops 2
12:09:08:ST3_smx:INFO: Total # of broken channels: 0
12:09:08:ST3_smx:INFO: List of broken channels: []
12:09:08:ST3_smx:INFO: Total # of broken channels: 1
12:09:08:ST3_smx:INFO: List of broken channels: [10]
12:09:09:ST3_smx:INFO: chip: 10-3 47.250730 C 1153.732915 mV
12:09:09:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:09:09:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:09:09:ST3_smx:INFO: Electrons
12:09:09:ST3_smx:INFO: # loops 0
12:09:11:ST3_smx:INFO: # loops 1
12:09:13:ST3_smx:INFO: # loops 2
12:09:14:ST3_smx:INFO: Total # of broken channels: 0
12:09:14:ST3_smx:INFO: List of broken channels: []
12:09:14:ST3_smx:INFO: Total # of broken channels: 0
12:09:14:ST3_smx:INFO: List of broken channels: []
12:09:16:ST3_smx:INFO: chip: 5-4 47.250730 C 1141.874115 mV
12:09:16:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:09:16:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:09:16:ST3_smx:INFO: Electrons
12:09:16:ST3_smx:INFO: # loops 0
12:09:18:ST3_smx:INFO: # loops 1
12:09:19:ST3_smx:INFO: # loops 2
12:09:21:ST3_smx:INFO: Total # of broken channels: 0
12:09:21:ST3_smx:INFO: List of broken channels: []
12:09:21:ST3_smx:INFO: Total # of broken channels: 0
12:09:21:ST3_smx:INFO: List of broken channels: []
12:09:22:ST3_smx:INFO: chip: 12-5 40.898880 C 1171.483840 mV
12:09:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:09:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:09:22:ST3_smx:INFO: Electrons
12:09:22:ST3_smx:INFO: # loops 0
12:09:24:ST3_smx:INFO: # loops 1
12:09:26:ST3_smx:INFO: # loops 2
12:09:27:ST3_smx:INFO: Total # of broken channels: 0
12:09:27:ST3_smx:INFO: List of broken channels: []
12:09:27:ST3_smx:INFO: Total # of broken channels: 0
12:09:27:ST3_smx:INFO: List of broken channels: []
12:09:29:ST3_smx:INFO: chip: 7-6 44.073563 C 1177.390875 mV
12:09:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:09:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:09:29:ST3_smx:INFO: Electrons
12:09:29:ST3_smx:INFO: # loops 0
12:09:30:ST3_smx:INFO: # loops 1
12:09:32:ST3_smx:INFO: # loops 2
12:09:33:ST3_smx:INFO: Total # of broken channels: 0
12:09:33:ST3_smx:INFO: List of broken channels: []
12:09:33:ST3_smx:INFO: Total # of broken channels: 0
12:09:33:ST3_smx:INFO: List of broken channels: []
12:09:35:ST3_smx:INFO: chip: 14-7 40.898880 C 1189.190035 mV
12:09:35:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:09:35:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:09:35:ST3_smx:INFO: Electrons
12:09:35:ST3_smx:INFO: # loops 0
12:09:36:ST3_smx:INFO: # loops 1
12:09:38:ST3_smx:INFO: # loops 2
12:09:39:ST3_smx:INFO: Total # of broken channels: 0
12:09:39:ST3_smx:INFO: List of broken channels: []
12:09:39:ST3_smx:INFO: Total # of broken channels: 0
12:09:39:ST3_smx:INFO: List of broken channels: []
12:09:40:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
12:09:40:febtest:INFO: 01-00 | XA-000-09-004-002-009-027-11 | 47.3 | 1159.7
12:09:40:febtest:INFO: 08-01 | XA-000-09-004-002-006-019-15 | 47.3 | 1177.4
12:09:40:febtest:INFO: 03-02 | XA-000-09-004-002-006-022-15 | 44.1 | 1171.5
12:09:40:febtest:INFO: 10-03 | XA-000-09-004-002-003-020-04 | 50.4 | 1165.6
12:09:41:febtest:INFO: 05-04 | XA-000-09-004-002-003-022-04 | 50.4 | 1159.7
12:09:41:febtest:INFO: 12-05 | XA-000-09-004-002-006-020-15 | 44.1 | 1195.1
12:09:41:febtest:INFO: 07-06 | XA-000-09-004-002-003-019-04 | 44.1 | 1242.0
12:09:41:febtest:INFO: 14-07 | XA-000-09-004-002-009-020-11 | 40.9 | 1212.7
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_02_18-12_08_21
OPERATOR : Henrik;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3116| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.8010', '1.851', '2.4300', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9840', '1.850', '2.4500', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.449', '1.9690', '1.850', '0.5295', '0.000', '0.0000', '0.000', '0.0000']