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FEB_3118 27.02.25 11:06:02
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11:06:02:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:06:02:ST3_Shared:INFO: FEB-Microcable
11:06:02:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:06:02:febtest:INFO: Testing FEB with SN 3118
11:06:04:smx_tester:INFO: Scanning setup
11:06:04:elinks:INFO: Disabling clock on downlink 0
11:06:04:elinks:INFO: Disabling clock on downlink 1
11:06:04:elinks:INFO: Disabling clock on downlink 2
11:06:04:elinks:INFO: Disabling clock on downlink 3
11:06:04:elinks:INFO: Disabling clock on downlink 4
11:06:04:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:06:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:06:04:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:06:04:elinks:INFO: Disabling clock on downlink 0
11:06:04:elinks:INFO: Disabling clock on downlink 1
11:06:04:elinks:INFO: Disabling clock on downlink 2
11:06:04:elinks:INFO: Disabling clock on downlink 3
11:06:04:elinks:INFO: Disabling clock on downlink 4
11:06:04:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:06:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:06:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
11:06:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
11:06:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
11:06:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
11:06:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
11:06:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
11:06:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
11:06:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
11:06:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
11:06:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
11:06:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
11:06:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
11:06:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
11:06:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
11:06:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
11:06:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
11:06:04:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:06:04:elinks:INFO: Disabling clock on downlink 0
11:06:04:elinks:INFO: Disabling clock on downlink 1
11:06:04:elinks:INFO: Disabling clock on downlink 2
11:06:04:elinks:INFO: Disabling clock on downlink 3
11:06:04:elinks:INFO: Disabling clock on downlink 4
11:06:04:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:06:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:06:04:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:06:04:elinks:INFO: Disabling clock on downlink 0
11:06:04:elinks:INFO: Disabling clock on downlink 1
11:06:05:elinks:INFO: Disabling clock on downlink 2
11:06:05:elinks:INFO: Disabling clock on downlink 3
11:06:05:elinks:INFO: Disabling clock on downlink 4
11:06:05:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:06:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
11:06:05:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:06:05:elinks:INFO: Disabling clock on downlink 0
11:06:05:elinks:INFO: Disabling clock on downlink 1
11:06:05:elinks:INFO: Disabling clock on downlink 2
11:06:05:elinks:INFO: Disabling clock on downlink 3
11:06:05:elinks:INFO: Disabling clock on downlink 4
11:06:05:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:06:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
11:06:05:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:06:05:setup_element:INFO: Scanning clock phase
11:06:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:06:05:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:06:05:setup_element:INFO: Clock phase scan results for group 0, downlink 1
11:06:05:setup_element:INFO: Eye window for uplink 0 : ___________________________________________________________________________XXXXX
Clock Delay: 37
11:06:05:setup_element:INFO: Eye window for uplink 1 : ___________________________________________________________________________XXXXX
Clock Delay: 37
11:06:05:setup_element:INFO: Eye window for uplink 2 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
11:06:05:setup_element:INFO: Eye window for uplink 3 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
11:06:05:setup_element:INFO: Eye window for uplink 4 : __________________________________________________________________________XXXXXX
Clock Delay: 36
11:06:05:setup_element:INFO: Eye window for uplink 5 : __________________________________________________________________________XXXXXX
Clock Delay: 36
11:06:05:setup_element:INFO: Eye window for uplink 6 : ___________________________________________________________________________XXXXX
Clock Delay: 37
11:06:05:setup_element:INFO: Eye window for uplink 7 : ___________________________________________________________________________XXXXX
Clock Delay: 37
11:06:05:setup_element:INFO: Eye window for uplink 8 : ________________________________________________________________________XXXXX___
Clock Delay: 34
11:06:05:setup_element:INFO: Eye window for uplink 9 : ________________________________________________________________________XXXXX___
Clock Delay: 34
11:06:05:setup_element:INFO: Eye window for uplink 10: ________________________________________________________________________________
Clock Delay: 40
11:06:05:setup_element:INFO: Eye window for uplink 11: ________________________________________________________________________________
Clock Delay: 40
11:06:05:setup_element:INFO: Eye window for uplink 12: ________________________________________________________________________________
Clock Delay: 40
11:06:05:setup_element:INFO: Eye window for uplink 13: ________________________________________________________________________________
Clock Delay: 40
11:06:05:setup_element:INFO: Eye window for uplink 14: ________________________________________________________________________________
Clock Delay: 40
11:06:05:setup_element:INFO: Eye window for uplink 15: ________________________________________________________________________________
Clock Delay: 40
11:06:05:setup_element:INFO: Setting the clock phase to 35 for group 0, downlink 1
11:06:05:setup_element:INFO: Scanning data phases
11:06:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:06:05:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:06:10:setup_element:INFO: Data phase scan results for group 0, downlink 1
11:06:10:setup_element:INFO: Eye window for uplink 0 : ___________XXXXX________________________
Data delay found: 33
11:06:10:setup_element:INFO: Eye window for uplink 1 : ______XXXXX_____________________________
Data delay found: 28
11:06:10:setup_element:INFO: Eye window for uplink 2 : ______XXXX______________________________
Data delay found: 27
11:06:10:setup_element:INFO: Eye window for uplink 3 : __XXXX__________________________________
Data delay found: 23
11:06:10:setup_element:INFO: Eye window for uplink 4 : _____XXXX_______________________________
Data delay found: 26
11:06:10:setup_element:INFO: Eye window for uplink 5 : __XXXX__________________________________
Data delay found: 23
11:06:10:setup_element:INFO: Eye window for uplink 6 : XXXX__________________________________XX
Data delay found: 20
11:06:10:setup_element:INFO: Eye window for uplink 7 : X__________________________________XXXXX
Data delay found: 17
11:06:10:setup_element:INFO: Eye window for uplink 8 : _____________________XXXXXX_____________
Data delay found: 3
11:06:10:setup_element:INFO: Eye window for uplink 9 : __________________________XXXXX_________
Data delay found: 8
11:06:10:setup_element:INFO: Eye window for uplink 10: ___________________________XXXXX________
Data delay found: 9
11:06:10:setup_element:INFO: Eye window for uplink 11: _______________________________XXXX_____
Data delay found: 12
11:06:10:setup_element:INFO: Eye window for uplink 12: ___________________________XXXXX________
Data delay found: 9
11:06:10:setup_element:INFO: Eye window for uplink 13: ______________________________XXXX______
Data delay found: 11
11:06:10:setup_element:INFO: Eye window for uplink 14: ____________________________XXXXX_______
Data delay found: 10
11:06:10:setup_element:INFO: Eye window for uplink 15: _____________________________XXXXXX_____
Data delay found: 11
11:06:10:setup_element:INFO: Setting the data phase to 33 for uplink 0
11:06:10:setup_element:INFO: Setting the data phase to 28 for uplink 1
11:06:10:setup_element:INFO: Setting the data phase to 27 for uplink 2
11:06:10:setup_element:INFO: Setting the data phase to 23 for uplink 3
11:06:10:setup_element:INFO: Setting the data phase to 26 for uplink 4
11:06:10:setup_element:INFO: Setting the data phase to 23 for uplink 5
11:06:10:setup_element:INFO: Setting the data phase to 20 for uplink 6
11:06:10:setup_element:INFO: Setting the data phase to 17 for uplink 7
11:06:10:setup_element:INFO: Setting the data phase to 3 for uplink 8
11:06:10:setup_element:INFO: Setting the data phase to 8 for uplink 9
11:06:10:setup_element:INFO: Setting the data phase to 9 for uplink 10
11:06:10:setup_element:INFO: Setting the data phase to 12 for uplink 11
11:06:10:setup_element:INFO: Setting the data phase to 9 for uplink 12
11:06:10:setup_element:INFO: Setting the data phase to 11 for uplink 13
11:06:10:setup_element:INFO: Setting the data phase to 10 for uplink 14
11:06:10:setup_element:INFO: Setting the data phase to 11 for uplink 15
11:06:10:setup_element:INFO: Beginning SMX ASICs map scan
11:06:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:06:10:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:06:10:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
11:06:10:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
11:06:10:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
11:06:10:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
11:06:10:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
11:06:11:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
11:06:11:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
11:06:11:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
11:06:11:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
11:06:11:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
11:06:11:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
11:06:11:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
11:06:11:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
11:06:11:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
11:06:11:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
11:06:11:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
11:06:11:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
11:06:12:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
11:06:12:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
11:06:13:setup_element:INFO: Performing Elink synchronization
11:06:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:06:13:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:06:13:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
11:06:13:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
11:06:13:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
11:06:13:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
11:06:14:febtest:INFO: Init all SMX (CSA): 30
11:06:28:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:06:29:febtest:INFO: 01-00 | XA-000-09-004-002-006-024-15 | 31.4 | 1171.5
11:06:29:febtest:INFO: 08-01 | XA-000-09-004-002-006-021-15 | 31.4 | 1171.5
11:06:29:febtest:INFO: 03-02 | XA-000-09-004-002-009-021-11 | 34.6 | 1159.7
11:06:29:febtest:INFO: 10-03 | XA-000-09-004-002-009-026-11 | 40.9 | 1153.7
11:06:29:febtest:INFO: 05-04 | XA-000-09-004-002-009-025-11 | 18.7 | 1218.6
11:06:30:febtest:INFO: 12-05 | XA-000-09-004-002-009-023-11 | 25.1 | 1206.9
11:06:30:febtest:INFO: 07-06 | XA-000-09-004-002-006-023-15 | 34.6 | 1165.6
11:06:30:febtest:INFO: 14-07 | XA-000-09-004-002-003-021-04 | 37.7 | 1159.7
11:06:31:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
11:06:33:ST3_smx:INFO: chip: 1-0 31.389742 C 1183.292940 mV
11:06:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:06:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:06:33:ST3_smx:INFO: Electrons
11:06:33:ST3_smx:INFO: # loops 0
11:06:35:ST3_smx:INFO: # loops 1
11:06:36:ST3_smx:INFO: # loops 2
11:06:38:ST3_smx:INFO: Total # of broken channels: 0
11:06:38:ST3_smx:INFO: List of broken channels: []
11:06:38:ST3_smx:INFO: Total # of broken channels: 0
11:06:38:ST3_smx:INFO: List of broken channels: []
11:06:40:ST3_smx:INFO: chip: 8-1 31.389742 C 1183.292940 mV
11:06:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:06:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:06:40:ST3_smx:INFO: Electrons
11:06:40:ST3_smx:INFO: # loops 0
11:06:42:ST3_smx:INFO: # loops 1
11:06:43:ST3_smx:INFO: # loops 2
11:06:45:ST3_smx:INFO: Total # of broken channels: 0
11:06:45:ST3_smx:INFO: List of broken channels: []
11:06:45:ST3_smx:INFO: Total # of broken channels: 0
11:06:45:ST3_smx:INFO: List of broken channels: []
11:06:47:ST3_smx:INFO: chip: 3-2 34.556970 C 1171.483840 mV
11:06:47:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:06:47:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:06:47:ST3_smx:INFO: Electrons
11:06:47:ST3_smx:INFO: # loops 0
11:06:48:ST3_smx:INFO: # loops 1
11:06:50:ST3_smx:INFO: # loops 2
11:06:51:ST3_smx:INFO: Total # of broken channels: 0
11:06:51:ST3_smx:INFO: List of broken channels: []
11:06:51:ST3_smx:INFO: Total # of broken channels: 0
11:06:51:ST3_smx:INFO: List of broken channels: []
11:06:53:ST3_smx:INFO: chip: 10-3 40.898880 C 1165.571835 mV
11:06:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:06:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:06:53:ST3_smx:INFO: Electrons
11:06:53:ST3_smx:INFO: # loops 0
11:06:54:ST3_smx:INFO: # loops 1
11:06:56:ST3_smx:INFO: # loops 2
11:06:57:ST3_smx:INFO: Total # of broken channels: 0
11:06:57:ST3_smx:INFO: List of broken channels: []
11:06:57:ST3_smx:INFO: Total # of broken channels: 0
11:06:57:ST3_smx:INFO: List of broken channels: []
11:06:59:ST3_smx:INFO: chip: 5-4 18.745682 C 1230.330540 mV
11:06:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:06:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:06:59:ST3_smx:INFO: Electrons
11:06:59:ST3_smx:INFO: # loops 0
11:07:01:ST3_smx:INFO: # loops 1
11:07:02:ST3_smx:INFO: # loops 2
11:07:04:ST3_smx:INFO: Total # of broken channels: 0
11:07:04:ST3_smx:INFO: List of broken channels: []
11:07:04:ST3_smx:INFO: Total # of broken channels: 0
11:07:04:ST3_smx:INFO: List of broken channels: []
11:07:05:ST3_smx:INFO: chip: 12-5 25.062742 C 1218.600960 mV
11:07:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:07:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:07:05:ST3_smx:INFO: Electrons
11:07:05:ST3_smx:INFO: # loops 0
11:07:07:ST3_smx:INFO: # loops 1
11:07:09:ST3_smx:INFO: # loops 2
11:07:10:ST3_smx:INFO: Total # of broken channels: 0
11:07:10:ST3_smx:INFO: List of broken channels: []
11:07:10:ST3_smx:INFO: Total # of broken channels: 0
11:07:10:ST3_smx:INFO: List of broken channels: []
11:07:12:ST3_smx:INFO: chip: 7-6 37.726682 C 1177.390875 mV
11:07:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:07:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:07:12:ST3_smx:INFO: Electrons
11:07:12:ST3_smx:INFO: # loops 0
11:07:13:ST3_smx:INFO: # loops 1
11:07:15:ST3_smx:INFO: # loops 2
11:07:17:ST3_smx:INFO: Total # of broken channels: 0
11:07:17:ST3_smx:INFO: List of broken channels: []
11:07:17:ST3_smx:INFO: Total # of broken channels: 0
11:07:17:ST3_smx:INFO: List of broken channels: []
11:07:19:ST3_smx:INFO: chip: 14-7 40.898880 C 1165.571835 mV
11:07:19:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:07:19:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:07:19:ST3_smx:INFO: Electrons
11:07:19:ST3_smx:INFO: # loops 0
11:07:20:ST3_smx:INFO: # loops 1
11:07:22:ST3_smx:INFO: # loops 2
11:07:23:ST3_smx:INFO: Total # of broken channels: 0
11:07:23:ST3_smx:INFO: List of broken channels: []
11:07:23:ST3_smx:INFO: Total # of broken channels: 0
11:07:23:ST3_smx:INFO: List of broken channels: []
11:07:23:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:07:24:febtest:INFO: 01-00 | XA-000-09-004-002-006-024-15 | 31.4 | 1201.0
11:07:24:febtest:INFO: 08-01 | XA-000-09-004-002-006-021-15 | 34.6 | 1206.9
11:07:24:febtest:INFO: 03-02 | XA-000-09-004-002-009-021-11 | 37.7 | 1189.2
11:07:24:febtest:INFO: 10-03 | XA-000-09-004-002-009-026-11 | 44.1 | 1183.3
11:07:24:febtest:INFO: 05-04 | XA-000-09-004-002-009-025-11 | 21.9 | 1253.7
11:07:25:febtest:INFO: 12-05 | XA-000-09-004-002-009-023-11 | 28.2 | 1242.0
11:07:25:febtest:INFO: 07-06 | XA-000-09-004-002-006-023-15 | 37.7 | 1195.1
11:07:25:febtest:INFO: 14-07 | XA-000-09-004-002-003-021-04 | 40.9 | 1189.2
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_02_27-11_06_02
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3118| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.5480', '1.853', '1.8180', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9780', '1.850', '2.4550', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9670', '1.850', '0.5222', '0.000', '0.0000', '0.000', '0.0000']