Go Back
FEB_3120 28.02.25 08:56:58
Info
08:56:58:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:56:58:ST3_Shared:INFO: FEB-Microcable
08:56:58:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:56:58:febtest:INFO: Testing FEB with SN 3120
08:57:00:smx_tester:INFO: Scanning setup
08:57:00:elinks:INFO: Disabling clock on downlink 0
08:57:00:elinks:INFO: Disabling clock on downlink 1
08:57:00:elinks:INFO: Disabling clock on downlink 2
08:57:00:elinks:INFO: Disabling clock on downlink 3
08:57:00:elinks:INFO: Disabling clock on downlink 4
08:57:00:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:57:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:57:00:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:57:00:elinks:INFO: Disabling clock on downlink 0
08:57:00:elinks:INFO: Disabling clock on downlink 1
08:57:00:elinks:INFO: Disabling clock on downlink 2
08:57:00:elinks:INFO: Disabling clock on downlink 3
08:57:00:elinks:INFO: Disabling clock on downlink 4
08:57:00:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:57:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:57:00:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
08:57:00:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
08:57:00:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
08:57:00:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
08:57:00:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
08:57:00:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
08:57:00:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
08:57:00:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
08:57:00:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
08:57:00:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
08:57:00:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
08:57:00:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
08:57:00:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
08:57:00:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
08:57:00:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
08:57:00:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
08:57:00:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:57:00:elinks:INFO: Disabling clock on downlink 0
08:57:00:elinks:INFO: Disabling clock on downlink 1
08:57:00:elinks:INFO: Disabling clock on downlink 2
08:57:00:elinks:INFO: Disabling clock on downlink 3
08:57:00:elinks:INFO: Disabling clock on downlink 4
08:57:00:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:57:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:57:00:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:57:00:elinks:INFO: Disabling clock on downlink 0
08:57:00:elinks:INFO: Disabling clock on downlink 1
08:57:00:elinks:INFO: Disabling clock on downlink 2
08:57:00:elinks:INFO: Disabling clock on downlink 3
08:57:00:elinks:INFO: Disabling clock on downlink 4
08:57:00:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:57:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
08:57:00:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:57:00:elinks:INFO: Disabling clock on downlink 0
08:57:00:elinks:INFO: Disabling clock on downlink 1
08:57:00:elinks:INFO: Disabling clock on downlink 2
08:57:00:elinks:INFO: Disabling clock on downlink 3
08:57:00:elinks:INFO: Disabling clock on downlink 4
08:57:00:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:57:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
08:57:00:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:57:00:setup_element:INFO: Scanning clock phase
08:57:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:57:01:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:57:01:setup_element:INFO: Clock phase scan results for group 0, downlink 1
08:57:01:setup_element:INFO: Eye window for uplink 0 : __________________________________________________________________________XXXXX_
Clock Delay: 36
08:57:01:setup_element:INFO: Eye window for uplink 1 : __________________________________________________________________________XXXXX_
Clock Delay: 36
08:57:01:setup_element:INFO: Eye window for uplink 2 : ___________________________________________________________________________XXXXX
Clock Delay: 37
08:57:01:setup_element:INFO: Eye window for uplink 3 : ___________________________________________________________________________XXXXX
Clock Delay: 37
08:57:01:setup_element:INFO: Eye window for uplink 4 : __________________________________________________________________________XXXX__
Clock Delay: 35
08:57:01:setup_element:INFO: Eye window for uplink 5 : __________________________________________________________________________XXXX__
Clock Delay: 35
08:57:01:setup_element:INFO: Eye window for uplink 6 : XX__________________________________________________________________________XXXX
Clock Delay: 38
08:57:01:setup_element:INFO: Eye window for uplink 7 : XX__________________________________________________________________________XXXX
Clock Delay: 38
08:57:01:setup_element:INFO: Eye window for uplink 8 : __________________________________________________________________________XXXXXX
Clock Delay: 36
08:57:01:setup_element:INFO: Eye window for uplink 9 : __________________________________________________________________________XXXXXX
Clock Delay: 36
08:57:01:setup_element:INFO: Eye window for uplink 10: __________________________________________________________________________XXXXX_
Clock Delay: 36
08:57:01:setup_element:INFO: Eye window for uplink 11: __________________________________________________________________________XXXXX_
Clock Delay: 36
08:57:01:setup_element:INFO: Eye window for uplink 12: __________________________________________________________________________XXXXX_
Clock Delay: 36
08:57:01:setup_element:INFO: Eye window for uplink 13: __________________________________________________________________________XXXXX_
Clock Delay: 36
08:57:01:setup_element:INFO: Eye window for uplink 14: _____________________________________________________________________________XXX
Clock Delay: 38
08:57:01:setup_element:INFO: Eye window for uplink 15: _____________________________________________________________________________XXX
Clock Delay: 38
08:57:01:setup_element:INFO: Setting the clock phase to 37 for group 0, downlink 1
08:57:01:setup_element:INFO: Scanning data phases
08:57:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:57:01:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:57:06:setup_element:INFO: Data phase scan results for group 0, downlink 1
08:57:06:setup_element:INFO: Eye window for uplink 0 : ________XXXX____________________________
Data delay found: 29
08:57:06:setup_element:INFO: Eye window for uplink 1 : ____XXXX________________________________
Data delay found: 25
08:57:06:setup_element:INFO: Eye window for uplink 2 : _____XXXXXX_____________________________
Data delay found: 27
08:57:06:setup_element:INFO: Eye window for uplink 3 : __XXXXX_________________________________
Data delay found: 24
08:57:06:setup_element:INFO: Eye window for uplink 4 : _XXXXX__________________________________
Data delay found: 23
08:57:06:setup_element:INFO: Eye window for uplink 5 : XX___________________________________XXX
Data delay found: 19
08:57:06:setup_element:INFO: Eye window for uplink 6 : XXXX_________________________________XXX
Data delay found: 20
08:57:06:setup_element:INFO: Eye window for uplink 7 : __________________________________XXXXX_
Data delay found: 16
08:57:06:setup_element:INFO: Eye window for uplink 8 : ________________________XXXXX___________
Data delay found: 6
08:57:06:setup_element:INFO: Eye window for uplink 9 : ____________________________XXXXX_______
Data delay found: 10
08:57:06:setup_element:INFO: Eye window for uplink 10: _________________________XXXXX__________
Data delay found: 7
08:57:06:setup_element:INFO: Eye window for uplink 11: ____________________________XXXXXX______
Data delay found: 10
08:57:06:setup_element:INFO: Eye window for uplink 12: __________________________XXXX__________
Data delay found: 7
08:57:06:setup_element:INFO: Eye window for uplink 13: _____________________________XXXX_______
Data delay found: 10
08:57:06:setup_element:INFO: Eye window for uplink 14: ____________________________XXXXX_______
Data delay found: 10
08:57:06:setup_element:INFO: Eye window for uplink 15: ______________________________XXXXX_____
Data delay found: 12
08:57:06:setup_element:INFO: Setting the data phase to 29 for uplink 0
08:57:06:setup_element:INFO: Setting the data phase to 25 for uplink 1
08:57:06:setup_element:INFO: Setting the data phase to 27 for uplink 2
08:57:06:setup_element:INFO: Setting the data phase to 24 for uplink 3
08:57:06:setup_element:INFO: Setting the data phase to 23 for uplink 4
08:57:06:setup_element:INFO: Setting the data phase to 19 for uplink 5
08:57:06:setup_element:INFO: Setting the data phase to 20 for uplink 6
08:57:06:setup_element:INFO: Setting the data phase to 16 for uplink 7
08:57:06:setup_element:INFO: Setting the data phase to 6 for uplink 8
08:57:06:setup_element:INFO: Setting the data phase to 10 for uplink 9
08:57:06:setup_element:INFO: Setting the data phase to 7 for uplink 10
08:57:06:setup_element:INFO: Setting the data phase to 10 for uplink 11
08:57:06:setup_element:INFO: Setting the data phase to 7 for uplink 12
08:57:06:setup_element:INFO: Setting the data phase to 10 for uplink 13
08:57:06:setup_element:INFO: Setting the data phase to 10 for uplink 14
08:57:06:setup_element:INFO: Setting the data phase to 12 for uplink 15
08:57:06:setup_element:INFO: Beginning SMX ASICs map scan
08:57:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:57:06:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:57:06:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
08:57:06:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
08:57:06:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
08:57:06:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
08:57:06:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
08:57:06:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
08:57:06:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
08:57:06:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
08:57:06:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
08:57:07:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
08:57:07:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
08:57:07:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
08:57:07:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
08:57:07:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
08:57:07:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
08:57:07:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
08:57:07:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
08:57:07:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
08:57:07:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
08:57:09:setup_element:INFO: Performing Elink synchronization
08:57:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:57:09:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:57:09:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
08:57:09:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
08:57:09:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
08:57:09:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
08:57:10:febtest:INFO: Init all SMX (CSA): 30
08:57:22:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:57:23:febtest:INFO: 01-00 | XA-000-09-004-005-010-024-15 | 47.3 | 1135.9
08:57:23:febtest:INFO: 08-01 | XA-000-09-004-005-016-022-12 | 25.1 | 1212.7
08:57:23:febtest:INFO: 03-02 | XA-000-09-004-005-013-022-07 | 44.1 | 1141.9
08:57:23:febtest:INFO: 10-03 | XA-000-09-004-005-013-025-07 | 28.2 | 1317.7
08:57:23:febtest:INFO: 05-04 | XA-000-09-004-005-013-024-07 | 37.7 | 1159.7
08:57:24:febtest:INFO: 12-05 | XA-000-09-004-005-007-023-08 | 40.9 | 1177.4
08:57:24:febtest:INFO: 07-06 | XA-000-09-004-005-004-023-06 | 47.3 | 1135.9
08:57:24:febtest:INFO: 14-07 | XA-000-09-004-005-016-023-12 | 31.4 | 1201.0
08:57:25:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
08:57:27:ST3_smx:INFO: chip: 1-0 47.250730 C 1147.806000 mV
08:57:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:57:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:57:27:ST3_smx:INFO: Electrons
08:57:27:ST3_smx:INFO: # loops 0
08:57:29:ST3_smx:INFO: # loops 1
08:57:30:ST3_smx:INFO: # loops 2
08:57:32:ST3_smx:INFO: Total # of broken channels: 0
08:57:32:ST3_smx:INFO: List of broken channels: []
08:57:32:ST3_smx:INFO: Total # of broken channels: 0
08:57:32:ST3_smx:INFO: List of broken channels: []
08:57:34:ST3_smx:INFO: chip: 8-1 25.062742 C 1230.330540 mV
08:57:34:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:57:34:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:57:34:ST3_smx:INFO: Electrons
08:57:34:ST3_smx:INFO: # loops 0
08:57:35:ST3_smx:INFO: # loops 1
08:57:37:ST3_smx:INFO: # loops 2
08:57:38:ST3_smx:INFO: Total # of broken channels: 0
08:57:38:ST3_smx:INFO: List of broken channels: []
08:57:38:ST3_smx:INFO: Total # of broken channels: 2
08:57:38:ST3_smx:INFO: List of broken channels: [5, 7]
08:57:40:ST3_smx:INFO: chip: 3-2 44.073563 C 1153.732915 mV
08:57:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:57:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:57:40:ST3_smx:INFO: Electrons
08:57:40:ST3_smx:INFO: # loops 0
08:57:41:ST3_smx:INFO: # loops 1
08:57:43:ST3_smx:INFO: # loops 2
08:57:44:ST3_smx:INFO: Total # of broken channels: 0
08:57:44:ST3_smx:INFO: List of broken channels: []
08:57:44:ST3_smx:INFO: Total # of broken channels: 0
08:57:44:ST3_smx:INFO: List of broken channels: []
08:57:46:ST3_smx:INFO: chip: 10-3 28.225000 C 1578.532875 mV
08:57:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:57:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:57:46:ST3_smx:INFO: Electrons
08:57:46:ST3_smx:INFO: # loops 0
08:57:47:ST3_smx:INFO: # loops 1
08:57:49:ST3_smx:INFO: # loops 2
08:57:51:ST3_smx:INFO: Total # of broken channels: 0
08:57:51:ST3_smx:INFO: List of broken channels: []
08:57:51:ST3_smx:INFO: Total # of broken channels: 0
08:57:51:ST3_smx:INFO: List of broken channels: []
08:57:52:ST3_smx:INFO: chip: 5-4 40.898880 C 1177.390875 mV
08:57:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:57:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:57:52:ST3_smx:INFO: Electrons
08:57:52:ST3_smx:INFO: # loops 0
08:57:54:ST3_smx:INFO: # loops 1
08:57:56:ST3_smx:INFO: # loops 2
08:57:57:ST3_smx:INFO: Total # of broken channels: 0
08:57:57:ST3_smx:INFO: List of broken channels: []
08:57:57:ST3_smx:INFO: Total # of broken channels: 3
08:57:57:ST3_smx:INFO: List of broken channels: [3, 5, 7]
08:57:59:ST3_smx:INFO: chip: 12-5 40.898880 C 1189.190035 mV
08:57:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:57:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:57:59:ST3_smx:INFO: Electrons
08:57:59:ST3_smx:INFO: # loops 0
08:58:00:ST3_smx:INFO: # loops 1
08:58:01:ST3_smx:INFO: # loops 2
08:58:03:ST3_smx:INFO: Total # of broken channels: 0
08:58:03:ST3_smx:INFO: List of broken channels: []
08:58:03:ST3_smx:INFO: Total # of broken channels: 15
08:58:03:ST3_smx:INFO: List of broken channels: [85, 91, 95, 99, 103, 105, 107, 109, 111, 113, 115, 117, 119, 121, 123]
08:58:04:ST3_smx:INFO: chip: 7-6 47.250730 C 1147.806000 mV
08:58:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:58:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:58:05:ST3_smx:INFO: Electrons
08:58:05:ST3_smx:INFO: # loops 0
08:58:06:ST3_smx:INFO: # loops 1
08:58:08:ST3_smx:INFO: # loops 2
08:58:09:ST3_smx:INFO: Total # of broken channels: 1
08:58:09:ST3_smx:INFO: List of broken channels: [78]
08:58:09:ST3_smx:INFO: Total # of broken channels: 2
08:58:09:ST3_smx:INFO: List of broken channels: [4, 78]
08:58:11:ST3_smx:INFO: chip: 14-7 34.556970 C 1212.728715 mV
08:58:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:58:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:58:11:ST3_smx:INFO: Electrons
08:58:11:ST3_smx:INFO: # loops 0
08:58:12:ST3_smx:INFO: # loops 1
08:58:14:ST3_smx:INFO: # loops 2
08:58:16:ST3_smx:INFO: Total # of broken channels: 0
08:58:16:ST3_smx:INFO: List of broken channels: []
08:58:16:ST3_smx:INFO: Total # of broken channels: 0
08:58:16:ST3_smx:INFO: List of broken channels: []
08:58:16:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:58:16:febtest:INFO: 01-00 | XA-000-09-004-005-010-024-15 | 47.3 | 1165.6
08:58:16:febtest:INFO: 08-01 | XA-000-09-004-005-016-022-12 | 25.1 | 1253.7
08:58:16:febtest:INFO: 03-02 | XA-000-09-004-005-013-022-07 | 44.1 | 1177.4
08:58:17:febtest:INFO: 10-03 | XA-000-09-004-005-013-025-07 | 18.7 | 1578.5
08:58:17:febtest:INFO: 05-04 | XA-000-09-004-005-013-024-07 | 40.9 | 1195.1
08:58:17:febtest:INFO: 12-05 | XA-000-09-004-005-007-023-08 | 40.9 | 1212.7
08:58:17:febtest:INFO: 07-06 | XA-000-09-004-005-004-023-06 | 50.4 | 1165.6
08:58:17:febtest:INFO: 14-07 | XA-000-09-004-005-016-023-12 | 34.6 | 1230.3
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_02_28-08_56_58
OPERATOR : Henrik;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3120| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.3990', '1.852', '2.3920', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9670', '1.850', '2.3840', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9440', '1.850', '0.5228', '0.000', '0.0000', '0.000', '0.0000']