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FEB_3122 04.03.25 12:08:41
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12:08:41:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:08:41:ST3_Shared:INFO: FEB-Microcable
12:08:41:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:08:41:febtest:INFO: Testing FEB with SN 3122
12:08:43:smx_tester:INFO: Scanning setup
12:08:43:elinks:INFO: Disabling clock on downlink 0
12:08:43:elinks:INFO: Disabling clock on downlink 1
12:08:43:elinks:INFO: Disabling clock on downlink 2
12:08:43:elinks:INFO: Disabling clock on downlink 3
12:08:43:elinks:INFO: Disabling clock on downlink 4
12:08:43:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:08:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
12:08:43:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:08:43:elinks:INFO: Disabling clock on downlink 0
12:08:43:elinks:INFO: Disabling clock on downlink 1
12:08:43:elinks:INFO: Disabling clock on downlink 2
12:08:43:elinks:INFO: Disabling clock on downlink 3
12:08:43:elinks:INFO: Disabling clock on downlink 4
12:08:43:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:08:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
12:08:43:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
12:08:43:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
12:08:43:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
12:08:43:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
12:08:43:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
12:08:43:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
12:08:43:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
12:08:43:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
12:08:43:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
12:08:43:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
12:08:43:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
12:08:43:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
12:08:43:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
12:08:43:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
12:08:43:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
12:08:43:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
12:08:43:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:08:43:elinks:INFO: Disabling clock on downlink 0
12:08:43:elinks:INFO: Disabling clock on downlink 1
12:08:43:elinks:INFO: Disabling clock on downlink 2
12:08:43:elinks:INFO: Disabling clock on downlink 3
12:08:43:elinks:INFO: Disabling clock on downlink 4
12:08:43:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:08:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
12:08:44:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:08:44:elinks:INFO: Disabling clock on downlink 0
12:08:44:elinks:INFO: Disabling clock on downlink 1
12:08:44:elinks:INFO: Disabling clock on downlink 2
12:08:44:elinks:INFO: Disabling clock on downlink 3
12:08:44:elinks:INFO: Disabling clock on downlink 4
12:08:44:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:08:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
12:08:44:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:08:44:elinks:INFO: Disabling clock on downlink 0
12:08:44:elinks:INFO: Disabling clock on downlink 1
12:08:44:elinks:INFO: Disabling clock on downlink 2
12:08:44:elinks:INFO: Disabling clock on downlink 3
12:08:44:elinks:INFO: Disabling clock on downlink 4
12:08:44:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:08:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
12:08:44:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:08:44:setup_element:INFO: Scanning clock phase
12:08:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
12:08:44:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
12:08:44:setup_element:INFO: Clock phase scan results for group 0, downlink 1
12:08:44:setup_element:INFO: Eye window for uplink 0 : ___________________________________________________________________________XXXXX
Clock Delay: 37
12:08:44:setup_element:INFO: Eye window for uplink 1 : ___________________________________________________________________________XXXXX
Clock Delay: 37
12:08:44:setup_element:INFO: Eye window for uplink 2 : X__________________________________________________________________________XXXXX
Clock Delay: 37
12:08:44:setup_element:INFO: Eye window for uplink 3 : X__________________________________________________________________________XXXXX
Clock Delay: 37
12:08:44:setup_element:INFO: Eye window for uplink 4 : ___________________________________________________________________________XXXXX
Clock Delay: 37
12:08:44:setup_element:INFO: Eye window for uplink 5 : ___________________________________________________________________________XXXXX
Clock Delay: 37
12:08:44:setup_element:INFO: Eye window for uplink 6 : ___________________________________________________________________________XXXX_
Clock Delay: 36
12:08:44:setup_element:INFO: Eye window for uplink 7 : ___________________________________________________________________________XXXX_
Clock Delay: 36
12:08:44:setup_element:INFO: Eye window for uplink 8 : _________________________________________________________________________XXXXX__
Clock Delay: 35
12:08:44:setup_element:INFO: Eye window for uplink 9 : _________________________________________________________________________XXXXX__
Clock Delay: 35
12:08:44:setup_element:INFO: Eye window for uplink 10: _________________________________________________________________________XXXXXX_
Clock Delay: 35
12:08:44:setup_element:INFO: Eye window for uplink 11: _________________________________________________________________________XXXXXX_
Clock Delay: 35
12:08:44:setup_element:INFO: Eye window for uplink 12: __________________________________________________________________________XXXXX_
Clock Delay: 36
12:08:44:setup_element:INFO: Eye window for uplink 13: __________________________________________________________________________XXXXX_
Clock Delay: 36
12:08:44:setup_element:INFO: Eye window for uplink 14: _________________________________________________________________________XXXXXX_
Clock Delay: 35
12:08:44:setup_element:INFO: Eye window for uplink 15: _________________________________________________________________________XXXXXX_
Clock Delay: 35
12:08:44:setup_element:INFO: Setting the clock phase to 36 for group 0, downlink 1
12:08:44:setup_element:INFO: Scanning data phases
12:08:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
12:08:44:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
12:08:49:setup_element:INFO: Data phase scan results for group 0, downlink 1
12:08:49:setup_element:INFO: Eye window for uplink 0 : __________XXXXXX________________________
Data delay found: 32
12:08:49:setup_element:INFO: Eye window for uplink 1 : ______XXXXX_____________________________
Data delay found: 28
12:08:49:setup_element:INFO: Eye window for uplink 2 : __________XXXXX_________________________
Data delay found: 32
12:08:49:setup_element:INFO: Eye window for uplink 3 : ______XXXX______________________________
Data delay found: 27
12:08:49:setup_element:INFO: Eye window for uplink 4 : ____XXXX________________________________
Data delay found: 25
12:08:49:setup_element:INFO: Eye window for uplink 5 : XXXXX___________________________________
Data delay found: 22
12:08:49:setup_element:INFO: Eye window for uplink 6 : XX__________________________________XXXX
Data delay found: 18
12:08:49:setup_element:INFO: Eye window for uplink 7 : ________________________________XXXXX___
Data delay found: 14
12:08:49:setup_element:INFO: Eye window for uplink 8 : ______________________XXXXX_____________
Data delay found: 4
12:08:49:setup_element:INFO: Eye window for uplink 9 : ___________________________XXXXX________
Data delay found: 9
12:08:49:setup_element:INFO: Eye window for uplink 10: __________________________XXXX__________
Data delay found: 7
12:08:49:setup_element:INFO: Eye window for uplink 11: _____________________________XXXXX______
Data delay found: 11
12:08:49:setup_element:INFO: Eye window for uplink 12: ___________________________XXXX_________
Data delay found: 8
12:08:49:setup_element:INFO: Eye window for uplink 13: ______________________________XXXX______
Data delay found: 11
12:08:49:setup_element:INFO: Eye window for uplink 14: ___________________________XXXXXX_______
Data delay found: 9
12:08:49:setup_element:INFO: Eye window for uplink 15: _____________________________XXXXXX_____
Data delay found: 11
12:08:49:setup_element:INFO: Setting the data phase to 32 for uplink 0
12:08:49:setup_element:INFO: Setting the data phase to 28 for uplink 1
12:08:49:setup_element:INFO: Setting the data phase to 32 for uplink 2
12:08:49:setup_element:INFO: Setting the data phase to 27 for uplink 3
12:08:49:setup_element:INFO: Setting the data phase to 25 for uplink 4
12:08:49:setup_element:INFO: Setting the data phase to 22 for uplink 5
12:08:49:setup_element:INFO: Setting the data phase to 18 for uplink 6
12:08:49:setup_element:INFO: Setting the data phase to 14 for uplink 7
12:08:49:setup_element:INFO: Setting the data phase to 4 for uplink 8
12:08:49:setup_element:INFO: Setting the data phase to 9 for uplink 9
12:08:49:setup_element:INFO: Setting the data phase to 7 for uplink 10
12:08:49:setup_element:INFO: Setting the data phase to 11 for uplink 11
12:08:49:setup_element:INFO: Setting the data phase to 8 for uplink 12
12:08:49:setup_element:INFO: Setting the data phase to 11 for uplink 13
12:08:49:setup_element:INFO: Setting the data phase to 9 for uplink 14
12:08:49:setup_element:INFO: Setting the data phase to 11 for uplink 15
12:08:49:setup_element:INFO: Beginning SMX ASICs map scan
12:08:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
12:08:49:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
12:08:50:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
12:08:50:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
12:08:50:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
12:08:50:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
12:08:50:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
12:08:50:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
12:08:50:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
12:08:50:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
12:08:50:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
12:08:50:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
12:08:50:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
12:08:50:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
12:08:50:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
12:08:50:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
12:08:51:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
12:08:51:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
12:08:51:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
12:08:51:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
12:08:51:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
12:08:52:setup_element:INFO: Performing Elink synchronization
12:08:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
12:08:52:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
12:08:52:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
12:08:52:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
12:08:52:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
12:08:52:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
12:08:53:febtest:INFO: Init all SMX (CSA): 30
12:09:10:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
12:09:10:febtest:INFO: 01-00 | XA-000-09-004-005-018-015-08 | 25.1 | 1195.1
12:09:10:febtest:INFO: 08-01 | XA-000-09-004-005-006-013-02 | 37.7 | 1165.6
12:09:10:febtest:INFO: 03-02 | XA-000-09-004-005-018-014-08 | 28.2 | 1189.2
12:09:11:febtest:INFO: 10-03 | XA-000-09-004-005-003-013-09 | 34.6 | 1189.2
12:09:11:febtest:INFO: 05-04 | XA-000-09-004-005-015-014-03 | 25.1 | 1206.9
12:09:11:febtest:INFO: 12-05 | XA-000-09-004-005-003-014-09 | 44.1 | 1147.8
12:09:11:febtest:INFO: 07-06 | XA-000-09-004-005-012-014-13 | 40.9 | 1165.6
12:09:12:febtest:INFO: 14-07 | XA-000-09-004-005-006-014-02 | 37.7 | 1177.4
12:09:13:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
12:09:14:ST3_smx:INFO: chip: 1-0 28.225000 C 1206.851500 mV
12:09:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:09:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:09:14:ST3_smx:INFO: Electrons
12:09:14:ST3_smx:INFO: # loops 0
12:09:16:ST3_smx:INFO: # loops 1
12:09:18:ST3_smx:INFO: # loops 2
12:09:20:ST3_smx:INFO: Total # of broken channels: 0
12:09:20:ST3_smx:INFO: List of broken channels: []
12:09:20:ST3_smx:INFO: Total # of broken channels: 0
12:09:20:ST3_smx:INFO: List of broken channels: []
12:09:22:ST3_smx:INFO: chip: 8-1 37.726682 C 1177.390875 mV
12:09:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:09:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:09:22:ST3_smx:INFO: Electrons
12:09:22:ST3_smx:INFO: # loops 0
12:09:24:ST3_smx:INFO: # loops 1
12:09:26:ST3_smx:INFO: # loops 2
12:09:28:ST3_smx:INFO: Total # of broken channels: 0
12:09:28:ST3_smx:INFO: List of broken channels: []
12:09:28:ST3_smx:INFO: Total # of broken channels: 5
12:09:28:ST3_smx:INFO: List of broken channels: [1, 3, 5, 7, 11]
12:09:29:ST3_smx:INFO: chip: 3-2 28.225000 C 1200.969315 mV
12:09:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:09:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:09:30:ST3_smx:INFO: Electrons
12:09:30:ST3_smx:INFO: # loops 0
12:09:31:ST3_smx:INFO: # loops 1
12:09:33:ST3_smx:INFO: # loops 2
12:09:35:ST3_smx:INFO: Total # of broken channels: 0
12:09:35:ST3_smx:INFO: List of broken channels: []
12:09:35:ST3_smx:INFO: Total # of broken channels: 0
12:09:35:ST3_smx:INFO: List of broken channels: []
12:09:37:ST3_smx:INFO: chip: 10-3 34.556970 C 1200.969315 mV
12:09:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:09:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:09:37:ST3_smx:INFO: Electrons
12:09:37:ST3_smx:INFO: # loops 0
12:09:39:ST3_smx:INFO: # loops 1
12:09:41:ST3_smx:INFO: # loops 2
12:09:43:ST3_smx:INFO: Total # of broken channels: 0
12:09:43:ST3_smx:INFO: List of broken channels: []
12:09:43:ST3_smx:INFO: Total # of broken channels: 0
12:09:43:ST3_smx:INFO: List of broken channels: []
12:09:45:ST3_smx:INFO: chip: 5-4 25.062742 C 1218.600960 mV
12:09:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:09:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:09:45:ST3_smx:INFO: Electrons
12:09:45:ST3_smx:INFO: # loops 0
12:09:46:ST3_smx:INFO: # loops 1
12:09:48:ST3_smx:INFO: # loops 2
12:09:50:ST3_smx:INFO: Total # of broken channels: 0
12:09:50:ST3_smx:INFO: List of broken channels: []
12:09:50:ST3_smx:INFO: Total # of broken channels: 0
12:09:50:ST3_smx:INFO: List of broken channels: []
12:09:52:ST3_smx:INFO: chip: 12-5 47.250730 C 1165.571835 mV
12:09:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:09:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:09:52:ST3_smx:INFO: Electrons
12:09:52:ST3_smx:INFO: # loops 0
12:09:54:ST3_smx:INFO: # loops 1
12:09:56:ST3_smx:INFO: # loops 2
12:09:58:ST3_smx:INFO: Total # of broken channels: 0
12:09:58:ST3_smx:INFO: List of broken channels: []
12:09:58:ST3_smx:INFO: Total # of broken channels: 0
12:09:58:ST3_smx:INFO: List of broken channels: []
12:10:00:ST3_smx:INFO: chip: 7-6 44.073563 C 1171.483840 mV
12:10:00:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:10:00:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:10:00:ST3_smx:INFO: Electrons
12:10:00:ST3_smx:INFO: # loops 0
12:10:02:ST3_smx:INFO: # loops 1
12:10:04:ST3_smx:INFO: # loops 2
12:10:06:ST3_smx:INFO: Total # of broken channels: 0
12:10:06:ST3_smx:INFO: List of broken channels: []
12:10:06:ST3_smx:INFO: Total # of broken channels: 0
12:10:06:ST3_smx:INFO: List of broken channels: []
12:10:07:ST3_smx:INFO: chip: 14-7 44.073563 C 1189.190035 mV
12:10:07:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:10:07:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:10:07:ST3_smx:INFO: Electrons
12:10:07:ST3_smx:INFO: # loops 0
12:10:09:ST3_smx:INFO: # loops 1
12:10:12:ST3_smx:INFO: # loops 2
12:10:13:ST3_smx:INFO: Total # of broken channels: 0
12:10:13:ST3_smx:INFO: List of broken channels: []
12:10:13:ST3_smx:INFO: Total # of broken channels: 0
12:10:13:ST3_smx:INFO: List of broken channels: []
12:10:14:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
12:10:14:febtest:INFO: 01-00 | XA-000-09-004-005-018-015-08 | 31.4 | 1224.5
12:10:14:febtest:INFO: 08-01 | XA-000-09-004-005-006-013-02 | 40.9 | 1201.0
12:10:14:febtest:INFO: 03-02 | XA-000-09-004-005-018-014-08 | 31.4 | 1218.6
12:10:15:febtest:INFO: 10-03 | XA-000-09-004-005-003-013-09 | 37.7 | 1224.5
12:10:15:febtest:INFO: 05-04 | XA-000-09-004-005-015-014-03 | 28.2 | 1236.2
12:10:15:febtest:INFO: 12-05 | XA-000-09-004-005-003-014-09 | 47.3 | 1177.4
12:10:15:febtest:INFO: 07-06 | XA-000-09-004-005-012-014-13 | 44.1 | 1189.2
12:10:15:febtest:INFO: 14-07 | XA-000-09-004-005-006-014-02 | 44.1 | 1212.7
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_03_04-12_08_41
OPERATOR : Henrik;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3122| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.4920', '1.850', '2.1800', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9530', '1.850', '2.3410', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9410', '1.850', '0.5219', '0.000', '0.0000', '0.000', '0.0000']