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FEB_3123 05.03.25 15:32:00
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15:32:00:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:32:00:ST3_Shared:INFO: FEB-Microcable
15:32:00:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:32:00:febtest:INFO: Testing FEB with SN 3123
15:32:02:smx_tester:INFO: Scanning setup
15:32:02:elinks:INFO: Disabling clock on downlink 0
15:32:02:elinks:INFO: Disabling clock on downlink 1
15:32:02:elinks:INFO: Disabling clock on downlink 2
15:32:02:elinks:INFO: Disabling clock on downlink 3
15:32:02:elinks:INFO: Disabling clock on downlink 4
15:32:02:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:32:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
15:32:02:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:32:02:elinks:INFO: Disabling clock on downlink 0
15:32:02:elinks:INFO: Disabling clock on downlink 1
15:32:02:elinks:INFO: Disabling clock on downlink 2
15:32:02:elinks:INFO: Disabling clock on downlink 3
15:32:02:elinks:INFO: Disabling clock on downlink 4
15:32:02:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:32:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:32:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
15:32:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
15:32:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
15:32:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
15:32:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
15:32:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
15:32:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
15:32:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
15:32:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
15:32:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
15:32:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
15:32:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
15:32:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
15:32:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
15:32:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
15:32:02:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
15:32:02:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:32:02:elinks:INFO: Disabling clock on downlink 0
15:32:02:elinks:INFO: Disabling clock on downlink 1
15:32:02:elinks:INFO: Disabling clock on downlink 2
15:32:02:elinks:INFO: Disabling clock on downlink 3
15:32:02:elinks:INFO: Disabling clock on downlink 4
15:32:02:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:32:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:32:02:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:32:02:elinks:INFO: Disabling clock on downlink 0
15:32:02:elinks:INFO: Disabling clock on downlink 1
15:32:02:elinks:INFO: Disabling clock on downlink 2
15:32:02:elinks:INFO: Disabling clock on downlink 3
15:32:02:elinks:INFO: Disabling clock on downlink 4
15:32:02:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:32:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
15:32:02:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:32:02:elinks:INFO: Disabling clock on downlink 0
15:32:02:elinks:INFO: Disabling clock on downlink 1
15:32:02:elinks:INFO: Disabling clock on downlink 2
15:32:02:elinks:INFO: Disabling clock on downlink 3
15:32:02:elinks:INFO: Disabling clock on downlink 4
15:32:02:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:32:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
15:32:03:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:32:03:setup_element:INFO: Scanning clock phase
15:32:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:32:03:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
15:32:03:setup_element:INFO: Clock phase scan results for group 0, downlink 1
15:32:03:setup_element:INFO: Eye window for uplink 0 : XX_________________________________________________________________________XXXXX
Clock Delay: 38
15:32:03:setup_element:INFO: Eye window for uplink 1 : XX_________________________________________________________________________XXXXX
Clock Delay: 38
15:32:03:setup_element:INFO: Eye window for uplink 2 : ___________________________________________________________________________XXXXX
Clock Delay: 37
15:32:03:setup_element:INFO: Eye window for uplink 3 : ___________________________________________________________________________XXXXX
Clock Delay: 37
15:32:03:setup_element:INFO: Eye window for uplink 4 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
15:32:03:setup_element:INFO: Eye window for uplink 5 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
15:32:03:setup_element:INFO: Eye window for uplink 6 : ___________________________________________________________________________XXX__
Clock Delay: 36
15:32:03:setup_element:INFO: Eye window for uplink 7 : ___________________________________________________________________________XXX__
Clock Delay: 36
15:32:03:setup_element:INFO: Eye window for uplink 8 : _________________________________________________________________________XXXXX__
Clock Delay: 35
15:32:03:setup_element:INFO: Eye window for uplink 9 : _________________________________________________________________________XXXXX__
Clock Delay: 35
15:32:03:setup_element:INFO: Eye window for uplink 10: ___________________________________________________________________________XXXXX
Clock Delay: 37
15:32:03:setup_element:INFO: Eye window for uplink 11: ___________________________________________________________________________XXXXX
Clock Delay: 37
15:32:03:setup_element:INFO: Eye window for uplink 12: __________________________________________________________________________XXXXX_
Clock Delay: 36
15:32:03:setup_element:INFO: Eye window for uplink 13: __________________________________________________________________________XXXXX_
Clock Delay: 36
15:32:03:setup_element:INFO: Eye window for uplink 14: ___________________________________________________________________________XXX__
Clock Delay: 36
15:32:03:setup_element:INFO: Eye window for uplink 15: ___________________________________________________________________________XXX__
Clock Delay: 36
15:32:03:setup_element:INFO: Setting the clock phase to 37 for group 0, downlink 1
15:32:03:setup_element:INFO: Scanning data phases
15:32:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:32:03:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
15:32:08:setup_element:INFO: Data phase scan results for group 0, downlink 1
15:32:08:setup_element:INFO: Eye window for uplink 0 : ___________XXXXX________________________
Data delay found: 33
15:32:08:setup_element:INFO: Eye window for uplink 1 : _______XXXXX____________________________
Data delay found: 29
15:32:08:setup_element:INFO: Eye window for uplink 2 : _____XXXXX______________________________
Data delay found: 27
15:32:08:setup_element:INFO: Eye window for uplink 3 : __XXXX__________________________________
Data delay found: 23
15:32:08:setup_element:INFO: Eye window for uplink 4 : XXXXX___________________________________
Data delay found: 22
15:32:08:setup_element:INFO: Eye window for uplink 5 : X___________________________________XXXX
Data delay found: 18
15:32:08:setup_element:INFO: Eye window for uplink 6 : _________________________________XXXXX__
Data delay found: 15
15:32:08:setup_element:INFO: Eye window for uplink 7 : _______________________________XXXX_____
Data delay found: 12
15:32:08:setup_element:INFO: Eye window for uplink 8 : _____________________XXXXXX_____________
Data delay found: 3
15:32:08:setup_element:INFO: Eye window for uplink 9 : __________________________XXXXXX________
Data delay found: 8
15:32:08:setup_element:INFO: Eye window for uplink 10: ___________________________XXXXX________
Data delay found: 9
15:32:08:setup_element:INFO: Eye window for uplink 11: ______________________________XXXXXX____
Data delay found: 12
15:32:08:setup_element:INFO: Eye window for uplink 12: _________________________XXXX___________
Data delay found: 6
15:32:08:setup_element:INFO: Eye window for uplink 13: ____________________________XXXX________
Data delay found: 9
15:32:08:setup_element:INFO: Eye window for uplink 14: __________________________XXXXX_________
Data delay found: 8
15:32:08:setup_element:INFO: Eye window for uplink 15: ____________________________XXXX________
Data delay found: 9
15:32:08:setup_element:INFO: Setting the data phase to 33 for uplink 0
15:32:08:setup_element:INFO: Setting the data phase to 29 for uplink 1
15:32:08:setup_element:INFO: Setting the data phase to 27 for uplink 2
15:32:08:setup_element:INFO: Setting the data phase to 23 for uplink 3
15:32:08:setup_element:INFO: Setting the data phase to 22 for uplink 4
15:32:08:setup_element:INFO: Setting the data phase to 18 for uplink 5
15:32:08:setup_element:INFO: Setting the data phase to 15 for uplink 6
15:32:08:setup_element:INFO: Setting the data phase to 12 for uplink 7
15:32:08:setup_element:INFO: Setting the data phase to 3 for uplink 8
15:32:08:setup_element:INFO: Setting the data phase to 8 for uplink 9
15:32:08:setup_element:INFO: Setting the data phase to 9 for uplink 10
15:32:08:setup_element:INFO: Setting the data phase to 12 for uplink 11
15:32:08:setup_element:INFO: Setting the data phase to 6 for uplink 12
15:32:08:setup_element:INFO: Setting the data phase to 9 for uplink 13
15:32:08:setup_element:INFO: Setting the data phase to 8 for uplink 14
15:32:08:setup_element:INFO: Setting the data phase to 9 for uplink 15
15:32:08:setup_element:INFO: Beginning SMX ASICs map scan
15:32:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:32:08:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
15:32:08:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
15:32:08:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
15:32:08:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
15:32:08:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
15:32:08:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
15:32:09:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
15:32:09:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
15:32:09:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
15:32:09:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
15:32:09:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
15:32:09:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
15:32:09:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
15:32:09:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
15:32:09:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
15:32:09:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
15:32:09:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
15:32:10:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
15:32:10:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
15:32:10:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
15:32:11:setup_element:INFO: Performing Elink synchronization
15:32:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:32:11:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
15:32:11:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
15:32:11:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
15:32:11:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
15:32:11:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
15:32:12:febtest:INFO: Init all SMX (CSA): 30
15:32:29:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
15:32:30:febtest:INFO: 01-00 | XA-000-09-004-005-003-017-14 | 37.7 | 1165.6
15:32:30:febtest:INFO: 08-01 | XA-000-09-004-005-015-017-04 | 34.6 | 1183.3
15:32:30:febtest:INFO: 03-02 | XA-000-09-004-005-003-018-14 | 28.2 | 1195.1
15:32:30:febtest:INFO: 10-03 | XA-000-09-004-005-018-017-15 | 28.2 | 1195.1
15:32:31:febtest:INFO: 05-04 | XA-000-09-004-005-006-018-05 | 37.7 | 1171.5
15:32:31:febtest:INFO: 12-05 | XA-000-09-004-005-003-015-09 | 50.4 | 1124.0
15:32:31:febtest:INFO: 07-06 | XA-000-09-004-005-012-018-10 | 34.6 | 1171.5
15:32:31:febtest:INFO: 14-07 | XA-000-09-004-005-012-017-10 | 37.7 | 1183.3
15:32:32:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
15:32:34:ST3_smx:INFO: chip: 1-0 37.726682 C 1177.390875 mV
15:32:34:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:32:34:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:32:34:ST3_smx:INFO: Electrons
15:32:34:ST3_smx:INFO: # loops 0
15:32:36:ST3_smx:INFO: # loops 1
15:32:38:ST3_smx:INFO: # loops 2
15:32:40:ST3_smx:INFO: Total # of broken channels: 0
15:32:40:ST3_smx:INFO: List of broken channels: []
15:32:40:ST3_smx:INFO: Total # of broken channels: 0
15:32:40:ST3_smx:INFO: List of broken channels: []
15:32:42:ST3_smx:INFO: chip: 8-1 34.556970 C 1189.190035 mV
15:32:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:32:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:32:42:ST3_smx:INFO: Electrons
15:32:42:ST3_smx:INFO: # loops 0
15:32:44:ST3_smx:INFO: # loops 1
15:32:46:ST3_smx:INFO: # loops 2
15:32:48:ST3_smx:INFO: Total # of broken channels: 0
15:32:48:ST3_smx:INFO: List of broken channels: []
15:32:48:ST3_smx:INFO: Total # of broken channels: 0
15:32:48:ST3_smx:INFO: List of broken channels: []
15:32:49:ST3_smx:INFO: chip: 3-2 28.225000 C 1212.728715 mV
15:32:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:32:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:32:49:ST3_smx:INFO: Electrons
15:32:49:ST3_smx:INFO: # loops 0
15:32:51:ST3_smx:INFO: # loops 1
15:32:53:ST3_smx:INFO: # loops 2
15:32:55:ST3_smx:INFO: Total # of broken channels: 0
15:32:55:ST3_smx:INFO: List of broken channels: []
15:32:55:ST3_smx:INFO: Total # of broken channels: 0
15:32:55:ST3_smx:INFO: List of broken channels: []
15:32:56:ST3_smx:INFO: chip: 10-3 28.225000 C 1212.728715 mV
15:32:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:32:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:32:56:ST3_smx:INFO: Electrons
15:32:56:ST3_smx:INFO: # loops 0
15:32:58:ST3_smx:INFO: # loops 1
15:33:00:ST3_smx:INFO: # loops 2
15:33:02:ST3_smx:INFO: Total # of broken channels: 0
15:33:02:ST3_smx:INFO: List of broken channels: []
15:33:02:ST3_smx:INFO: Total # of broken channels: 0
15:33:02:ST3_smx:INFO: List of broken channels: []
15:33:04:ST3_smx:INFO: chip: 5-4 37.726682 C 1183.292940 mV
15:33:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:33:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:33:04:ST3_smx:INFO: Electrons
15:33:04:ST3_smx:INFO: # loops 0
15:33:06:ST3_smx:INFO: # loops 1
15:33:08:ST3_smx:INFO: # loops 2
15:33:10:ST3_smx:INFO: Total # of broken channels: 0
15:33:10:ST3_smx:INFO: List of broken channels: []
15:33:10:ST3_smx:INFO: Total # of broken channels: 0
15:33:10:ST3_smx:INFO: List of broken channels: []
15:33:12:ST3_smx:INFO: chip: 12-5 53.612520 C 1135.937260 mV
15:33:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:33:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:33:12:ST3_smx:INFO: Electrons
15:33:12:ST3_smx:INFO: # loops 0
15:33:13:ST3_smx:INFO: # loops 1
15:33:15:ST3_smx:INFO: # loops 2
15:33:18:ST3_smx:INFO: Total # of broken channels: 0
15:33:18:ST3_smx:INFO: List of broken channels: []
15:33:18:ST3_smx:INFO: Total # of broken channels: 0
15:33:18:ST3_smx:INFO: List of broken channels: []
15:33:19:ST3_smx:INFO: chip: 7-6 37.726682 C 1183.292940 mV
15:33:19:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:33:19:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:33:19:ST3_smx:INFO: Electrons
15:33:19:ST3_smx:INFO: # loops 0
15:33:21:ST3_smx:INFO: # loops 1
15:33:23:ST3_smx:INFO: # loops 2
15:33:25:ST3_smx:INFO: Total # of broken channels: 0
15:33:25:ST3_smx:INFO: List of broken channels: []
15:33:25:ST3_smx:INFO: Total # of broken channels: 0
15:33:25:ST3_smx:INFO: List of broken channels: []
15:33:27:ST3_smx:INFO: chip: 14-7 40.898880 C 1195.082160 mV
15:33:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:33:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:33:27:ST3_smx:INFO: Electrons
15:33:27:ST3_smx:INFO: # loops 0
15:33:29:ST3_smx:INFO: # loops 1
15:33:31:ST3_smx:INFO: # loops 2
15:33:33:ST3_smx:INFO: Total # of broken channels: 0
15:33:33:ST3_smx:INFO: List of broken channels: []
15:33:33:ST3_smx:INFO: Total # of broken channels: 0
15:33:33:ST3_smx:INFO: List of broken channels: []
15:33:33:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
15:33:33:febtest:INFO: 01-00 | XA-000-09-004-005-003-017-14 | 37.7 | 1195.1
15:33:34:febtest:INFO: 08-01 | XA-000-09-004-005-015-017-04 | 34.6 | 1212.7
15:33:34:febtest:INFO: 03-02 | XA-000-09-004-005-003-018-14 | 31.4 | 1230.3
15:33:34:febtest:INFO: 10-03 | XA-000-09-004-005-018-017-15 | 31.4 | 1230.3
15:33:34:febtest:INFO: 05-04 | XA-000-09-004-005-006-018-05 | 40.9 | 1201.0
15:33:34:febtest:INFO: 12-05 | XA-000-09-004-005-003-015-09 | 53.6 | 1159.7
15:33:35:febtest:INFO: 07-06 | XA-000-09-004-005-012-018-10 | 37.7 | 1206.9
15:33:35:febtest:INFO: 14-07 | XA-000-09-004-005-012-017-10 | 40.9 | 1224.5
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_03_05-15_32_00
OPERATOR : Henrik;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3123| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.4150', '1.850', '2.1270', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9530', '1.850', '2.3950', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9540', '1.850', '0.5202', '0.000', '0.0000', '0.000', '0.0000']