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FEB_3127 10.03.25 08:59:25
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08:59:25:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:59:25:ST3_Shared:INFO: FEB-Microcable
08:59:25:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:59:25:febtest:INFO: Testing FEB with SN 3127
08:59:27:smx_tester:INFO: Scanning setup
08:59:27:elinks:INFO: Disabling clock on downlink 0
08:59:27:elinks:INFO: Disabling clock on downlink 1
08:59:27:elinks:INFO: Disabling clock on downlink 2
08:59:27:elinks:INFO: Disabling clock on downlink 3
08:59:27:elinks:INFO: Disabling clock on downlink 4
08:59:27:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:59:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:59:27:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:59:27:elinks:INFO: Disabling clock on downlink 0
08:59:27:elinks:INFO: Disabling clock on downlink 1
08:59:27:elinks:INFO: Disabling clock on downlink 2
08:59:27:elinks:INFO: Disabling clock on downlink 3
08:59:27:elinks:INFO: Disabling clock on downlink 4
08:59:27:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:59:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:59:27:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
08:59:27:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
08:59:27:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
08:59:27:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
08:59:27:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
08:59:27:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
08:59:27:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
08:59:27:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
08:59:27:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
08:59:27:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
08:59:27:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
08:59:27:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
08:59:27:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
08:59:27:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
08:59:27:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
08:59:27:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
08:59:27:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:59:27:elinks:INFO: Disabling clock on downlink 0
08:59:27:elinks:INFO: Disabling clock on downlink 1
08:59:27:elinks:INFO: Disabling clock on downlink 2
08:59:27:elinks:INFO: Disabling clock on downlink 3
08:59:27:elinks:INFO: Disabling clock on downlink 4
08:59:27:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:59:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:59:27:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:59:27:elinks:INFO: Disabling clock on downlink 0
08:59:27:elinks:INFO: Disabling clock on downlink 1
08:59:27:elinks:INFO: Disabling clock on downlink 2
08:59:27:elinks:INFO: Disabling clock on downlink 3
08:59:27:elinks:INFO: Disabling clock on downlink 4
08:59:27:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:59:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
08:59:27:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:59:27:elinks:INFO: Disabling clock on downlink 0
08:59:27:elinks:INFO: Disabling clock on downlink 1
08:59:27:elinks:INFO: Disabling clock on downlink 2
08:59:27:elinks:INFO: Disabling clock on downlink 3
08:59:27:elinks:INFO: Disabling clock on downlink 4
08:59:27:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:59:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
08:59:27:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:59:28:setup_element:INFO: Scanning clock phase
08:59:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:59:28:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:59:28:setup_element:INFO: Clock phase scan results for group 0, downlink 1
08:59:28:setup_element:INFO: Eye window for uplink 0 : X__________________________________________________________________________XXXXX
Clock Delay: 37
08:59:28:setup_element:INFO: Eye window for uplink 1 : X__________________________________________________________________________XXXXX
Clock Delay: 37
08:59:28:setup_element:INFO: Eye window for uplink 2 : ___________________________________________________________________________XXXXX
Clock Delay: 37
08:59:28:setup_element:INFO: Eye window for uplink 3 : ___________________________________________________________________________XXXXX
Clock Delay: 37
08:59:28:setup_element:INFO: Eye window for uplink 4 : ________________________________________________________________________________
Clock Delay: 40
08:59:28:setup_element:INFO: Eye window for uplink 5 : ________________________________________________________________________________
Clock Delay: 40
08:59:28:setup_element:INFO: Eye window for uplink 6 : ___________________________________________________________________________XXXXX
Clock Delay: 37
08:59:28:setup_element:INFO: Eye window for uplink 7 : ___________________________________________________________________________XXXXX
Clock Delay: 37
08:59:28:setup_element:INFO: Eye window for uplink 8 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
08:59:28:setup_element:INFO: Eye window for uplink 9 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
08:59:28:setup_element:INFO: Eye window for uplink 10: __________________________________________________________________________XXXXX_
Clock Delay: 36
08:59:28:setup_element:INFO: Eye window for uplink 11: __________________________________________________________________________XXXXX_
Clock Delay: 36
08:59:28:setup_element:INFO: Eye window for uplink 12: _________________________________________________________________________XXXXX__
Clock Delay: 35
08:59:28:setup_element:INFO: Eye window for uplink 13: _________________________________________________________________________XXXXX__
Clock Delay: 35
08:59:28:setup_element:INFO: Eye window for uplink 14: ___________________________________________________________________________XXXXX
Clock Delay: 37
08:59:28:setup_element:INFO: Eye window for uplink 15: ___________________________________________________________________________XXXXX
Clock Delay: 37
08:59:28:setup_element:INFO: Setting the clock phase to 36 for group 0, downlink 1
08:59:28:setup_element:INFO: Scanning data phases
08:59:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:59:28:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:59:33:setup_element:INFO: Data phase scan results for group 0, downlink 1
08:59:33:setup_element:INFO: Eye window for uplink 0 : ___________XXXXX________________________
Data delay found: 33
08:59:33:setup_element:INFO: Eye window for uplink 1 : ______XXXXX_____________________________
Data delay found: 28
08:59:33:setup_element:INFO: Eye window for uplink 2 : _______XXXXXX___________________________
Data delay found: 29
08:59:33:setup_element:INFO: Eye window for uplink 3 : ____XXXX________________________________
Data delay found: 25
08:59:33:setup_element:INFO: Eye window for uplink 4 : ______XXXX______________________________
Data delay found: 27
08:59:33:setup_element:INFO: Eye window for uplink 5 : __XXXXX_________________________________
Data delay found: 24
08:59:33:setup_element:INFO: Eye window for uplink 6 : XXX___________________________________XX
Data delay found: 20
08:59:33:setup_element:INFO: Eye window for uplink 7 : ___________________________________XXXX_
Data delay found: 16
08:59:33:setup_element:INFO: Eye window for uplink 8 : ______________________XXXXXX____________
Data delay found: 4
08:59:33:setup_element:INFO: Eye window for uplink 9 : ___________________________XXXXXX_______
Data delay found: 9
08:59:33:setup_element:INFO: Eye window for uplink 10: __________________________XXXX__________
Data delay found: 7
08:59:33:setup_element:INFO: Eye window for uplink 11: _____________________________XXXXX______
Data delay found: 11
08:59:33:setup_element:INFO: Eye window for uplink 12: ________________________XXXXX___________
Data delay found: 6
08:59:33:setup_element:INFO: Eye window for uplink 13: ____________________________XXX_________
Data delay found: 9
08:59:33:setup_element:INFO: Eye window for uplink 14: __________________________XXXXXX________
Data delay found: 8
08:59:33:setup_element:INFO: Eye window for uplink 15: ____________________________XXXXXX______
Data delay found: 10
08:59:33:setup_element:INFO: Setting the data phase to 33 for uplink 0
08:59:33:setup_element:INFO: Setting the data phase to 28 for uplink 1
08:59:33:setup_element:INFO: Setting the data phase to 29 for uplink 2
08:59:33:setup_element:INFO: Setting the data phase to 25 for uplink 3
08:59:33:setup_element:INFO: Setting the data phase to 27 for uplink 4
08:59:33:setup_element:INFO: Setting the data phase to 24 for uplink 5
08:59:33:setup_element:INFO: Setting the data phase to 20 for uplink 6
08:59:33:setup_element:INFO: Setting the data phase to 16 for uplink 7
08:59:33:setup_element:INFO: Setting the data phase to 4 for uplink 8
08:59:33:setup_element:INFO: Setting the data phase to 9 for uplink 9
08:59:33:setup_element:INFO: Setting the data phase to 7 for uplink 10
08:59:33:setup_element:INFO: Setting the data phase to 11 for uplink 11
08:59:33:setup_element:INFO: Setting the data phase to 6 for uplink 12
08:59:33:setup_element:INFO: Setting the data phase to 9 for uplink 13
08:59:33:setup_element:INFO: Setting the data phase to 8 for uplink 14
08:59:33:setup_element:INFO: Setting the data phase to 10 for uplink 15
08:59:33:setup_element:INFO: Beginning SMX ASICs map scan
08:59:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:59:33:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:59:33:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
08:59:33:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
08:59:33:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
08:59:33:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
08:59:33:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
08:59:33:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
08:59:33:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
08:59:34:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
08:59:34:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
08:59:34:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
08:59:34:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
08:59:34:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
08:59:34:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
08:59:34:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
08:59:34:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
08:59:34:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
08:59:34:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
08:59:34:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
08:59:34:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
08:59:36:setup_element:INFO: Performing Elink synchronization
08:59:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:59:36:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:59:36:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
08:59:36:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
08:59:36:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
08:59:36:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
08:59:37:febtest:INFO: Init all SMX (CSA): 30
08:59:51:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:59:51:febtest:INFO: 01-00 | XA-000-09-004-005-008-017-12 | 31.4 | 1177.4
08:59:51:febtest:INFO: 08-01 | XA-000-09-004-005-008-014-11 | 44.1 | 1141.9
08:59:52:febtest:INFO: 03-02 | XA-000-09-004-005-011-019-02 | 34.6 | 1171.5
08:59:52:febtest:INFO: 10-03 | XA-000-09-004-005-005-014-12 | 40.9 | 1171.5
08:59:52:febtest:INFO: 05-04 | XA-000-09-004-005-002-017-03 | 37.7 | 1159.7
08:59:52:febtest:INFO: 12-05 | XA-000-09-004-005-014-012-14 | 40.9 | 1159.7
08:59:52:febtest:INFO: 07-06 | XA-000-09-004-005-005-017-11 | 34.6 | 1171.5
08:59:53:febtest:INFO: 14-07 | XA-000-09-004-005-011-014-05 | 44.1 | 1153.7
08:59:54:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
08:59:56:ST3_smx:INFO: chip: 1-0 31.389742 C 1189.190035 mV
08:59:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:59:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:59:56:ST3_smx:INFO: Electrons
08:59:56:ST3_smx:INFO: # loops 0
08:59:58:ST3_smx:INFO: # loops 1
09:00:00:ST3_smx:INFO: # loops 2
09:00:01:ST3_smx:INFO: Total # of broken channels: 0
09:00:01:ST3_smx:INFO: List of broken channels: []
09:00:01:ST3_smx:INFO: Total # of broken channels: 0
09:00:01:ST3_smx:INFO: List of broken channels: []
09:00:03:ST3_smx:INFO: chip: 8-1 44.073563 C 1159.654860 mV
09:00:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:00:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:00:03:ST3_smx:INFO: Electrons
09:00:03:ST3_smx:INFO: # loops 0
09:00:05:ST3_smx:INFO: # loops 1
09:00:07:ST3_smx:INFO: # loops 2
09:00:09:ST3_smx:INFO: Total # of broken channels: 0
09:00:09:ST3_smx:INFO: List of broken channels: []
09:00:09:ST3_smx:INFO: Total # of broken channels: 0
09:00:09:ST3_smx:INFO: List of broken channels: []
09:00:11:ST3_smx:INFO: chip: 3-2 34.556970 C 1189.190035 mV
09:00:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:00:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:00:11:ST3_smx:INFO: Electrons
09:00:11:ST3_smx:INFO: # loops 0
09:00:12:ST3_smx:INFO: # loops 1
09:00:14:ST3_smx:INFO: # loops 2
09:00:16:ST3_smx:INFO: Total # of broken channels: 0
09:00:16:ST3_smx:INFO: List of broken channels: []
09:00:16:ST3_smx:INFO: Total # of broken channels: 0
09:00:16:ST3_smx:INFO: List of broken channels: []
09:00:17:ST3_smx:INFO: chip: 10-3 40.898880 C 1189.190035 mV
09:00:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:00:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:00:17:ST3_smx:INFO: Electrons
09:00:17:ST3_smx:INFO: # loops 0
09:00:19:ST3_smx:INFO: # loops 1
09:00:20:ST3_smx:INFO: # loops 2
09:00:23:ST3_smx:INFO: Total # of broken channels: 0
09:00:23:ST3_smx:INFO: List of broken channels: []
09:00:23:ST3_smx:INFO: Total # of broken channels: 10
09:00:23:ST3_smx:INFO: List of broken channels: [1, 3, 5, 7, 9, 11, 13, 15, 17, 19]
09:00:24:ST3_smx:INFO: chip: 5-4 40.898880 C 1171.483840 mV
09:00:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:00:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:00:24:ST3_smx:INFO: Electrons
09:00:24:ST3_smx:INFO: # loops 0
09:00:26:ST3_smx:INFO: # loops 1
09:00:28:ST3_smx:INFO: # loops 2
09:00:29:ST3_smx:INFO: Total # of broken channels: 0
09:00:29:ST3_smx:INFO: List of broken channels: []
09:00:29:ST3_smx:INFO: Total # of broken channels: 0
09:00:29:ST3_smx:INFO: List of broken channels: []
09:00:31:ST3_smx:INFO: chip: 12-5 40.898880 C 1171.483840 mV
09:00:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:00:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:00:31:ST3_smx:INFO: Electrons
09:00:31:ST3_smx:INFO: # loops 0
09:00:33:ST3_smx:INFO: # loops 1
09:00:34:ST3_smx:INFO: # loops 2
09:00:36:ST3_smx:INFO: Total # of broken channels: 0
09:00:36:ST3_smx:INFO: List of broken channels: []
09:00:36:ST3_smx:INFO: Total # of broken channels: 0
09:00:36:ST3_smx:INFO: List of broken channels: []
09:00:38:ST3_smx:INFO: chip: 7-6 37.726682 C 1183.292940 mV
09:00:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:00:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:00:38:ST3_smx:INFO: Electrons
09:00:38:ST3_smx:INFO: # loops 0
09:00:39:ST3_smx:INFO: # loops 1
09:00:41:ST3_smx:INFO: # loops 2
09:00:43:ST3_smx:INFO: Total # of broken channels: 0
09:00:43:ST3_smx:INFO: List of broken channels: []
09:00:43:ST3_smx:INFO: Total # of broken channels: 0
09:00:43:ST3_smx:INFO: List of broken channels: []
09:00:45:ST3_smx:INFO: chip: 14-7 47.250730 C 1165.571835 mV
09:00:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:00:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:00:45:ST3_smx:INFO: Electrons
09:00:45:ST3_smx:INFO: # loops 0
09:00:46:ST3_smx:INFO: # loops 1
09:00:48:ST3_smx:INFO: # loops 2
09:00:50:ST3_smx:INFO: Total # of broken channels: 0
09:00:50:ST3_smx:INFO: List of broken channels: []
09:00:50:ST3_smx:INFO: Total # of broken channels: 0
09:00:50:ST3_smx:INFO: List of broken channels: []
09:00:51:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:00:51:febtest:INFO: 01-00 | XA-000-09-004-005-008-017-12 | 34.6 | 1212.7
09:00:51:febtest:INFO: 08-01 | XA-000-09-004-005-008-014-11 | 44.1 | 1177.4
09:00:51:febtest:INFO: 03-02 | XA-000-09-004-005-011-019-02 | 34.6 | 1206.9
09:00:51:febtest:INFO: 10-03 | XA-000-09-004-005-005-014-12 | 40.9 | 1230.3
09:00:52:febtest:INFO: 05-04 | XA-000-09-004-005-002-017-03 | 40.9 | 1195.1
09:00:52:febtest:INFO: 12-05 | XA-000-09-004-005-014-012-14 | 44.1 | 1195.1
09:00:52:febtest:INFO: 07-06 | XA-000-09-004-005-005-017-11 | 37.7 | 1201.0
09:00:52:febtest:INFO: 14-07 | XA-000-09-004-005-011-014-05 | 47.3 | 1195.1
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_03_10-08_59_25
OPERATOR : Henrik;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3127| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.4060', '1.852', '2.0130', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9710', '1.850', '2.4700', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9780', '1.850', '0.5309', '0.000', '0.0000', '0.000', '0.0000']