
FEB_3130 24.03.25 14:19:53
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14:19:53:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 14:19:53:ST3_Shared:INFO: FEB-Microcable 14:19:53:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 14:19:53:febtest:INFO: Testing FEB with SN 3130 14:19:55:smx_tester:INFO: Scanning setup 14:19:55:elinks:INFO: Disabling clock on downlink 0 14:19:55:elinks:INFO: Disabling clock on downlink 1 14:19:55:elinks:INFO: Disabling clock on downlink 2 14:19:55:elinks:INFO: Disabling clock on downlink 3 14:19:55:elinks:INFO: Disabling clock on downlink 4 14:19:55:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:19:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 14:19:55:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:19:55:elinks:INFO: Disabling clock on downlink 0 14:19:55:elinks:INFO: Disabling clock on downlink 1 14:19:55:elinks:INFO: Disabling clock on downlink 2 14:19:55:elinks:INFO: Disabling clock on downlink 3 14:19:55:elinks:INFO: Disabling clock on downlink 4 14:19:55:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:19:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 14:19:55:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8 14:19:55:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9 14:19:55:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10 14:19:55:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11 14:19:55:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12 14:19:55:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13 14:19:55:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14 14:19:55:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15 14:19:55:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:19:55:elinks:INFO: Disabling clock on downlink 0 14:19:55:elinks:INFO: Disabling clock on downlink 1 14:19:55:elinks:INFO: Disabling clock on downlink 2 14:19:55:elinks:INFO: Disabling clock on downlink 3 14:19:55:elinks:INFO: Disabling clock on downlink 4 14:19:55:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:19:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 14:19:55:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:19:55:elinks:INFO: Disabling clock on downlink 0 14:19:55:elinks:INFO: Disabling clock on downlink 1 14:19:55:elinks:INFO: Disabling clock on downlink 2 14:19:55:elinks:INFO: Disabling clock on downlink 3 14:19:55:elinks:INFO: Disabling clock on downlink 4 14:19:55:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:19:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 14:19:55:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:19:55:elinks:INFO: Disabling clock on downlink 0 14:19:55:elinks:INFO: Disabling clock on downlink 1 14:19:55:elinks:INFO: Disabling clock on downlink 2 14:19:55:elinks:INFO: Disabling clock on downlink 3 14:19:55:elinks:INFO: Disabling clock on downlink 4 14:19:55:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:19:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 14:19:55:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:19:55:setup_element:INFO: Scanning clock phase 14:19:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 14:19:56:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 14:19:56:setup_element:INFO: Clock phase scan results for group 0, downlink 1 14:19:56:setup_element:INFO: Eye window for uplink 8 : _________________________________________________________________________XXXXX__ Clock Delay: 35 14:19:56:setup_element:INFO: Eye window for uplink 9 : _________________________________________________________________________XXXXX__ Clock Delay: 35 14:19:56:setup_element:INFO: Eye window for uplink 10: _________________________________________________________________________XXXXXX_ Clock Delay: 35 14:19:56:setup_element:INFO: Eye window for uplink 11: _________________________________________________________________________XXXXXX_ Clock Delay: 35 14:19:56:setup_element:INFO: Eye window for uplink 12: ___________________________________________________________________________XXXX_ Clock Delay: 36 14:19:56:setup_element:INFO: Eye window for uplink 13: ___________________________________________________________________________XXXX_ Clock Delay: 36 14:19:56:setup_element:INFO: Eye window for uplink 14: _________________________________________________________________________XXXXXX_ Clock Delay: 35 14:19:56:setup_element:INFO: Eye window for uplink 15: _________________________________________________________________________XXXXXX_ Clock Delay: 35 14:19:56:setup_element:INFO: Setting the clock phase to 35 for group 0, downlink 1 14:19:56:setup_element:INFO: Scanning data phases 14:19:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 14:19:56:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 14:20:01:setup_element:INFO: Data phase scan results for group 0, downlink 1 14:20:01:setup_element:INFO: Eye window for uplink 8 : _________________________XXXXX____XXXXXX Data delay found: 12 14:20:01:setup_element:INFO: Eye window for uplink 9 : _____________________________XXXXXXXXXXX Data delay found: 14 14:20:01:setup_element:INFO: Eye window for uplink 10: ____________________________XXXXX_______ Data delay found: 10 14:20:01:setup_element:INFO: Eye window for uplink 11: _______________________________XXXXX____ Data delay found: 13 14:20:01:setup_element:INFO: Eye window for uplink 12: ______________________________XXXXX_____ Data delay found: 12 14:20:01:setup_element:INFO: Eye window for uplink 13: _________________________________XXXXX__ Data delay found: 15 14:20:01:setup_element:INFO: Eye window for uplink 14: _______________________________XXXXX____ Data delay found: 13 14:20:01:setup_element:INFO: Eye window for uplink 15: _________________________________XXXXX__ Data delay found: 15 14:20:01:setup_element:INFO: Setting the data phase to 12 for uplink 8 14:20:01:setup_element:INFO: Setting the data phase to 14 for uplink 9 14:20:01:setup_element:INFO: Setting the data phase to 10 for uplink 10 14:20:01:setup_element:INFO: Setting the data phase to 13 for uplink 11 14:20:01:setup_element:INFO: Setting the data phase to 12 for uplink 12 14:20:01:setup_element:INFO: Setting the data phase to 15 for uplink 13 14:20:01:setup_element:INFO: Setting the data phase to 13 for uplink 14 14:20:01:setup_element:INFO: Setting the data phase to 15 for uplink 15 14:20:01:setup_element:INFO: Beginning SMX ASICs map scan 14:20:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 14:20:01:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 14:20:01:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 14:20:01:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 14:20:01:uplink:INFO: Setting uplinks mask [8, 9, 10, 11, 12, 13, 14, 15] 14:20:01:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8 14:20:01:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9 14:20:02:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10 14:20:02:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11 14:20:02:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12 14:20:02:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13 14:20:02:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14 14:20:02:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15 14:20:04:setup_element:INFO: Performing Elink synchronization 14:20:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 14:20:04:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 14:20:04:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 14:20:04:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 14:20:04:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1 14:20:04:uplink:INFO: Enabling uplinks [8, 9, 10, 11, 12, 13, 14, 15] |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)] 3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)] 5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)] 7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)] |_________________________________________________________________________| 14:20:04:febtest:INFO: Init all SMX (CSA): 30 14:20:13:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 14:20:13:febtest:INFO: 08-01 | XA-000-09-004-005-006-024-05 | 37.7 | 1165.6 14:20:14:febtest:INFO: 10-03 | XA-000-09-004-005-009-022-01 | 28.2 | 1189.2 14:20:14:febtest:INFO: 12-05 | XA-000-09-004-005-006-022-05 | 25.1 | 1212.7 14:20:14:febtest:INFO: 14-07 | XA-000-09-004-005-012-020-10 | 31.4 | 1183.3 14:20:15:febtest:INFO: Set all CSA to ZERO FEB type: A FEB_A: 1 FEB_B: 0 14:20:17:ST3_smx:INFO: chip: 8-1 37.726682 C 1171.483840 mV 14:20:17:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:20:17:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:20:17:ST3_smx:INFO: Electrons 14:20:17:ST3_smx:INFO: # loops 0 14:20:19:ST3_smx:INFO: # loops 1 14:20:21:ST3_smx:INFO: # loops 2 14:20:23:ST3_smx:INFO: Total # of broken channels: 0 14:20:23:ST3_smx:INFO: List of broken channels: [] 14:20:23:ST3_smx:INFO: Total # of broken channels: 0 14:20:23:ST3_smx:INFO: List of broken channels: [] 14:20:25:ST3_smx:INFO: chip: 10-3 28.225000 C 1200.969315 mV 14:20:25:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:20:25:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:20:25:ST3_smx:INFO: Electrons 14:20:25:ST3_smx:INFO: # loops 0 14:20:27:ST3_smx:INFO: # loops 1 14:20:29:ST3_smx:INFO: # loops 2 14:20:31:ST3_smx:INFO: Total # of broken channels: 0 14:20:31:ST3_smx:INFO: List of broken channels: [] 14:20:31:ST3_smx:INFO: Total # of broken channels: 0 14:20:31:ST3_smx:INFO: List of broken channels: [] 14:20:33:ST3_smx:INFO: chip: 12-5 25.062742 C 1218.600960 mV 14:20:33:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:20:33:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:20:33:ST3_smx:INFO: Electrons 14:20:33:ST3_smx:INFO: # loops 0 14:20:35:ST3_smx:INFO: # loops 1 14:20:37:ST3_smx:INFO: # loops 2 14:20:39:ST3_smx:INFO: Total # of broken channels: 0 14:20:39:ST3_smx:INFO: List of broken channels: [] 14:20:39:ST3_smx:INFO: Total # of broken channels: 0 14:20:39:ST3_smx:INFO: List of broken channels: [] 14:20:41:ST3_smx:INFO: chip: 14-7 34.556970 C 1189.190035 mV 14:20:41:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:20:41:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:20:41:ST3_smx:INFO: Electrons 14:20:41:ST3_smx:INFO: # loops 0 14:20:43:ST3_smx:INFO: # loops 1 14:20:45:ST3_smx:INFO: # loops 2 14:20:47:ST3_smx:INFO: Total # of broken channels: 0 14:20:47:ST3_smx:INFO: List of broken channels: [] 14:20:47:ST3_smx:INFO: Total # of broken channels: 0 14:20:47:ST3_smx:INFO: List of broken channels: [] 14:20:48:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 14:20:48:febtest:INFO: 08-01 | XA-000-09-004-005-006-024-05 | 37.7 | 1183.3 14:20:48:febtest:INFO: 10-03 | XA-000-09-004-005-009-022-01 | 28.2 | 1224.5 14:20:48:febtest:INFO: 12-05 | XA-000-09-004-005-006-022-05 | 25.1 | 1242.0 14:20:49:febtest:INFO: 14-07 | XA-000-09-004-005-012-020-10 | 34.6 | 1206.9 ############################################################ # S U M M A R Y # ############################################################ {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 25_03_24-14_19_53 OPERATOR : Benjamin; SITE : KIT | SETUP : KIT_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 3130| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['2.450', '0.7122', '1.852', '1.2820', '0.000', '0.0000', '0.000', '0.0000'] VI_after__Init : ['2.450', '0.9957', '1.850', '0.9224', '0.000', '0.0000', '0.000', '0.0000'] VI_at__the_End : ['2.450', '0.9830', '1.850', '0.2646', '0.000', '0.0000', '0.000', '0.0000']