
FEB_3134 08.04.25 07:26:07
TextEdit.txt
07:26:07:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 07:26:07:ST3_Shared:INFO: FEB-Microcable 07:26:07:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 07:26:07:febtest:INFO: Testing FEB with SN 3134 07:26:08:smx_tester:INFO: Scanning setup 07:26:08:elinks:INFO: Disabling clock on downlink 0 07:26:08:elinks:INFO: Disabling clock on downlink 1 07:26:08:elinks:INFO: Disabling clock on downlink 2 07:26:08:elinks:INFO: Disabling clock on downlink 3 07:26:08:elinks:INFO: Disabling clock on downlink 4 07:26:08:setup_element:INFO: Checking SOS, encoding_mode: SOS 07:26:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 07:26:08:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 07:26:08:elinks:INFO: Disabling clock on downlink 0 07:26:08:elinks:INFO: Disabling clock on downlink 1 07:26:08:elinks:INFO: Disabling clock on downlink 2 07:26:08:elinks:INFO: Disabling clock on downlink 3 07:26:08:elinks:INFO: Disabling clock on downlink 4 07:26:08:setup_element:INFO: Checking SOS, encoding_mode: SOS 07:26:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 07:26:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0 07:26:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1 07:26:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2 07:26:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3 07:26:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4 07:26:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5 07:26:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6 07:26:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7 07:26:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8 07:26:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9 07:26:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10 07:26:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11 07:26:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12 07:26:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13 07:26:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14 07:26:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15 07:26:09:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 07:26:09:elinks:INFO: Disabling clock on downlink 0 07:26:09:elinks:INFO: Disabling clock on downlink 1 07:26:09:elinks:INFO: Disabling clock on downlink 2 07:26:09:elinks:INFO: Disabling clock on downlink 3 07:26:09:elinks:INFO: Disabling clock on downlink 4 07:26:09:setup_element:INFO: Checking SOS, encoding_mode: SOS 07:26:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 07:26:09:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 07:26:09:elinks:INFO: Disabling clock on downlink 0 07:26:09:elinks:INFO: Disabling clock on downlink 1 07:26:09:elinks:INFO: Disabling clock on downlink 2 07:26:09:elinks:INFO: Disabling clock on downlink 3 07:26:09:elinks:INFO: Disabling clock on downlink 4 07:26:09:setup_element:INFO: Checking SOS, encoding_mode: SOS 07:26:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 07:26:09:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 07:26:09:elinks:INFO: Disabling clock on downlink 0 07:26:09:elinks:INFO: Disabling clock on downlink 1 07:26:09:elinks:INFO: Disabling clock on downlink 2 07:26:09:elinks:INFO: Disabling clock on downlink 3 07:26:09:elinks:INFO: Disabling clock on downlink 4 07:26:09:setup_element:INFO: Checking SOS, encoding_mode: SOS 07:26:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 07:26:09:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 07:26:09:setup_element:INFO: Scanning clock phase 07:26:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 07:26:09:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 07:26:09:setup_element:INFO: Clock phase scan results for group 0, downlink 1 07:26:09:setup_element:INFO: Eye window for uplink 0 : X___________________________________________________________________________XXXX Clock Delay: 38 07:26:09:setup_element:INFO: Eye window for uplink 1 : X___________________________________________________________________________XXXX Clock Delay: 38 07:26:09:setup_element:INFO: Eye window for uplink 2 : ___________________________________________________________________________XXXX_ Clock Delay: 36 07:26:09:setup_element:INFO: Eye window for uplink 3 : ___________________________________________________________________________XXXX_ Clock Delay: 36 07:26:09:setup_element:INFO: Eye window for uplink 4 : ___________________________________________________________________________XXXXX Clock Delay: 37 07:26:09:setup_element:INFO: Eye window for uplink 5 : ___________________________________________________________________________XXXXX Clock Delay: 37 07:26:09:setup_element:INFO: Eye window for uplink 6 : ___________________________________________________________________________XXXX_ Clock Delay: 36 07:26:09:setup_element:INFO: Eye window for uplink 7 : ___________________________________________________________________________XXXX_ Clock Delay: 36 07:26:09:setup_element:INFO: Eye window for uplink 8 : __________________________________________________________________________XXXXXX Clock Delay: 36 07:26:09:setup_element:INFO: Eye window for uplink 9 : __________________________________________________________________________XXXXXX Clock Delay: 36 07:26:09:setup_element:INFO: Eye window for uplink 10: ________________________________________________________________________XXXXXXX_ Clock Delay: 35 07:26:09:setup_element:INFO: Eye window for uplink 11: ________________________________________________________________________XXXXXXX_ Clock Delay: 35 07:26:09:setup_element:INFO: Eye window for uplink 12: _________________________________________________________________________XXXXX__ Clock Delay: 35 07:26:09:setup_element:INFO: Eye window for uplink 13: _________________________________________________________________________XXXXX__ Clock Delay: 35 07:26:09:setup_element:INFO: Eye window for uplink 14: ___________________________________________________________________________XXXXX Clock Delay: 37 07:26:09:setup_element:INFO: Eye window for uplink 15: ___________________________________________________________________________XXXXX Clock Delay: 37 07:26:09:setup_element:INFO: Setting the clock phase to 36 for group 0, downlink 1 07:26:09:setup_element:INFO: Scanning data phases 07:26:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 07:26:09:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 07:26:15:setup_element:INFO: Data phase scan results for group 0, downlink 1 07:26:15:setup_element:INFO: Eye window for uplink 0 : _____________XXXX_______________________ Data delay found: 34 07:26:15:setup_element:INFO: Eye window for uplink 1 : ________XXXXX___________________________ Data delay found: 30 07:26:15:setup_element:INFO: Eye window for uplink 2 : ________XXXXXX__________________________ Data delay found: 30 07:26:15:setup_element:INFO: Eye window for uplink 3 : _____XXXX_______________________________ Data delay found: 26 07:26:15:setup_element:INFO: Eye window for uplink 4 : ______XXXX______________________________ Data delay found: 27 07:26:15:setup_element:INFO: Eye window for uplink 5 : __XXXX__________________________________ Data delay found: 23 07:26:15:setup_element:INFO: Eye window for uplink 6 : XXXX__________________________________XX Data delay found: 20 07:26:15:setup_element:INFO: Eye window for uplink 7 : ___________________________________XXXX_ Data delay found: 16 07:26:15:setup_element:INFO: Eye window for uplink 8 : _________________________XXXXXX_________ Data delay found: 7 07:26:15:setup_element:INFO: Eye window for uplink 9 : ______________________________XXXXX_____ Data delay found: 12 07:26:15:setup_element:INFO: Eye window for uplink 10: _________________________XXXX___________ Data delay found: 6 07:26:15:setup_element:INFO: Eye window for uplink 11: ____________________________XXXXX_______ Data delay found: 10 07:26:15:setup_element:INFO: Eye window for uplink 12: _________________________XXXXX__________ Data delay found: 7 07:26:15:setup_element:INFO: Eye window for uplink 13: ____________________________XXXXX_______ Data delay found: 10 07:26:15:setup_element:INFO: Eye window for uplink 14: _____________________________XXXXX______ Data delay found: 11 07:26:15:setup_element:INFO: Eye window for uplink 15: _______________________________XXXXXX___ Data delay found: 13 07:26:15:setup_element:INFO: Setting the data phase to 34 for uplink 0 07:26:15:setup_element:INFO: Setting the data phase to 30 for uplink 1 07:26:15:setup_element:INFO: Setting the data phase to 30 for uplink 2 07:26:15:setup_element:INFO: Setting the data phase to 26 for uplink 3 07:26:15:setup_element:INFO: Setting the data phase to 27 for uplink 4 07:26:15:setup_element:INFO: Setting the data phase to 23 for uplink 5 07:26:15:setup_element:INFO: Setting the data phase to 20 for uplink 6 07:26:15:setup_element:INFO: Setting the data phase to 16 for uplink 7 07:26:15:setup_element:INFO: Setting the data phase to 7 for uplink 8 07:26:15:setup_element:INFO: Setting the data phase to 12 for uplink 9 07:26:15:setup_element:INFO: Setting the data phase to 6 for uplink 10 07:26:15:setup_element:INFO: Setting the data phase to 10 for uplink 11 07:26:15:setup_element:INFO: Setting the data phase to 7 for uplink 12 07:26:15:setup_element:INFO: Setting the data phase to 10 for uplink 13 07:26:15:setup_element:INFO: Setting the data phase to 11 for uplink 14 07:26:15:setup_element:INFO: Setting the data phase to 13 for uplink 15 07:26:15:setup_element:INFO: Beginning SMX ASICs map scan 07:26:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 07:26:15:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 07:26:15:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 07:26:15:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 07:26:15:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] 07:26:15:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1 07:26:15:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0 07:26:15:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8 07:26:15:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9 07:26:15:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3 07:26:15:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2 07:26:15:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10 07:26:15:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11 07:26:15:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5 07:26:15:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4 07:26:16:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12 07:26:16:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13 07:26:16:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7 07:26:16:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6 07:26:16:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14 07:26:16:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15 07:26:17:setup_element:INFO: Performing Elink synchronization 07:26:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 07:26:17:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 07:26:17:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 07:26:17:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 07:26:17:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1 07:26:17:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)] 1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)] 2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)] 3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)] 4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)] 5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)] 6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)] 7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)] |_________________________________________________________________________| 07:26:18:febtest:INFO: Init all SMX (CSA): 30 07:26:35:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 07:26:35:febtest:INFO: 01-00 | XA-000-09-004-020-013-005-07 | 44.1 | 1135.9 07:26:36:febtest:INFO: 08-01 | XA-000-09-004-020-016-007-12 | 40.9 | 1141.9 07:26:36:febtest:INFO: 03-02 | XA-000-09-004-020-013-007-07 | 37.7 | 1159.7 07:26:36:febtest:INFO: 10-03 | XA-000-09-004-020-004-006-06 | 34.6 | 1177.4 07:26:36:febtest:INFO: 05-04 | XA-000-09-004-020-004-007-06 | 37.7 | 1159.7 07:26:36:febtest:INFO: 12-05 | XA-000-09-004-020-013-006-07 | 40.9 | 1165.6 07:26:37:febtest:INFO: 07-06 | XA-000-09-004-020-016-006-12 | 40.9 | 1159.7 07:26:37:febtest:INFO: 14-07 | XA-000-09-004-020-016-008-12 | 40.9 | 1147.8 07:26:38:febtest:INFO: Set all CSA to ZERO FEB type: A FEB_A: 1 FEB_B: 0 07:26:40:ST3_smx:INFO: chip: 1-0 44.073563 C 1147.806000 mV 07:26:40:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:26:40:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:26:40:ST3_smx:INFO: Electrons 07:26:40:ST3_smx:INFO: # loops 0 07:26:42:ST3_smx:INFO: # loops 1 07:26:44:ST3_smx:INFO: # loops 2 07:26:46:ST3_smx:INFO: Total # of broken channels: 0 07:26:46:ST3_smx:INFO: List of broken channels: [] 07:26:46:ST3_smx:INFO: Total # of broken channels: 0 07:26:46:ST3_smx:INFO: List of broken channels: [] 07:26:47:ST3_smx:INFO: chip: 8-1 40.898880 C 1153.732915 mV 07:26:47:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:26:47:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:26:47:ST3_smx:INFO: Electrons 07:26:47:ST3_smx:INFO: # loops 0 07:26:50:ST3_smx:INFO: # loops 1 07:26:52:ST3_smx:INFO: # loops 2 07:26:54:ST3_smx:INFO: Total # of broken channels: 0 07:26:54:ST3_smx:INFO: List of broken channels: [] 07:26:54:ST3_smx:INFO: Total # of broken channels: 10 07:26:54:ST3_smx:INFO: List of broken channels: [13, 15, 17, 19, 21, 23, 25, 27, 29, 31] 07:26:56:ST3_smx:INFO: chip: 3-2 37.726682 C 1171.483840 mV 07:26:56:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:26:56:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:26:56:ST3_smx:INFO: Electrons 07:26:56:ST3_smx:INFO: # loops 0 07:26:58:ST3_smx:INFO: # loops 1 07:27:00:ST3_smx:INFO: # loops 2 07:27:02:ST3_smx:INFO: Total # of broken channels: 0 07:27:02:ST3_smx:INFO: List of broken channels: [] 07:27:02:ST3_smx:INFO: Total # of broken channels: 0 07:27:02:ST3_smx:INFO: List of broken channels: [] 07:27:03:ST3_smx:INFO: chip: 10-3 34.556970 C 1195.082160 mV 07:27:03:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:27:03:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:27:03:ST3_smx:INFO: Electrons 07:27:03:ST3_smx:INFO: # loops 0 07:27:06:ST3_smx:INFO: # loops 1 07:27:08:ST3_smx:INFO: # loops 2 07:27:10:ST3_smx:INFO: Total # of broken channels: 1 07:27:10:ST3_smx:INFO: List of broken channels: [0] 07:27:10:ST3_smx:INFO: Total # of broken channels: 1 07:27:10:ST3_smx:INFO: List of broken channels: [0] 07:27:11:ST3_smx:INFO: chip: 5-4 37.726682 C 1171.483840 mV 07:27:11:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:27:11:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:27:11:ST3_smx:INFO: Electrons 07:27:11:ST3_smx:INFO: # loops 0 07:27:13:ST3_smx:INFO: # loops 1 07:27:15:ST3_smx:INFO: # loops 2 07:27:17:ST3_smx:INFO: Total # of broken channels: 0 07:27:17:ST3_smx:INFO: List of broken channels: [] 07:27:17:ST3_smx:INFO: Total # of broken channels: 0 07:27:17:ST3_smx:INFO: List of broken channels: [] 07:27:19:ST3_smx:INFO: chip: 12-5 40.898880 C 1189.190035 mV 07:27:19:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:27:19:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:27:19:ST3_smx:INFO: Electrons 07:27:19:ST3_smx:INFO: # loops 0 07:27:21:ST3_smx:INFO: # loops 1 07:27:23:ST3_smx:INFO: # loops 2 07:27:25:ST3_smx:INFO: Total # of broken channels: 0 07:27:25:ST3_smx:INFO: List of broken channels: [] 07:27:25:ST3_smx:INFO: Total # of broken channels: 0 07:27:25:ST3_smx:INFO: List of broken channels: [] 07:27:27:ST3_smx:INFO: chip: 7-6 40.898880 C 1165.571835 mV 07:27:27:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:27:27:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:27:27:ST3_smx:INFO: Electrons 07:27:27:ST3_smx:INFO: # loops 0 07:27:29:ST3_smx:INFO: # loops 1 07:27:31:ST3_smx:INFO: # loops 2 07:27:34:ST3_smx:INFO: Total # of broken channels: 0 07:27:34:ST3_smx:INFO: List of broken channels: [] 07:27:34:ST3_smx:INFO: Total # of broken channels: 0 07:27:34:ST3_smx:INFO: List of broken channels: [] 07:27:35:ST3_smx:INFO: chip: 14-7 44.073563 C 1159.654860 mV 07:27:35:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:27:35:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:27:35:ST3_smx:INFO: Electrons 07:27:35:ST3_smx:INFO: # loops 0 07:27:38:ST3_smx:INFO: # loops 1 07:27:40:ST3_smx:INFO: # loops 2 07:27:42:ST3_smx:INFO: Total # of broken channels: 0 07:27:42:ST3_smx:INFO: List of broken channels: [] 07:27:42:ST3_smx:INFO: Total # of broken channels: 0 07:27:42:ST3_smx:INFO: List of broken channels: [] 07:27:42:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 07:27:42:febtest:INFO: 01-00 | XA-000-09-004-020-013-005-07 | 44.1 | 1165.6 07:27:43:febtest:INFO: 08-01 | XA-000-09-004-020-016-007-12 | 44.1 | 1177.4 07:27:43:febtest:INFO: 03-02 | XA-000-09-004-020-013-007-07 | 40.9 | 1189.2 07:27:43:febtest:INFO: 10-03 | XA-000-09-004-020-004-006-06 | 34.6 | 1259.6 07:27:43:febtest:INFO: 05-04 | XA-000-09-004-020-004-007-06 | 40.9 | 1189.2 07:27:43:febtest:INFO: 12-05 | XA-000-09-004-020-013-006-07 | 40.9 | 1282.9 07:27:44:febtest:INFO: 07-06 | XA-000-09-004-020-016-006-12 | 44.1 | 1183.3 07:27:44:febtest:INFO: 14-07 | XA-000-09-004-020-016-008-12 | 44.1 | 1177.4 ############################################################ # S U M M A R Y # ############################################################ {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 25_04_08-07_26_07 OPERATOR : Benjamin; SITE : KIT | SETUP : KIT_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 3134| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['2.450', '1.5340', '1.853', '2.5310', '0.000', '0.0000', '0.000', '0.0000'] VI_after__Init : ['2.450', '2.0320', '1.850', '2.4300', '0.000', '0.0000', '0.000', '0.0000'] VI_at__the_End : ['2.450', '1.9870', '1.850', '0.5359', '0.000', '0.0000', '0.000', '0.0000']