
FEB_3136 08.04.25 09:47:15
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09:47:15:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 09:47:15:ST3_Shared:INFO: FEB-Microcable 09:47:15:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 09:47:15:febtest:INFO: Testing FEB with SN 3136 09:47:17:smx_tester:INFO: Scanning setup 09:47:17:elinks:INFO: Disabling clock on downlink 0 09:47:17:elinks:INFO: Disabling clock on downlink 1 09:47:17:elinks:INFO: Disabling clock on downlink 2 09:47:17:elinks:INFO: Disabling clock on downlink 3 09:47:17:elinks:INFO: Disabling clock on downlink 4 09:47:17:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:47:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 09:47:17:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:47:17:elinks:INFO: Disabling clock on downlink 0 09:47:17:elinks:INFO: Disabling clock on downlink 1 09:47:17:elinks:INFO: Disabling clock on downlink 2 09:47:17:elinks:INFO: Disabling clock on downlink 3 09:47:17:elinks:INFO: Disabling clock on downlink 4 09:47:17:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:47:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:47:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8 09:47:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9 09:47:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10 09:47:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11 09:47:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12 09:47:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13 09:47:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14 09:47:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15 09:47:17:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:47:17:elinks:INFO: Disabling clock on downlink 0 09:47:17:elinks:INFO: Disabling clock on downlink 1 09:47:17:elinks:INFO: Disabling clock on downlink 2 09:47:17:elinks:INFO: Disabling clock on downlink 3 09:47:17:elinks:INFO: Disabling clock on downlink 4 09:47:17:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:47:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:47:17:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:47:17:elinks:INFO: Disabling clock on downlink 0 09:47:17:elinks:INFO: Disabling clock on downlink 1 09:47:17:elinks:INFO: Disabling clock on downlink 2 09:47:17:elinks:INFO: Disabling clock on downlink 3 09:47:17:elinks:INFO: Disabling clock on downlink 4 09:47:17:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:47:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 09:47:18:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:47:18:elinks:INFO: Disabling clock on downlink 0 09:47:18:elinks:INFO: Disabling clock on downlink 1 09:47:18:elinks:INFO: Disabling clock on downlink 2 09:47:18:elinks:INFO: Disabling clock on downlink 3 09:47:18:elinks:INFO: Disabling clock on downlink 4 09:47:18:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:47:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 09:47:18:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:47:18:setup_element:INFO: Scanning clock phase 09:47:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:47:18:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 09:47:18:setup_element:INFO: Clock phase scan results for group 0, downlink 1 09:47:18:setup_element:INFO: Eye window for uplink 8 : ________________________________________________________________________XXXXXX__ Clock Delay: 34 09:47:18:setup_element:INFO: Eye window for uplink 9 : ________________________________________________________________________XXXXXX__ Clock Delay: 34 09:47:18:setup_element:INFO: Eye window for uplink 10: __________________________________________________________________________XXXXX_ Clock Delay: 36 09:47:18:setup_element:INFO: Eye window for uplink 11: __________________________________________________________________________XXXXX_ Clock Delay: 36 09:47:18:setup_element:INFO: Eye window for uplink 12: _________________________________________________________________________XXXXXX_ Clock Delay: 35 09:47:18:setup_element:INFO: Eye window for uplink 13: _________________________________________________________________________XXXXXX_ Clock Delay: 35 09:47:18:setup_element:INFO: Eye window for uplink 14: __________________________________________________________________________XXXXX_ Clock Delay: 36 09:47:18:setup_element:INFO: Eye window for uplink 15: __________________________________________________________________________XXXXX_ Clock Delay: 36 09:47:18:setup_element:INFO: Setting the clock phase to 35 for group 0, downlink 1 09:47:18:setup_element:INFO: Scanning data phases 09:47:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:47:18:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 09:47:23:setup_element:INFO: Data phase scan results for group 0, downlink 1 09:47:23:setup_element:INFO: Eye window for uplink 8 : _________________________XXXXX__________ Data delay found: 7 09:47:23:setup_element:INFO: Eye window for uplink 9 : _____________________________XXXXXX_____ Data delay found: 11 09:47:23:setup_element:INFO: Eye window for uplink 10: ______________________________XXXXX_____ Data delay found: 12 09:47:23:setup_element:INFO: Eye window for uplink 11: _________________________________XXXXX__ Data delay found: 15 09:47:23:setup_element:INFO: Eye window for uplink 12: ________________________________XXXX____ Data delay found: 13 09:47:23:setup_element:INFO: Eye window for uplink 13: ___________________________________XXX__ Data delay found: 16 09:47:23:setup_element:INFO: Eye window for uplink 14: _________________________________XXXXX__ Data delay found: 15 09:47:23:setup_element:INFO: Eye window for uplink 15: ___________________________________XXXXX Data delay found: 17 09:47:23:setup_element:INFO: Setting the data phase to 7 for uplink 8 09:47:23:setup_element:INFO: Setting the data phase to 11 for uplink 9 09:47:23:setup_element:INFO: Setting the data phase to 12 for uplink 10 09:47:23:setup_element:INFO: Setting the data phase to 15 for uplink 11 09:47:23:setup_element:INFO: Setting the data phase to 13 for uplink 12 09:47:23:setup_element:INFO: Setting the data phase to 16 for uplink 13 09:47:23:setup_element:INFO: Setting the data phase to 15 for uplink 14 09:47:23:setup_element:INFO: Setting the data phase to 17 for uplink 15 09:47:23:setup_element:INFO: Beginning SMX ASICs map scan 09:47:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:47:23:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 09:47:23:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 09:47:23:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 09:47:23:uplink:INFO: Setting uplinks mask [8, 9, 10, 11, 12, 13, 14, 15] 09:47:23:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8 09:47:23:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9 09:47:24:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10 09:47:24:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11 09:47:24:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12 09:47:24:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13 09:47:24:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14 09:47:25:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15 09:47:26:setup_element:INFO: Performing Elink synchronization 09:47:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:47:26:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 09:47:26:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 09:47:26:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 09:47:26:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1 09:47:26:uplink:INFO: Enabling uplinks [8, 9, 10, 11, 12, 13, 14, 15] |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)] 3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)] 5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)] 7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)] |_________________________________________________________________________| 09:47:26:febtest:INFO: Init all SMX (CSA): 30 09:47:36:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 09:47:36:febtest:INFO: 08-01 | XA-000-09-004-020-004-009-06 | 28.2 | 1189.2 09:47:36:febtest:INFO: 10-03 | XA-000-09-004-020-004-008-06 | 31.4 | 1165.6 09:47:37:febtest:INFO: 12-05 | XA-000-09-004-020-004-016-01 | 28.2 | 1189.2 09:47:37:febtest:INFO: 14-07 | XA-000-09-004-020-004-017-01 | 40.9 | 1135.9 09:47:38:febtest:INFO: Set all CSA to ZERO FEB type: A FEB_A: 1 FEB_B: 0 09:47:40:ST3_smx:INFO: chip: 8-1 28.225000 C 1200.969315 mV 09:47:40:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:47:40:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:47:40:ST3_smx:INFO: Electrons 09:47:40:ST3_smx:INFO: # loops 0 09:47:42:ST3_smx:INFO: # loops 1 09:47:44:ST3_smx:INFO: # loops 2 09:47:46:ST3_smx:INFO: Total # of broken channels: 0 09:47:46:ST3_smx:INFO: List of broken channels: [] 09:47:46:ST3_smx:INFO: Total # of broken channels: 0 09:47:46:ST3_smx:INFO: List of broken channels: [] 09:47:48:ST3_smx:INFO: chip: 10-3 31.389742 C 1171.483840 mV 09:47:48:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:47:48:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:47:48:ST3_smx:INFO: Electrons 09:47:48:ST3_smx:INFO: # loops 0 09:47:50:ST3_smx:INFO: # loops 1 09:47:52:ST3_smx:INFO: # loops 2 09:47:54:ST3_smx:INFO: Total # of broken channels: 0 09:47:54:ST3_smx:INFO: List of broken channels: [] 09:47:54:ST3_smx:INFO: Total # of broken channels: 0 09:47:54:ST3_smx:INFO: List of broken channels: [] 09:47:56:ST3_smx:INFO: chip: 12-5 28.225000 C 1200.969315 mV 09:47:56:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:47:56:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:47:56:ST3_smx:INFO: Electrons 09:47:56:ST3_smx:INFO: # loops 0 09:47:58:ST3_smx:INFO: # loops 1 09:48:00:ST3_smx:INFO: # loops 2 09:48:02:ST3_smx:INFO: Total # of broken channels: 0 09:48:02:ST3_smx:INFO: List of broken channels: [] 09:48:02:ST3_smx:INFO: Total # of broken channels: 0 09:48:02:ST3_smx:INFO: List of broken channels: [] 09:48:04:ST3_smx:INFO: chip: 14-7 40.898880 C 1147.806000 mV 09:48:04:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:48:04:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:48:04:ST3_smx:INFO: Electrons 09:48:04:ST3_smx:INFO: # loops 0 09:48:06:ST3_smx:INFO: # loops 1 09:48:08:ST3_smx:INFO: # loops 2 09:48:10:ST3_smx:INFO: Total # of broken channels: 0 09:48:10:ST3_smx:INFO: List of broken channels: [] 09:48:10:ST3_smx:INFO: Total # of broken channels: 0 09:48:10:ST3_smx:INFO: List of broken channels: [] 09:48:11:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 09:48:11:febtest:INFO: 08-01 | XA-000-09-004-020-004-009-06 | 28.2 | 1265.4 09:48:11:febtest:INFO: 10-03 | XA-000-09-004-020-004-008-06 | 34.6 | 1201.0 09:48:11:febtest:INFO: 12-05 | XA-000-09-004-020-004-016-01 | 28.2 | 1218.6 09:48:12:febtest:INFO: 14-07 | XA-000-09-004-020-004-017-01 | 40.9 | 1165.6 ############################################################ # S U M M A R Y # ############################################################ {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 25_04_08-09_47_15 OPERATOR : Benjamin; SITE : KIT | SETUP : KIT_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 3136| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['2.450', '0.7271', '1.850', '1.1000', '0.000', '0.0000', '0.000', '0.0000'] VI_after__Init : ['2.450', '0.9963', '1.850', '1.1010', '0.000', '0.0000', '0.000', '0.0000'] VI_at__the_End : ['2.450', '0.9909', '1.850', '0.2715', '0.000', '0.0000', '0.000', '0.0000']