
FEB_3139 11.04.25 07:52:32
TextEdit.txt
07:52:32:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 07:52:32:ST3_Shared:INFO: FEB-Microcable 07:52:32:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 07:52:32:febtest:INFO: Testing FEB with SN 3139 07:52:34:smx_tester:INFO: Scanning setup 07:52:34:elinks:INFO: Disabling clock on downlink 0 07:52:34:elinks:INFO: Disabling clock on downlink 1 07:52:34:elinks:INFO: Disabling clock on downlink 2 07:52:34:elinks:INFO: Disabling clock on downlink 3 07:52:34:elinks:INFO: Disabling clock on downlink 4 07:52:34:setup_element:INFO: Checking SOS, encoding_mode: SOS 07:52:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 07:52:34:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 07:52:34:elinks:INFO: Disabling clock on downlink 0 07:52:34:elinks:INFO: Disabling clock on downlink 1 07:52:34:elinks:INFO: Disabling clock on downlink 2 07:52:34:elinks:INFO: Disabling clock on downlink 3 07:52:34:elinks:INFO: Disabling clock on downlink 4 07:52:34:setup_element:INFO: Checking SOS, encoding_mode: SOS 07:52:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 07:52:34:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0 07:52:34:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1 07:52:34:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2 07:52:34:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3 07:52:34:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4 07:52:34:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5 07:52:34:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6 07:52:34:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7 07:52:34:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8 07:52:34:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9 07:52:34:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10 07:52:34:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11 07:52:34:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12 07:52:34:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13 07:52:34:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14 07:52:34:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15 07:52:34:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 07:52:34:elinks:INFO: Disabling clock on downlink 0 07:52:34:elinks:INFO: Disabling clock on downlink 1 07:52:34:elinks:INFO: Disabling clock on downlink 2 07:52:34:elinks:INFO: Disabling clock on downlink 3 07:52:34:elinks:INFO: Disabling clock on downlink 4 07:52:34:setup_element:INFO: Checking SOS, encoding_mode: SOS 07:52:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 07:52:34:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 07:52:34:elinks:INFO: Disabling clock on downlink 0 07:52:34:elinks:INFO: Disabling clock on downlink 1 07:52:34:elinks:INFO: Disabling clock on downlink 2 07:52:34:elinks:INFO: Disabling clock on downlink 3 07:52:34:elinks:INFO: Disabling clock on downlink 4 07:52:34:setup_element:INFO: Checking SOS, encoding_mode: SOS 07:52:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 07:52:34:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 07:52:34:elinks:INFO: Disabling clock on downlink 0 07:52:34:elinks:INFO: Disabling clock on downlink 1 07:52:34:elinks:INFO: Disabling clock on downlink 2 07:52:34:elinks:INFO: Disabling clock on downlink 3 07:52:34:elinks:INFO: Disabling clock on downlink 4 07:52:34:setup_element:INFO: Checking SOS, encoding_mode: SOS 07:52:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 07:52:35:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 07:52:35:setup_element:INFO: Scanning clock phase 07:52:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 07:52:35:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 07:52:35:setup_element:INFO: Clock phase scan results for group 0, downlink 1 07:52:35:setup_element:INFO: Eye window for uplink 0 : ___________________________________________________________________________XXXXX Clock Delay: 37 07:52:35:setup_element:INFO: Eye window for uplink 1 : ___________________________________________________________________________XXXXX Clock Delay: 37 07:52:35:setup_element:INFO: Eye window for uplink 2 : ___________________________________________________________________________XXXX_ Clock Delay: 36 07:52:35:setup_element:INFO: Eye window for uplink 3 : ___________________________________________________________________________XXXX_ Clock Delay: 36 07:52:35:setup_element:INFO: Eye window for uplink 4 : X___________________________________________________________________________XXXX Clock Delay: 38 07:52:35:setup_element:INFO: Eye window for uplink 5 : X___________________________________________________________________________XXXX Clock Delay: 38 07:52:35:setup_element:INFO: Eye window for uplink 6 : ___________________________________________________________________________XXXX_ Clock Delay: 36 07:52:35:setup_element:INFO: Eye window for uplink 7 : ___________________________________________________________________________XXXX_ Clock Delay: 36 07:52:35:setup_element:INFO: Eye window for uplink 8 : _________________________________________________________________________XXXXX__ Clock Delay: 35 07:52:35:setup_element:INFO: Eye window for uplink 9 : _________________________________________________________________________XXXXX__ Clock Delay: 35 07:52:35:setup_element:INFO: Eye window for uplink 10: _________________________________________________________________________XXXXX__ Clock Delay: 35 07:52:35:setup_element:INFO: Eye window for uplink 11: _________________________________________________________________________XXXXX__ Clock Delay: 35 07:52:35:setup_element:INFO: Eye window for uplink 12: __________________________________________________________________________XXXXX_ Clock Delay: 36 07:52:35:setup_element:INFO: Eye window for uplink 13: __________________________________________________________________________XXXXX_ Clock Delay: 36 07:52:35:setup_element:INFO: Eye window for uplink 14: __________________________________________________________________________XXXX__ Clock Delay: 35 07:52:35:setup_element:INFO: Eye window for uplink 15: __________________________________________________________________________XXXX__ Clock Delay: 35 07:52:35:setup_element:INFO: Setting the clock phase to 36 for group 0, downlink 1 07:52:35:setup_element:INFO: Scanning data phases 07:52:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 07:52:35:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 07:52:40:setup_element:INFO: Data phase scan results for group 0, downlink 1 07:52:40:setup_element:INFO: Eye window for uplink 0 : __________XXXXX_________________________ Data delay found: 32 07:52:40:setup_element:INFO: Eye window for uplink 1 : _____XXXXX______________________________ Data delay found: 27 07:52:40:setup_element:INFO: Eye window for uplink 2 : _____XXXXX______________________________ Data delay found: 27 07:52:40:setup_element:INFO: Eye window for uplink 3 : __XXXX__________________________________ Data delay found: 23 07:52:40:setup_element:INFO: Eye window for uplink 4 : ______XXXX______________________________ Data delay found: 27 07:52:40:setup_element:INFO: Eye window for uplink 5 : __XXXXX_________________________________ Data delay found: 24 07:52:40:setup_element:INFO: Eye window for uplink 6 : X__________________________________XXXXX Data delay found: 17 07:52:40:setup_element:INFO: Eye window for uplink 7 : ________________________________XXXX____ Data delay found: 13 07:52:40:setup_element:INFO: Eye window for uplink 8 : ____________________XXXXXX______________ Data delay found: 2 07:52:40:setup_element:INFO: Eye window for uplink 9 : _________________________XXXXXX_________ Data delay found: 7 07:52:40:setup_element:INFO: Eye window for uplink 10: ________________________XXXXXX__________ Data delay found: 6 07:52:40:setup_element:INFO: Eye window for uplink 11: ____________________________XXXX________ Data delay found: 9 07:52:40:setup_element:INFO: Eye window for uplink 12: ________________________XXXXX___________ Data delay found: 6 07:52:40:setup_element:INFO: Eye window for uplink 13: ___________________________XXXXX________ Data delay found: 9 07:52:40:setup_element:INFO: Eye window for uplink 14: __________________________XXXX__________ Data delay found: 7 07:52:40:setup_element:INFO: Eye window for uplink 15: ____________________________XXXX________ Data delay found: 9 07:52:40:setup_element:INFO: Setting the data phase to 32 for uplink 0 07:52:40:setup_element:INFO: Setting the data phase to 27 for uplink 1 07:52:40:setup_element:INFO: Setting the data phase to 27 for uplink 2 07:52:40:setup_element:INFO: Setting the data phase to 23 for uplink 3 07:52:40:setup_element:INFO: Setting the data phase to 27 for uplink 4 07:52:40:setup_element:INFO: Setting the data phase to 24 for uplink 5 07:52:40:setup_element:INFO: Setting the data phase to 17 for uplink 6 07:52:40:setup_element:INFO: Setting the data phase to 13 for uplink 7 07:52:40:setup_element:INFO: Setting the data phase to 2 for uplink 8 07:52:40:setup_element:INFO: Setting the data phase to 7 for uplink 9 07:52:40:setup_element:INFO: Setting the data phase to 6 for uplink 10 07:52:40:setup_element:INFO: Setting the data phase to 9 for uplink 11 07:52:40:setup_element:INFO: Setting the data phase to 6 for uplink 12 07:52:40:setup_element:INFO: Setting the data phase to 9 for uplink 13 07:52:40:setup_element:INFO: Setting the data phase to 7 for uplink 14 07:52:40:setup_element:INFO: Setting the data phase to 9 for uplink 15 07:52:40:setup_element:INFO: Beginning SMX ASICs map scan 07:52:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 07:52:40:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 07:52:40:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 07:52:40:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 07:52:40:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] 07:52:40:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1 07:52:40:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0 07:52:40:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8 07:52:40:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9 07:52:41:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3 07:52:41:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2 07:52:41:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10 07:52:41:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11 07:52:41:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5 07:52:41:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4 07:52:41:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12 07:52:41:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13 07:52:41:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7 07:52:41:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6 07:52:41:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14 07:52:42:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15 07:52:43:setup_element:INFO: Performing Elink synchronization 07:52:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 07:52:43:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 07:52:43:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 07:52:43:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 07:52:43:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1 07:52:43:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)] 1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)] 2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)] 3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)] 4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)] 5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)] 6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)] 7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)] |_________________________________________________________________________| 07:52:44:febtest:INFO: Init all SMX (CSA): 30 07:52:57:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 07:52:58:febtest:INFO: 01-00 | XA-000-09-004-020-007-024-15 | 34.6 | 1165.6 07:52:58:febtest:INFO: 08-01 | XA-000-09-004-020-007-021-15 | 31.4 | 1177.4 07:52:58:febtest:INFO: 03-02 | XA-000-09-004-020-010-021-08 | 40.9 | 1147.8 07:52:58:febtest:INFO: 10-03 | XA-000-09-004-020-004-021-01 | 34.6 | 1171.5 07:52:58:febtest:INFO: 05-04 | XA-000-09-004-020-004-022-01 | 37.7 | 1165.6 07:52:59:febtest:INFO: 12-05 | XA-000-09-004-020-011-006-02 | 40.9 | 1153.7 07:52:59:febtest:INFO: 07-06 | XA-000-09-004-020-013-021-00 | 31.4 | 1177.4 07:52:59:febtest:INFO: 14-07 | XA-000-09-004-020-014-006-09 | 31.4 | 1171.5 07:53:00:febtest:INFO: Set all CSA to ZERO FEB type: A FEB_A: 1 FEB_B: 0 07:53:02:ST3_smx:INFO: chip: 1-0 34.556970 C 1177.390875 mV 07:53:02:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:53:02:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:53:02:ST3_smx:INFO: Electrons 07:53:02:ST3_smx:INFO: # loops 0 07:53:04:ST3_smx:INFO: # loops 1 07:53:05:ST3_smx:INFO: # loops 2 07:53:07:ST3_smx:INFO: Total # of broken channels: 0 07:53:07:ST3_smx:INFO: List of broken channels: [] 07:53:07:ST3_smx:INFO: Total # of broken channels: 0 07:53:07:ST3_smx:INFO: List of broken channels: [] 07:53:08:ST3_smx:INFO: chip: 8-1 31.389742 C 1189.190035 mV 07:53:08:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:53:08:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:53:08:ST3_smx:INFO: Electrons 07:53:08:ST3_smx:INFO: # loops 0 07:53:10:ST3_smx:INFO: # loops 1 07:53:12:ST3_smx:INFO: # loops 2 07:53:13:ST3_smx:INFO: Total # of broken channels: 0 07:53:13:ST3_smx:INFO: List of broken channels: [] 07:53:13:ST3_smx:INFO: Total # of broken channels: 0 07:53:13:ST3_smx:INFO: List of broken channels: [] 07:53:15:ST3_smx:INFO: chip: 3-2 40.898880 C 1153.732915 mV 07:53:15:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:53:15:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:53:15:ST3_smx:INFO: Electrons 07:53:15:ST3_smx:INFO: # loops 0 07:53:17:ST3_smx:INFO: # loops 1 07:53:18:ST3_smx:INFO: # loops 2 07:53:20:ST3_smx:INFO: Total # of broken channels: 1 07:53:20:ST3_smx:INFO: List of broken channels: [19] 07:53:20:ST3_smx:INFO: Total # of broken channels: 1 07:53:20:ST3_smx:INFO: List of broken channels: [19] 07:53:21:ST3_smx:INFO: chip: 10-3 34.556970 C 1183.292940 mV 07:53:21:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:53:21:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:53:21:ST3_smx:INFO: Electrons 07:53:21:ST3_smx:INFO: # loops 0 07:53:23:ST3_smx:INFO: # loops 1 07:53:25:ST3_smx:INFO: # loops 2 07:53:26:ST3_smx:INFO: Total # of broken channels: 0 07:53:26:ST3_smx:INFO: List of broken channels: [] 07:53:26:ST3_smx:INFO: Total # of broken channels: 0 07:53:26:ST3_smx:INFO: List of broken channels: [] 07:53:28:ST3_smx:INFO: chip: 5-4 37.726682 C 1177.390875 mV 07:53:28:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:53:28:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:53:28:ST3_smx:INFO: Electrons 07:53:28:ST3_smx:INFO: # loops 0 07:53:29:ST3_smx:INFO: # loops 1 07:53:31:ST3_smx:INFO: # loops 2 07:53:33:ST3_smx:INFO: Total # of broken channels: 0 07:53:33:ST3_smx:INFO: List of broken channels: [] 07:53:33:ST3_smx:INFO: Total # of broken channels: 0 07:53:33:ST3_smx:INFO: List of broken channels: [] 07:53:34:ST3_smx:INFO: chip: 12-5 40.898880 C 1165.571835 mV 07:53:34:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:53:34:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:53:34:ST3_smx:INFO: Electrons 07:53:34:ST3_smx:INFO: # loops 0 07:53:36:ST3_smx:INFO: # loops 1 07:53:37:ST3_smx:INFO: # loops 2 07:53:39:ST3_smx:INFO: Total # of broken channels: 0 07:53:39:ST3_smx:INFO: List of broken channels: [] 07:53:39:ST3_smx:INFO: Total # of broken channels: 0 07:53:39:ST3_smx:INFO: List of broken channels: [] 07:53:41:ST3_smx:INFO: chip: 7-6 34.556970 C 1189.190035 mV 07:53:41:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:53:41:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:53:41:ST3_smx:INFO: Electrons 07:53:41:ST3_smx:INFO: # loops 0 07:53:42:ST3_smx:INFO: # loops 1 07:53:44:ST3_smx:INFO: # loops 2 07:53:45:ST3_smx:INFO: Total # of broken channels: 0 07:53:45:ST3_smx:INFO: List of broken channels: [] 07:53:45:ST3_smx:INFO: Total # of broken channels: 0 07:53:45:ST3_smx:INFO: List of broken channels: [] 07:53:47:ST3_smx:INFO: chip: 14-7 34.556970 C 1183.292940 mV 07:53:47:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:53:47:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:53:47:ST3_smx:INFO: Electrons 07:53:47:ST3_smx:INFO: # loops 0 07:53:49:ST3_smx:INFO: # loops 1 07:53:50:ST3_smx:INFO: # loops 2 07:53:52:ST3_smx:INFO: Total # of broken channels: 0 07:53:52:ST3_smx:INFO: List of broken channels: [] 07:53:52:ST3_smx:INFO: Total # of broken channels: 0 07:53:52:ST3_smx:INFO: List of broken channels: [] 07:53:52:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 07:53:52:febtest:INFO: 01-00 | XA-000-09-004-020-007-024-15 | 34.6 | 1201.0 07:53:52:febtest:INFO: 08-01 | XA-000-09-004-020-007-021-15 | 34.6 | 1212.7 07:53:53:febtest:INFO: 03-02 | XA-000-09-004-020-010-021-08 | 44.1 | 1177.4 07:53:53:febtest:INFO: 10-03 | XA-000-09-004-020-004-021-01 | 37.7 | 1206.9 07:53:53:febtest:INFO: 05-04 | XA-000-09-004-020-004-022-01 | 37.7 | 1206.9 07:53:53:febtest:INFO: 12-05 | XA-000-09-004-020-011-006-02 | 44.1 | 1183.3 07:53:53:febtest:INFO: 07-06 | XA-000-09-004-020-013-021-00 | 34.6 | 1212.7 07:53:54:febtest:INFO: 14-07 | XA-000-09-004-020-014-006-09 | 34.6 | 1201.0 ############################################################ # S U M M A R Y # ############################################################ {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 25_04_11-07_52_32 OPERATOR : Benjamin; SITE : KIT | SETUP : KIT_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 3139| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['2.450', '1.4640', '1.853', '2.6540', '0.000', '0.0000', '0.000', '0.0000'] VI_after__Init : ['2.450', '2.0160', '1.850', '2.3170', '0.000', '0.0000', '0.000', '0.0000'] VI_at__the_End : ['2.450', '1.9710', '1.850', '0.5319', '0.000', '0.0000', '0.000', '0.0000']