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FEB_3143 17.04.25 13:30:38
Info
13:30:38:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:30:38:ST3_Shared:INFO: FEB-Microcable
13:30:38:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:30:38:febtest:INFO: Testing FEB with SN 3143
13:30:40:smx_tester:INFO: Scanning setup
13:30:40:elinks:INFO: Disabling clock on downlink 0
13:30:40:elinks:INFO: Disabling clock on downlink 1
13:30:40:elinks:INFO: Disabling clock on downlink 2
13:30:40:elinks:INFO: Disabling clock on downlink 3
13:30:40:elinks:INFO: Disabling clock on downlink 4
13:30:40:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:30:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:30:40:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:30:40:elinks:INFO: Disabling clock on downlink 0
13:30:40:elinks:INFO: Disabling clock on downlink 1
13:30:40:elinks:INFO: Disabling clock on downlink 2
13:30:40:elinks:INFO: Disabling clock on downlink 3
13:30:40:elinks:INFO: Disabling clock on downlink 4
13:30:40:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:30:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:30:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
13:30:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
13:30:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
13:30:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
13:30:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
13:30:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
13:30:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
13:30:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
13:30:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
13:30:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
13:30:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
13:30:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
13:30:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
13:30:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
13:30:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
13:30:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
13:30:40:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:30:40:elinks:INFO: Disabling clock on downlink 0
13:30:40:elinks:INFO: Disabling clock on downlink 1
13:30:40:elinks:INFO: Disabling clock on downlink 2
13:30:40:elinks:INFO: Disabling clock on downlink 3
13:30:40:elinks:INFO: Disabling clock on downlink 4
13:30:40:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:30:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:30:40:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:30:40:elinks:INFO: Disabling clock on downlink 0
13:30:40:elinks:INFO: Disabling clock on downlink 1
13:30:40:elinks:INFO: Disabling clock on downlink 2
13:30:40:elinks:INFO: Disabling clock on downlink 3
13:30:41:elinks:INFO: Disabling clock on downlink 4
13:30:41:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:30:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
13:30:41:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:30:41:elinks:INFO: Disabling clock on downlink 0
13:30:41:elinks:INFO: Disabling clock on downlink 1
13:30:41:elinks:INFO: Disabling clock on downlink 2
13:30:41:elinks:INFO: Disabling clock on downlink 3
13:30:41:elinks:INFO: Disabling clock on downlink 4
13:30:41:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:30:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
13:30:41:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:30:41:setup_element:INFO: Scanning clock phase
13:30:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:30:41:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:30:41:setup_element:INFO: Clock phase scan results for group 0, downlink 1
13:30:41:setup_element:INFO: Eye window for uplink 0 : X___________________________________________________________________________XXXX
Clock Delay: 38
13:30:41:setup_element:INFO: Eye window for uplink 1 : X___________________________________________________________________________XXXX
Clock Delay: 38
13:30:41:setup_element:INFO: Eye window for uplink 2 : _________________________________________________________________________XXXXXXX
Clock Delay: 36
13:30:41:setup_element:INFO: Eye window for uplink 3 : _________________________________________________________________________XXXXXXX
Clock Delay: 36
13:30:41:setup_element:INFO: Eye window for uplink 4 : ___________________________________________________________________________XXXXX
Clock Delay: 37
13:30:41:setup_element:INFO: Eye window for uplink 5 : ___________________________________________________________________________XXXXX
Clock Delay: 37
13:30:41:setup_element:INFO: Eye window for uplink 6 : ____________________________________________________________________________XXXX
Clock Delay: 37
13:30:41:setup_element:INFO: Eye window for uplink 7 : ____________________________________________________________________________XXXX
Clock Delay: 37
13:30:41:setup_element:INFO: Eye window for uplink 8 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
13:30:41:setup_element:INFO: Eye window for uplink 9 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
13:30:41:setup_element:INFO: Eye window for uplink 10: _________________________________________________________________________XXXXX__
Clock Delay: 35
13:30:41:setup_element:INFO: Eye window for uplink 11: _________________________________________________________________________XXXXX__
Clock Delay: 35
13:30:41:setup_element:INFO: Eye window for uplink 12: __________________________________________________________________________XXXX__
Clock Delay: 35
13:30:41:setup_element:INFO: Eye window for uplink 13: __________________________________________________________________________XXXX__
Clock Delay: 35
13:30:41:setup_element:INFO: Eye window for uplink 14: _________________________________________________________________________XXXXXX_
Clock Delay: 35
13:30:41:setup_element:INFO: Eye window for uplink 15: _________________________________________________________________________XXXXXX_
Clock Delay: 35
13:30:41:setup_element:INFO: Setting the clock phase to 36 for group 0, downlink 1
13:30:41:setup_element:INFO: Scanning data phases
13:30:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:30:41:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:30:46:setup_element:INFO: Data phase scan results for group 0, downlink 1
13:30:46:setup_element:INFO: Eye window for uplink 0 : __________XXXXX_________________________
Data delay found: 32
13:30:46:setup_element:INFO: Eye window for uplink 1 : _____XXXXXX_____________________________
Data delay found: 27
13:30:46:setup_element:INFO: Eye window for uplink 2 : __XXXXXX________________________________
Data delay found: 24
13:30:46:setup_element:INFO: Eye window for uplink 3 : XXXXX________________________________XXX
Data delay found: 20
13:30:46:setup_element:INFO: Eye window for uplink 4 : __XXXXXX________________________________
Data delay found: 24
13:30:46:setup_element:INFO: Eye window for uplink 5 : XXXX_________________________________XXX
Data delay found: 20
13:30:46:setup_element:INFO: Eye window for uplink 6 : XXX__________________________________XXX
Data delay found: 19
13:30:46:setup_element:INFO: Eye window for uplink 7 : __________________________________XXXXX_
Data delay found: 16
13:30:46:setup_element:INFO: Eye window for uplink 8 : __________________XXXXXXXX______________
Data delay found: 1
13:30:46:setup_element:INFO: Eye window for uplink 9 : _________________________XXXXXX_________
Data delay found: 7
13:30:46:setup_element:INFO: Eye window for uplink 10: ______________________XXXXXX____________
Data delay found: 4
13:30:46:setup_element:INFO: Eye window for uplink 11: ________________________XXXXXXX_________
Data delay found: 7
13:30:46:setup_element:INFO: Eye window for uplink 12: ________________________XXXXX___________
Data delay found: 6
13:30:46:setup_element:INFO: Eye window for uplink 13: ___________________________XXXXX________
Data delay found: 9
13:30:46:setup_element:INFO: Eye window for uplink 14: _________________________XXXXX__________
Data delay found: 7
13:30:46:setup_element:INFO: Eye window for uplink 15: ___________________________XXXXX________
Data delay found: 9
13:30:46:setup_element:INFO: Setting the data phase to 32 for uplink 0
13:30:46:setup_element:INFO: Setting the data phase to 27 for uplink 1
13:30:46:setup_element:INFO: Setting the data phase to 24 for uplink 2
13:30:46:setup_element:INFO: Setting the data phase to 20 for uplink 3
13:30:46:setup_element:INFO: Setting the data phase to 24 for uplink 4
13:30:46:setup_element:INFO: Setting the data phase to 20 for uplink 5
13:30:46:setup_element:INFO: Setting the data phase to 19 for uplink 6
13:30:46:setup_element:INFO: Setting the data phase to 16 for uplink 7
13:30:46:setup_element:INFO: Setting the data phase to 1 for uplink 8
13:30:46:setup_element:INFO: Setting the data phase to 7 for uplink 9
13:30:46:setup_element:INFO: Setting the data phase to 4 for uplink 10
13:30:46:setup_element:INFO: Setting the data phase to 7 for uplink 11
13:30:46:setup_element:INFO: Setting the data phase to 6 for uplink 12
13:30:46:setup_element:INFO: Setting the data phase to 9 for uplink 13
13:30:46:setup_element:INFO: Setting the data phase to 7 for uplink 14
13:30:46:setup_element:INFO: Setting the data phase to 9 for uplink 15
13:30:46:setup_element:INFO: Beginning SMX ASICs map scan
13:30:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:30:46:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:30:46:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
13:30:46:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
13:30:46:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
13:30:46:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
13:30:46:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
13:30:47:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
13:30:47:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
13:30:47:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
13:30:47:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
13:30:47:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
13:30:47:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
13:30:47:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
13:30:47:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
13:30:47:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
13:30:47:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
13:30:47:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
13:30:48:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
13:30:48:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
13:30:48:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
13:30:49:setup_element:INFO: Performing Elink synchronization
13:30:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:30:49:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:30:49:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
13:30:49:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
13:30:49:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
13:30:49:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
13:30:50:febtest:INFO: Init all SMX (CSA): 30
13:31:03:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:31:03:febtest:INFO: 01-00 | XA-000-09-004-020-011-026-05 | 34.6 | 1159.7
13:31:03:febtest:INFO: 08-01 | XA-000-09-004-020-008-024-11 | 34.6 | 1171.5
13:31:03:febtest:INFO: 03-02 | XA-000-09-004-020-011-024-05 | 40.9 | 1147.8
13:31:04:febtest:INFO: 10-03 | XA-000-09-004-020-005-024-12 | 47.3 | 1118.1
13:31:04:febtest:INFO: 05-04 | XA-000-09-004-020-005-023-12 | 37.7 | 1165.6
13:31:04:febtest:INFO: 12-05 | XA-000-09-004-020-005-017-12 | 44.1 | 1135.9
13:31:04:febtest:INFO: 07-06 | XA-000-09-004-020-014-026-14 | 31.4 | 1171.5
13:31:04:febtest:INFO: 14-07 | XA-000-09-004-020-011-017-05 | 44.1 | 1141.9
13:31:05:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
13:31:07:ST3_smx:INFO: chip: 1-0 34.556970 C 1171.483840 mV
13:31:07:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:31:07:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:31:07:ST3_smx:INFO: Electrons
13:31:07:ST3_smx:INFO: # loops 0
13:31:09:ST3_smx:INFO: # loops 1
13:31:10:ST3_smx:INFO: # loops 2
13:31:12:ST3_smx:INFO: Total # of broken channels: 0
13:31:12:ST3_smx:INFO: List of broken channels: []
13:31:12:ST3_smx:INFO: Total # of broken channels: 0
13:31:12:ST3_smx:INFO: List of broken channels: []
13:31:13:ST3_smx:INFO: chip: 8-1 37.726682 C 1189.190035 mV
13:31:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:31:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:31:13:ST3_smx:INFO: Electrons
13:31:13:ST3_smx:INFO: # loops 0
13:31:15:ST3_smx:INFO: # loops 1
13:31:16:ST3_smx:INFO: # loops 2
13:31:18:ST3_smx:INFO: Total # of broken channels: 0
13:31:18:ST3_smx:INFO: List of broken channels: []
13:31:18:ST3_smx:INFO: Total # of broken channels: 0
13:31:18:ST3_smx:INFO: List of broken channels: []
13:31:19:ST3_smx:INFO: chip: 3-2 40.898880 C 1159.654860 mV
13:31:19:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:31:19:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:31:19:ST3_smx:INFO: Electrons
13:31:19:ST3_smx:INFO: # loops 0
13:31:21:ST3_smx:INFO: # loops 1
13:31:22:ST3_smx:INFO: # loops 2
13:31:24:ST3_smx:INFO: Total # of broken channels: 0
13:31:24:ST3_smx:INFO: List of broken channels: []
13:31:24:ST3_smx:INFO: Total # of broken channels: 5
13:31:24:ST3_smx:INFO: List of broken channels: [0, 4, 6, 8, 10]
13:31:26:ST3_smx:INFO: chip: 10-3 47.250730 C 1135.937260 mV
13:31:26:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:31:26:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:31:26:ST3_smx:INFO: Electrons
13:31:26:ST3_smx:INFO: # loops 0
13:31:27:ST3_smx:INFO: # loops 1
13:31:29:ST3_smx:INFO: # loops 2
13:31:30:ST3_smx:INFO: Total # of broken channels: 0
13:31:30:ST3_smx:INFO: List of broken channels: []
13:31:31:ST3_smx:INFO: Total # of broken channels: 12
13:31:31:ST3_smx:INFO: List of broken channels: [3, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29]
13:31:32:ST3_smx:INFO: chip: 5-4 37.726682 C 1177.390875 mV
13:31:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:31:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:31:32:ST3_smx:INFO: Electrons
13:31:32:ST3_smx:INFO: # loops 0
13:31:34:ST3_smx:INFO: # loops 1
13:31:35:ST3_smx:INFO: # loops 2
13:31:37:ST3_smx:INFO: Total # of broken channels: 0
13:31:37:ST3_smx:INFO: List of broken channels: []
13:31:37:ST3_smx:INFO: Total # of broken channels: 0
13:31:37:ST3_smx:INFO: List of broken channels: []
13:31:38:ST3_smx:INFO: chip: 12-5 44.073563 C 1147.806000 mV
13:31:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:31:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:31:38:ST3_smx:INFO: Electrons
13:31:38:ST3_smx:INFO: # loops 0
13:31:40:ST3_smx:INFO: # loops 1
13:31:41:ST3_smx:INFO: # loops 2
13:31:43:ST3_smx:INFO: Total # of broken channels: 0
13:31:43:ST3_smx:INFO: List of broken channels: []
13:31:43:ST3_smx:INFO: Total # of broken channels: 0
13:31:43:ST3_smx:INFO: List of broken channels: []
13:31:44:ST3_smx:INFO: chip: 7-6 34.556970 C 1183.292940 mV
13:31:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:31:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:31:44:ST3_smx:INFO: Electrons
13:31:44:ST3_smx:INFO: # loops 0
13:31:46:ST3_smx:INFO: # loops 1
13:31:48:ST3_smx:INFO: # loops 2
13:31:49:ST3_smx:INFO: Total # of broken channels: 0
13:31:49:ST3_smx:INFO: List of broken channels: []
13:31:49:ST3_smx:INFO: Total # of broken channels: 0
13:31:49:ST3_smx:INFO: List of broken channels: []
13:31:51:ST3_smx:INFO: chip: 14-7 47.250730 C 1153.732915 mV
13:31:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:31:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:31:51:ST3_smx:INFO: Electrons
13:31:51:ST3_smx:INFO: # loops 0
13:31:52:ST3_smx:INFO: # loops 1
13:31:54:ST3_smx:INFO: # loops 2
13:31:55:ST3_smx:INFO: Total # of broken channels: 0
13:31:55:ST3_smx:INFO: List of broken channels: []
13:31:55:ST3_smx:INFO: Total # of broken channels: 0
13:31:55:ST3_smx:INFO: List of broken channels: []
13:31:56:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:31:56:febtest:INFO: 01-00 | XA-000-09-004-020-011-026-05 | 37.7 | 1195.1
13:31:56:febtest:INFO: 08-01 | XA-000-09-004-020-008-024-11 | 37.7 | 1224.5
13:31:56:febtest:INFO: 03-02 | XA-000-09-004-020-011-024-05 | 40.9 | 1183.3
13:31:57:febtest:INFO: 10-03 | XA-000-09-004-020-005-024-12 | 50.4 | 1153.7
13:31:57:febtest:INFO: 05-04 | XA-000-09-004-020-005-023-12 | 37.7 | 1195.1
13:31:57:febtest:INFO: 12-05 | XA-000-09-004-020-005-017-12 | 47.3 | 1165.6
13:31:57:febtest:INFO: 07-06 | XA-000-09-004-020-014-026-14 | 34.6 | 1201.0
13:31:57:febtest:INFO: 14-07 | XA-000-09-004-020-011-017-05 | 47.3 | 1177.4
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_04_17-13_30_38
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3143| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.4310', '1.850', '2.8120', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9610', '1.850', '2.4200', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9700', '1.850', '0.5328', '0.000', '0.0000', '0.000', '0.0000']