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FEB_3144 15.04.25 08:09:08
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08:09:08:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:09:08:ST3_Shared:INFO: FEB-Microcable
08:09:08:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:09:08:febtest:INFO: Testing FEB with SN 3144
08:09:10:smx_tester:INFO: Scanning setup
08:09:10:elinks:INFO: Disabling clock on downlink 0
08:09:10:elinks:INFO: Disabling clock on downlink 1
08:09:10:elinks:INFO: Disabling clock on downlink 2
08:09:10:elinks:INFO: Disabling clock on downlink 3
08:09:10:elinks:INFO: Disabling clock on downlink 4
08:09:10:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:09:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:09:10:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:09:10:elinks:INFO: Disabling clock on downlink 0
08:09:10:elinks:INFO: Disabling clock on downlink 1
08:09:10:elinks:INFO: Disabling clock on downlink 2
08:09:10:elinks:INFO: Disabling clock on downlink 3
08:09:10:elinks:INFO: Disabling clock on downlink 4
08:09:10:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:09:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:09:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
08:09:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
08:09:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
08:09:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
08:09:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
08:09:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
08:09:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
08:09:10:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
08:09:10:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:09:10:elinks:INFO: Disabling clock on downlink 0
08:09:10:elinks:INFO: Disabling clock on downlink 1
08:09:10:elinks:INFO: Disabling clock on downlink 2
08:09:10:elinks:INFO: Disabling clock on downlink 3
08:09:10:elinks:INFO: Disabling clock on downlink 4
08:09:10:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:09:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:09:10:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:09:10:elinks:INFO: Disabling clock on downlink 0
08:09:10:elinks:INFO: Disabling clock on downlink 1
08:09:10:elinks:INFO: Disabling clock on downlink 2
08:09:10:elinks:INFO: Disabling clock on downlink 3
08:09:10:elinks:INFO: Disabling clock on downlink 4
08:09:10:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:09:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
08:09:10:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:09:10:elinks:INFO: Disabling clock on downlink 0
08:09:10:elinks:INFO: Disabling clock on downlink 1
08:09:10:elinks:INFO: Disabling clock on downlink 2
08:09:10:elinks:INFO: Disabling clock on downlink 3
08:09:10:elinks:INFO: Disabling clock on downlink 4
08:09:10:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:09:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
08:09:11:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:09:11:setup_element:INFO: Scanning clock phase
08:09:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:09:11:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:09:11:setup_element:INFO: Clock phase scan results for group 0, downlink 1
08:09:11:setup_element:INFO: Eye window for uplink 8 : _________________________________________________________________________XXXXX__
Clock Delay: 35
08:09:11:setup_element:INFO: Eye window for uplink 9 : _________________________________________________________________________XXXXX__
Clock Delay: 35
08:09:11:setup_element:INFO: Eye window for uplink 10: _________________________________________________________________________XXXXXX_
Clock Delay: 35
08:09:11:setup_element:INFO: Eye window for uplink 11: _________________________________________________________________________XXXXXX_
Clock Delay: 35
08:09:11:setup_element:INFO: Eye window for uplink 12: __________________________________________________________________________XXXXXX
Clock Delay: 36
08:09:11:setup_element:INFO: Eye window for uplink 13: __________________________________________________________________________XXXXXX
Clock Delay: 36
08:09:11:setup_element:INFO: Eye window for uplink 14: __________________________________________________________________________XXXXX_
Clock Delay: 36
08:09:11:setup_element:INFO: Eye window for uplink 15: __________________________________________________________________________XXXXX_
Clock Delay: 36
08:09:11:setup_element:INFO: Setting the clock phase to 36 for group 0, downlink 1
08:09:11:setup_element:INFO: Scanning data phases
08:09:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:09:11:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:09:16:setup_element:INFO: Data phase scan results for group 0, downlink 1
08:09:16:setup_element:INFO: Eye window for uplink 8 : _________________________XXXXXX_________
Data delay found: 7
08:09:16:setup_element:INFO: Eye window for uplink 9 : ______________________________XXXXXX____
Data delay found: 12
08:09:16:setup_element:INFO: Eye window for uplink 10: _____________________________XXXX_______
Data delay found: 10
08:09:16:setup_element:INFO: Eye window for uplink 11: ________________________________XXXXX___
Data delay found: 14
08:09:16:setup_element:INFO: Eye window for uplink 12: ______________________________XXXX__XXXX
Data delay found: 14
08:09:16:setup_element:INFO: Eye window for uplink 13: _________________________________XXXXXXX
Data delay found: 16
08:09:16:setup_element:INFO: Eye window for uplink 14: ______________________________XXXX______
Data delay found: 11
08:09:16:setup_element:INFO: Eye window for uplink 15: ________________________________XXXXX___
Data delay found: 14
08:09:16:setup_element:INFO: Setting the data phase to 7 for uplink 8
08:09:16:setup_element:INFO: Setting the data phase to 12 for uplink 9
08:09:16:setup_element:INFO: Setting the data phase to 10 for uplink 10
08:09:16:setup_element:INFO: Setting the data phase to 14 for uplink 11
08:09:16:setup_element:INFO: Setting the data phase to 14 for uplink 12
08:09:16:setup_element:INFO: Setting the data phase to 16 for uplink 13
08:09:16:setup_element:INFO: Setting the data phase to 11 for uplink 14
08:09:16:setup_element:INFO: Setting the data phase to 14 for uplink 15
08:09:16:setup_element:INFO: Beginning SMX ASICs map scan
08:09:16:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:09:16:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:09:16:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
08:09:16:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
08:09:16:uplink:INFO: Setting uplinks mask [8, 9, 10, 11, 12, 13, 14, 15]
08:09:16:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
08:09:16:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
08:09:17:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
08:09:17:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
08:09:17:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
08:09:17:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
08:09:17:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
08:09:17:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
08:09:19:setup_element:INFO: Performing Elink synchronization
08:09:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:09:19:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:09:19:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
08:09:19:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
08:09:19:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
08:09:19:uplink:INFO: Enabling uplinks [8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
08:09:19:febtest:INFO: Init all SMX (CSA): 30
08:09:26:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:09:26:febtest:INFO: 08-01 | XA-000-09-004-020-005-013-11 | 37.7 | 1141.9
08:09:26:febtest:INFO: 10-03 | XA-000-09-004-020-002-013-03 | 18.7 | 1224.5
08:09:27:febtest:INFO: 12-05 | XA-000-09-004-020-017-013-01 | 31.4 | 1153.7
08:09:27:febtest:INFO: 14-07 | XA-000-09-004-020-017-012-01 | 28.2 | 1177.4
08:09:28:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
08:09:30:ST3_smx:INFO: chip: 8-1 37.726682 C 1153.732915 mV
08:09:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:09:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:09:30:ST3_smx:INFO: Electrons
08:09:30:ST3_smx:INFO: # loops 0
08:09:32:ST3_smx:INFO: # loops 1
08:09:33:ST3_smx:INFO: # loops 2
08:09:35:ST3_smx:INFO: Total # of broken channels: 0
08:09:35:ST3_smx:INFO: List of broken channels: []
08:09:35:ST3_smx:INFO: Total # of broken channels: 0
08:09:35:ST3_smx:INFO: List of broken channels: []
08:09:37:ST3_smx:INFO: chip: 10-3 18.745682 C 1242.040240 mV
08:09:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:09:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:09:37:ST3_smx:INFO: Electrons
08:09:37:ST3_smx:INFO: # loops 0
08:09:38:ST3_smx:INFO: # loops 1
08:09:40:ST3_smx:INFO: # loops 2
08:09:42:ST3_smx:INFO: Total # of broken channels: 0
08:09:42:ST3_smx:INFO: List of broken channels: []
08:09:42:ST3_smx:INFO: Total # of broken channels: 0
08:09:42:ST3_smx:INFO: List of broken channels: []
08:09:44:ST3_smx:INFO: chip: 12-5 34.556970 C 1165.571835 mV
08:09:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:09:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:09:44:ST3_smx:INFO: Electrons
08:09:44:ST3_smx:INFO: # loops 0
08:09:45:ST3_smx:INFO: # loops 1
08:09:47:ST3_smx:INFO: # loops 2
08:09:49:ST3_smx:INFO: Total # of broken channels: 0
08:09:49:ST3_smx:INFO: List of broken channels: []
08:09:49:ST3_smx:INFO: Total # of broken channels: 0
08:09:49:ST3_smx:INFO: List of broken channels: []
08:09:50:ST3_smx:INFO: chip: 14-7 28.225000 C 1183.292940 mV
08:09:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:09:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:09:51:ST3_smx:INFO: Electrons
08:09:51:ST3_smx:INFO: # loops 0
08:09:52:ST3_smx:INFO: # loops 1
08:09:54:ST3_smx:INFO: # loops 2
08:09:56:ST3_smx:INFO: Total # of broken channels: 0
08:09:56:ST3_smx:INFO: List of broken channels: []
08:09:56:ST3_smx:INFO: Total # of broken channels: 0
08:09:56:ST3_smx:INFO: List of broken channels: []
08:09:56:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:09:56:febtest:INFO: 08-01 | XA-000-09-004-020-005-013-11 | 37.7 | 1177.4
08:09:56:febtest:INFO: 10-03 | XA-000-09-004-020-002-013-03 | 15.6 | 1300.3
08:09:56:febtest:INFO: 12-05 | XA-000-09-004-020-017-013-01 | 34.6 | 1183.3
08:09:57:febtest:INFO: 14-07 | XA-000-09-004-020-017-012-01 | 31.4 | 1206.9
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_04_15-08_09_08
OPERATOR : Benjamin;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3144| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '0.7921', '1.854', '1.0480', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.0490', '1.850', '1.1810', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '0.9975', '1.850', '0.2712', '0.000', '0.0000', '0.000', '0.0000']