
FEB_3145 15.04.25 13:48:34
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13:48:34:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 13:48:34:ST3_Shared:INFO: FEB-Microcable 13:48:34:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 13:48:34:febtest:INFO: Testing FEB with SN 3145 13:48:36:smx_tester:INFO: Scanning setup 13:48:36:elinks:INFO: Disabling clock on downlink 0 13:48:36:elinks:INFO: Disabling clock on downlink 1 13:48:36:elinks:INFO: Disabling clock on downlink 2 13:48:36:elinks:INFO: Disabling clock on downlink 3 13:48:36:elinks:INFO: Disabling clock on downlink 4 13:48:36:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:48:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 13:48:36:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:48:36:elinks:INFO: Disabling clock on downlink 0 13:48:36:elinks:INFO: Disabling clock on downlink 1 13:48:36:elinks:INFO: Disabling clock on downlink 2 13:48:36:elinks:INFO: Disabling clock on downlink 3 13:48:36:elinks:INFO: Disabling clock on downlink 4 13:48:36:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:48:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 13:48:36:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8 13:48:36:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9 13:48:36:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10 13:48:36:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11 13:48:36:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12 13:48:36:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13 13:48:36:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14 13:48:36:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15 13:48:36:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:48:36:elinks:INFO: Disabling clock on downlink 0 13:48:36:elinks:INFO: Disabling clock on downlink 1 13:48:36:elinks:INFO: Disabling clock on downlink 2 13:48:36:elinks:INFO: Disabling clock on downlink 3 13:48:36:elinks:INFO: Disabling clock on downlink 4 13:48:36:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:48:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 13:48:36:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:48:36:elinks:INFO: Disabling clock on downlink 0 13:48:36:elinks:INFO: Disabling clock on downlink 1 13:48:36:elinks:INFO: Disabling clock on downlink 2 13:48:36:elinks:INFO: Disabling clock on downlink 3 13:48:36:elinks:INFO: Disabling clock on downlink 4 13:48:36:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:48:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 13:48:36:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:48:36:elinks:INFO: Disabling clock on downlink 0 13:48:36:elinks:INFO: Disabling clock on downlink 1 13:48:36:elinks:INFO: Disabling clock on downlink 2 13:48:36:elinks:INFO: Disabling clock on downlink 3 13:48:36:elinks:INFO: Disabling clock on downlink 4 13:48:36:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:48:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 13:48:36:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:48:36:setup_element:INFO: Scanning clock phase 13:48:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 13:48:36:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 13:48:36:setup_element:INFO: Clock phase scan results for group 0, downlink 1 13:48:36:setup_element:INFO: Eye window for uplink 8 : _______________________________________________________________________XXXXX____ Clock Delay: 33 13:48:36:setup_element:INFO: Eye window for uplink 9 : _______________________________________________________________________XXXXX____ Clock Delay: 33 13:48:36:setup_element:INFO: Eye window for uplink 10: _______________________________________________________________________XXXXXXX__ Clock Delay: 34 13:48:36:setup_element:INFO: Eye window for uplink 11: _______________________________________________________________________XXXXXXX__ Clock Delay: 34 13:48:36:setup_element:INFO: Eye window for uplink 12: ________________________________________________________________________XXXXXX__ Clock Delay: 34 13:48:36:setup_element:INFO: Eye window for uplink 13: ________________________________________________________________________XXXXXX__ Clock Delay: 34 13:48:37:setup_element:INFO: Eye window for uplink 14: __________________________________________________________________________XXXXX_ Clock Delay: 36 13:48:37:setup_element:INFO: Eye window for uplink 15: __________________________________________________________________________XXXXX_ Clock Delay: 36 13:48:37:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 1 13:48:37:setup_element:INFO: Scanning data phases 13:48:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 13:48:37:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 13:48:42:setup_element:INFO: Data phase scan results for group 0, downlink 1 13:48:42:setup_element:INFO: Eye window for uplink 8 : ________________________XXXXXXX_________ Data delay found: 7 13:48:42:setup_element:INFO: Eye window for uplink 9 : ____________________________XXXXXX______ Data delay found: 10 13:48:42:setup_element:INFO: Eye window for uplink 10: __________________________XXXXXXX_______ Data delay found: 9 13:48:42:setup_element:INFO: Eye window for uplink 11: _____________________________XXXXXX_____ Data delay found: 11 13:48:42:setup_element:INFO: Eye window for uplink 12: __________________________XXXXXX________ Data delay found: 8 13:48:42:setup_element:INFO: Eye window for uplink 13: _____________________________XXXXXX_____ Data delay found: 11 13:48:42:setup_element:INFO: Eye window for uplink 14: ____________________________XXXXXXX_____ Data delay found: 11 13:48:42:setup_element:INFO: Eye window for uplink 15: _____________________________XXXXXXXX___ Data delay found: 12 13:48:42:setup_element:INFO: Setting the data phase to 7 for uplink 8 13:48:42:setup_element:INFO: Setting the data phase to 10 for uplink 9 13:48:42:setup_element:INFO: Setting the data phase to 9 for uplink 10 13:48:42:setup_element:INFO: Setting the data phase to 11 for uplink 11 13:48:42:setup_element:INFO: Setting the data phase to 8 for uplink 12 13:48:42:setup_element:INFO: Setting the data phase to 11 for uplink 13 13:48:42:setup_element:INFO: Setting the data phase to 11 for uplink 14 13:48:42:setup_element:INFO: Setting the data phase to 12 for uplink 15 13:48:42:setup_element:INFO: Beginning SMX ASICs map scan 13:48:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 13:48:42:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 13:48:42:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 13:48:42:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 13:48:42:uplink:INFO: Setting uplinks mask [8, 9, 10, 11, 12, 13, 14, 15] 13:48:42:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8 13:48:42:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9 13:48:42:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10 13:48:42:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11 13:48:43:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12 13:48:43:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13 13:48:43:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14 13:48:43:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15 13:48:44:setup_element:INFO: Performing Elink synchronization 13:48:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 13:48:44:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 13:48:44:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 13:48:44:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 13:48:44:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1 13:48:44:uplink:INFO: Enabling uplinks [8, 9, 10, 11, 12, 13, 14, 15] |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)] 3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)] 5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)] 7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)] |_________________________________________________________________________| 13:48:45:febtest:INFO: Init all SMX (CSA): 30 13:48:52:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 13:48:52:febtest:INFO: 08-01 | XA-000-09-004-020-011-011-02 | 37.7 | 1147.8 13:48:52:febtest:INFO: 10-03 | XA-000-09-004-020-011-010-02 | 37.7 | 1159.7 13:48:52:febtest:INFO: 12-05 | XA-000-09-004-020-005-012-11 | 40.9 | 1141.9 13:48:53:febtest:INFO: 14-07 | XA-000-09-004-020-008-011-12 | 47.3 | 1118.1 13:48:54:febtest:INFO: Set all CSA to ZERO FEB type: A FEB_A: 1 FEB_B: 0 13:48:55:ST3_smx:INFO: chip: 8-1 37.726682 C 1159.654860 mV 13:48:55:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:48:55:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:48:55:ST3_smx:INFO: Electrons 13:48:55:ST3_smx:INFO: # loops 0 13:48:57:ST3_smx:INFO: # loops 1 13:48:58:ST3_smx:INFO: # loops 2 13:49:00:ST3_smx:INFO: Total # of broken channels: 0 13:49:00:ST3_smx:INFO: List of broken channels: [] 13:49:00:ST3_smx:INFO: Total # of broken channels: 0 13:49:00:ST3_smx:INFO: List of broken channels: [] 13:49:02:ST3_smx:INFO: chip: 10-3 37.726682 C 1165.571835 mV 13:49:02:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:49:02:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:49:02:ST3_smx:INFO: Electrons 13:49:02:ST3_smx:INFO: # loops 0 13:49:03:ST3_smx:INFO: # loops 1 13:49:05:ST3_smx:INFO: # loops 2 13:49:06:ST3_smx:INFO: Total # of broken channels: 0 13:49:06:ST3_smx:INFO: List of broken channels: [] 13:49:06:ST3_smx:INFO: Total # of broken channels: 0 13:49:06:ST3_smx:INFO: List of broken channels: [] 13:49:08:ST3_smx:INFO: chip: 12-5 40.898880 C 1153.732915 mV 13:49:08:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:49:08:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:49:08:ST3_smx:INFO: Electrons 13:49:08:ST3_smx:INFO: # loops 0 13:49:10:ST3_smx:INFO: # loops 1 13:49:11:ST3_smx:INFO: # loops 2 13:49:13:ST3_smx:INFO: Total # of broken channels: 0 13:49:13:ST3_smx:INFO: List of broken channels: [] 13:49:13:ST3_smx:INFO: Total # of broken channels: 0 13:49:13:ST3_smx:INFO: List of broken channels: [] 13:49:14:ST3_smx:INFO: chip: 14-7 47.250730 C 1124.048640 mV 13:49:14:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:49:14:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:49:14:ST3_smx:INFO: Electrons 13:49:14:ST3_smx:INFO: # loops 0 13:49:16:ST3_smx:INFO: # loops 1 13:49:17:ST3_smx:INFO: # loops 2 13:49:19:ST3_smx:INFO: Total # of broken channels: 0 13:49:19:ST3_smx:INFO: List of broken channels: [] 13:49:19:ST3_smx:INFO: Total # of broken channels: 0 13:49:19:ST3_smx:INFO: List of broken channels: [] 13:49:20:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 13:49:20:febtest:INFO: 08-01 | XA-000-09-004-020-011-011-02 | 37.7 | 1183.3 13:49:20:febtest:INFO: 10-03 | XA-000-09-004-020-011-010-02 | 37.7 | 1189.2 13:49:20:febtest:INFO: 12-05 | XA-000-09-004-020-005-012-11 | 40.9 | 1171.5 13:49:20:febtest:INFO: 14-07 | XA-000-09-004-020-008-011-12 | 50.4 | 1141.9 ############################################################ # S U M M A R Y # ############################################################ {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 25_04_15-13_48_34 OPERATOR : Alois Alzheimer SITE : KIT | SETUP : KIT_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 3145| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['2.450', '0.7976', '1.850', '1.3000', '0.000', '0.0000', '0.000', '0.0000'] VI_after__Init : ['2.450', '1.0350', '1.850', '1.1080', '0.000', '0.0000', '0.000', '0.0000'] VI_at__the_End : ['2.450', '1.0050', '1.850', '0.2703', '0.000', '0.0000', '0.000', '0.0000']