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FEB_3159 24.06.25 14:30:46
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14:30:46:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:30:46:ST3_Shared:INFO: FEB-Microcable
14:30:46:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:30:46:febtest:INFO: Testing FEB with SN 3159
14:30:48:smx_tester:INFO: Scanning setup
14:30:48:elinks:INFO: Disabling clock on downlink 0
14:30:48:elinks:INFO: Disabling clock on downlink 1
14:30:48:elinks:INFO: Disabling clock on downlink 2
14:30:48:elinks:INFO: Disabling clock on downlink 3
14:30:48:elinks:INFO: Disabling clock on downlink 4
14:30:48:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:30:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
14:30:48:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:30:48:elinks:INFO: Disabling clock on downlink 0
14:30:48:elinks:INFO: Disabling clock on downlink 1
14:30:48:elinks:INFO: Disabling clock on downlink 2
14:30:48:elinks:INFO: Disabling clock on downlink 3
14:30:48:elinks:INFO: Disabling clock on downlink 4
14:30:48:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:30:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:30:48:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
14:30:48:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
14:30:48:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
14:30:48:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
14:30:48:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
14:30:48:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
14:30:48:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
14:30:48:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
14:30:48:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
14:30:48:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
14:30:48:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
14:30:48:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
14:30:48:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
14:30:48:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
14:30:48:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
14:30:48:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
14:30:48:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:30:48:elinks:INFO: Disabling clock on downlink 0
14:30:48:elinks:INFO: Disabling clock on downlink 1
14:30:48:elinks:INFO: Disabling clock on downlink 2
14:30:48:elinks:INFO: Disabling clock on downlink 3
14:30:48:elinks:INFO: Disabling clock on downlink 4
14:30:48:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:30:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:30:48:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:30:48:elinks:INFO: Disabling clock on downlink 0
14:30:48:elinks:INFO: Disabling clock on downlink 1
14:30:48:elinks:INFO: Disabling clock on downlink 2
14:30:48:elinks:INFO: Disabling clock on downlink 3
14:30:48:elinks:INFO: Disabling clock on downlink 4
14:30:48:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:30:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
14:30:49:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:30:49:elinks:INFO: Disabling clock on downlink 0
14:30:49:elinks:INFO: Disabling clock on downlink 1
14:30:49:elinks:INFO: Disabling clock on downlink 2
14:30:49:elinks:INFO: Disabling clock on downlink 3
14:30:49:elinks:INFO: Disabling clock on downlink 4
14:30:49:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:30:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
14:30:49:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:30:49:setup_element:INFO: Scanning clock phase
14:30:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:30:49:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:30:49:setup_element:INFO: Clock phase scan results for group 0, downlink 1
14:30:49:setup_element:INFO: Eye window for uplink 0 : ___________________________________________________________________________XXXX_
Clock Delay: 36
14:30:49:setup_element:INFO: Eye window for uplink 1 : ___________________________________________________________________________XXXX_
Clock Delay: 36
14:30:49:setup_element:INFO: Eye window for uplink 2 : _________________________________________________________________________XXXXXXX
Clock Delay: 36
14:30:49:setup_element:INFO: Eye window for uplink 3 : _________________________________________________________________________XXXXXXX
Clock Delay: 36
14:30:49:setup_element:INFO: Eye window for uplink 4 : _________________________________________________________________________XXXXX__
Clock Delay: 35
14:30:49:setup_element:INFO: Eye window for uplink 5 : _________________________________________________________________________XXXXX__
Clock Delay: 35
14:30:49:setup_element:INFO: Eye window for uplink 6 : __________________________________________________________________________XXXXX_
Clock Delay: 36
14:30:49:setup_element:INFO: Eye window for uplink 7 : __________________________________________________________________________XXXXX_
Clock Delay: 36
14:30:49:setup_element:INFO: Eye window for uplink 8 : ________________________________________________________________________XXXXX___
Clock Delay: 34
14:30:49:setup_element:INFO: Eye window for uplink 9 : ________________________________________________________________________XXXXX___
Clock Delay: 34
14:30:49:setup_element:INFO: Eye window for uplink 10: _________________________________________________________________________XXXXX__
Clock Delay: 35
14:30:49:setup_element:INFO: Eye window for uplink 11: _________________________________________________________________________XXXXX__
Clock Delay: 35
14:30:49:setup_element:INFO: Eye window for uplink 12: _________________________________________________________________________XXXXXX_
Clock Delay: 35
14:30:49:setup_element:INFO: Eye window for uplink 13: _________________________________________________________________________XXXXXX_
Clock Delay: 35
14:30:49:setup_element:INFO: Eye window for uplink 14: ___________________________________________________________________________XXXXX
Clock Delay: 37
14:30:49:setup_element:INFO: Eye window for uplink 15: ___________________________________________________________________________XXXXX
Clock Delay: 37
14:30:49:setup_element:INFO: Setting the clock phase to 35 for group 0, downlink 1
14:30:49:setup_element:INFO: Scanning data phases
14:30:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:30:49:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:30:54:setup_element:INFO: Data phase scan results for group 0, downlink 1
14:30:54:setup_element:INFO: Eye window for uplink 0 : ____________XXXXX_______________________
Data delay found: 34
14:30:54:setup_element:INFO: Eye window for uplink 1 : __________XXXXX_________________________
Data delay found: 32
14:30:54:setup_element:INFO: Eye window for uplink 2 : _________XXXXX__________________________
Data delay found: 31
14:30:54:setup_element:INFO: Eye window for uplink 3 : ________XXXXX___________________________
Data delay found: 30
14:30:54:setup_element:INFO: Eye window for uplink 4 : _______XXXX_____________________________
Data delay found: 28
14:30:54:setup_element:INFO: Eye window for uplink 5 : ______XXXX______________________________
Data delay found: 27
14:30:54:setup_element:INFO: Eye window for uplink 6 : XXXX__________________________________XX
Data delay found: 20
14:30:54:setup_element:INFO: Eye window for uplink 7 : XX___________________________________XXX
Data delay found: 19
14:30:54:setup_element:INFO: Eye window for uplink 8 : ____________________XXXXXXXXXXXXXXX_____
Data delay found: 7
14:30:54:setup_element:INFO: Eye window for uplink 9 : ____________________________XXXXX_______
Data delay found: 10
14:30:54:setup_element:INFO: Eye window for uplink 10: ______________________________XXXXXX____
Data delay found: 12
14:30:54:setup_element:INFO: Eye window for uplink 11: _______________________________XXXXX____
Data delay found: 13
14:30:54:setup_element:INFO: Eye window for uplink 12: ______________________________XXXXX_____
Data delay found: 12
14:30:54:setup_element:INFO: Eye window for uplink 13: _______________________________XXXX_____
Data delay found: 12
14:30:54:setup_element:INFO: Eye window for uplink 14: _________________________________XXXXX__
Data delay found: 15
14:30:54:setup_element:INFO: Eye window for uplink 15: _________________________________XXXXXX_
Data delay found: 15
14:30:54:setup_element:INFO: Setting the data phase to 34 for uplink 0
14:30:54:setup_element:INFO: Setting the data phase to 32 for uplink 1
14:30:54:setup_element:INFO: Setting the data phase to 31 for uplink 2
14:30:54:setup_element:INFO: Setting the data phase to 30 for uplink 3
14:30:54:setup_element:INFO: Setting the data phase to 28 for uplink 4
14:30:54:setup_element:INFO: Setting the data phase to 27 for uplink 5
14:30:54:setup_element:INFO: Setting the data phase to 20 for uplink 6
14:30:54:setup_element:INFO: Setting the data phase to 19 for uplink 7
14:30:54:setup_element:INFO: Setting the data phase to 7 for uplink 8
14:30:54:setup_element:INFO: Setting the data phase to 10 for uplink 9
14:30:54:setup_element:INFO: Setting the data phase to 12 for uplink 10
14:30:54:setup_element:INFO: Setting the data phase to 13 for uplink 11
14:30:54:setup_element:INFO: Setting the data phase to 12 for uplink 12
14:30:54:setup_element:INFO: Setting the data phase to 12 for uplink 13
14:30:54:setup_element:INFO: Setting the data phase to 15 for uplink 14
14:30:54:setup_element:INFO: Setting the data phase to 15 for uplink 15
14:30:54:setup_element:INFO: Beginning SMX ASICs map scan
14:30:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:30:54:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:30:54:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
14:30:54:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
14:30:54:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
14:30:54:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
14:30:54:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
14:30:55:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
14:30:55:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
14:30:55:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
14:30:55:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
14:30:55:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
14:30:55:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
14:30:55:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
14:30:55:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
14:30:55:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
14:30:55:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
14:30:55:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
14:30:55:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
14:30:56:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
14:30:56:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
14:30:57:setup_element:INFO: Performing Elink synchronization
14:30:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:30:57:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:30:57:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
14:30:57:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
14:30:57:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
14:30:57:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
14:30:58:febtest:INFO: Init all SMX (CSA): 30
14:31:10:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:31:11:febtest:INFO: 01-00 | XA-000-09-004-019-015-007-14 | 34.6 | 1159.7
14:31:11:febtest:INFO: 08-01 | XA-000-09-004-019-015-009-14 | 37.7 | 1153.7
14:31:11:febtest:INFO: 03-02 | XA-000-09-004-019-018-009-05 | 34.6 | 1159.7
14:31:11:febtest:INFO: 10-03 | XA-000-09-004-019-006-007-15 | 31.4 | 1183.3
14:31:11:febtest:INFO: 05-04 | XA-000-09-004-019-003-007-04 | 28.2 | 1183.3
14:31:12:febtest:INFO: 12-05 | XA-000-09-004-019-009-007-11 | 31.4 | 1165.6
14:31:12:febtest:INFO: 07-06 | XA-000-09-004-019-012-007-00 | 31.4 | 1177.4
14:31:12:febtest:INFO: 14-07 | XA-000-09-004-019-006-025-08 | 34.6 | 1159.7
14:31:13:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
14:31:15:ST3_smx:INFO: chip: 1-0 34.556970 C 1171.483840 mV
14:31:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:31:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:31:15:ST3_smx:INFO: Electrons
14:31:15:ST3_smx:INFO: # loops 0
14:31:17:ST3_smx:INFO: # loops 1
14:31:18:ST3_smx:INFO: # loops 2
14:31:19:ST3_smx:INFO: Total # of broken channels: 0
14:31:19:ST3_smx:INFO: List of broken channels: []
14:31:19:ST3_smx:INFO: Total # of broken channels: 0
14:31:19:ST3_smx:INFO: List of broken channels: []
14:31:21:ST3_smx:INFO: chip: 8-1 37.726682 C 1165.571835 mV
14:31:21:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:31:21:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:31:21:ST3_smx:INFO: Electrons
14:31:21:ST3_smx:INFO: # loops 0
14:31:23:ST3_smx:INFO: # loops 1
14:31:24:ST3_smx:INFO: # loops 2
14:31:26:ST3_smx:INFO: Total # of broken channels: 0
14:31:26:ST3_smx:INFO: List of broken channels: []
14:31:26:ST3_smx:INFO: Total # of broken channels: 0
14:31:26:ST3_smx:INFO: List of broken channels: []
14:31:27:ST3_smx:INFO: chip: 3-2 34.556970 C 1171.483840 mV
14:31:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:31:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:31:27:ST3_smx:INFO: Electrons
14:31:27:ST3_smx:INFO: # loops 0
14:31:29:ST3_smx:INFO: # loops 1
14:31:30:ST3_smx:INFO: # loops 2
14:31:32:ST3_smx:INFO: Total # of broken channels: 0
14:31:32:ST3_smx:INFO: List of broken channels: []
14:31:32:ST3_smx:INFO: Total # of broken channels: 0
14:31:32:ST3_smx:INFO: List of broken channels: []
14:31:34:ST3_smx:INFO: chip: 10-3 31.389742 C 1195.082160 mV
14:31:34:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:31:34:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:31:34:ST3_smx:INFO: Electrons
14:31:34:ST3_smx:INFO: # loops 0
14:31:35:ST3_smx:INFO: # loops 1
14:31:36:ST3_smx:INFO: # loops 2
14:31:38:ST3_smx:INFO: Total # of broken channels: 0
14:31:38:ST3_smx:INFO: List of broken channels: []
14:31:38:ST3_smx:INFO: Total # of broken channels: 0
14:31:38:ST3_smx:INFO: List of broken channels: []
14:31:39:ST3_smx:INFO: chip: 5-4 28.225000 C 1195.082160 mV
14:31:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:31:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:31:39:ST3_smx:INFO: Electrons
14:31:39:ST3_smx:INFO: # loops 0
14:31:41:ST3_smx:INFO: # loops 1
14:31:42:ST3_smx:INFO: # loops 2
14:31:44:ST3_smx:INFO: Total # of broken channels: 0
14:31:44:ST3_smx:INFO: List of broken channels: []
14:31:44:ST3_smx:INFO: Total # of broken channels: 0
14:31:44:ST3_smx:INFO: List of broken channels: []
14:31:46:ST3_smx:INFO: chip: 12-5 34.556970 C 1177.390875 mV
14:31:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:31:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:31:46:ST3_smx:INFO: Electrons
14:31:46:ST3_smx:INFO: # loops 0
14:31:47:ST3_smx:INFO: # loops 1
14:31:49:ST3_smx:INFO: # loops 2
14:31:50:ST3_smx:INFO: Total # of broken channels: 0
14:31:50:ST3_smx:INFO: List of broken channels: []
14:31:50:ST3_smx:INFO: Total # of broken channels: 1
14:31:50:ST3_smx:INFO: List of broken channels: [104]
14:31:52:ST3_smx:INFO: chip: 7-6 31.389742 C 1189.190035 mV
14:31:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:31:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:31:52:ST3_smx:INFO: Electrons
14:31:52:ST3_smx:INFO: # loops 0
14:31:53:ST3_smx:INFO: # loops 1
14:31:55:ST3_smx:INFO: # loops 2
14:31:56:ST3_smx:INFO: Total # of broken channels: 0
14:31:56:ST3_smx:INFO: List of broken channels: []
14:31:56:ST3_smx:INFO: Total # of broken channels: 0
14:31:56:ST3_smx:INFO: List of broken channels: []
14:31:58:ST3_smx:INFO: chip: 14-7 37.726682 C 1171.483840 mV
14:31:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:31:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:31:58:ST3_smx:INFO: Electrons
14:31:58:ST3_smx:INFO: # loops 0
14:31:59:ST3_smx:INFO: # loops 1
14:32:01:ST3_smx:INFO: # loops 2
14:32:02:ST3_smx:INFO: Total # of broken channels: 0
14:32:02:ST3_smx:INFO: List of broken channels: []
14:32:02:ST3_smx:INFO: Total # of broken channels: 0
14:32:02:ST3_smx:INFO: List of broken channels: []
14:32:03:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:32:03:febtest:INFO: 01-00 | XA-000-09-004-019-015-007-14 | 37.7 | 1189.2
14:32:03:febtest:INFO: 08-01 | XA-000-09-004-019-015-009-14 | 37.7 | 1183.3
14:32:03:febtest:INFO: 03-02 | XA-000-09-004-019-018-009-05 | 37.7 | 1195.1
14:32:03:febtest:INFO: 10-03 | XA-000-09-004-019-006-007-15 | 31.4 | 1212.7
14:32:04:febtest:INFO: 05-04 | XA-000-09-004-019-003-007-04 | 31.4 | 1218.6
14:32:04:febtest:INFO: 12-05 | XA-000-09-004-019-009-007-11 | 34.6 | 1195.1
14:32:04:febtest:INFO: 07-06 | XA-000-09-004-019-012-007-00 | 34.6 | 1206.9
14:32:04:febtest:INFO: 14-07 | XA-000-09-004-019-006-025-08 | 37.7 | 1189.2
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_06_24-14_30_46
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3159| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.9120', '1.850', '2.9050', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9760', '1.850', '2.4630', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9470', '1.850', '0.5162', '0.000', '0.0000', '0.000', '0.0000']