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FEB_3171 02.07.25 07:23:39
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07:23:39:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:23:39:ST3_Shared:INFO: FEB-Microcable
07:23:39:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:23:39:febtest:INFO: Testing FEB with SN 3171
07:23:40:smx_tester:INFO: Scanning setup
07:23:40:elinks:INFO: Disabling clock on downlink 0
07:23:40:elinks:INFO: Disabling clock on downlink 1
07:23:40:elinks:INFO: Disabling clock on downlink 2
07:23:40:elinks:INFO: Disabling clock on downlink 3
07:23:40:elinks:INFO: Disabling clock on downlink 4
07:23:40:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:23:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
07:23:40:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:23:40:elinks:INFO: Disabling clock on downlink 0
07:23:40:elinks:INFO: Disabling clock on downlink 1
07:23:40:elinks:INFO: Disabling clock on downlink 2
07:23:40:elinks:INFO: Disabling clock on downlink 3
07:23:40:elinks:INFO: Disabling clock on downlink 4
07:23:40:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:23:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:23:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
07:23:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
07:23:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
07:23:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
07:23:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
07:23:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
07:23:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
07:23:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
07:23:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
07:23:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
07:23:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
07:23:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
07:23:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
07:23:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
07:23:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
07:23:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
07:23:40:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:23:40:elinks:INFO: Disabling clock on downlink 0
07:23:40:elinks:INFO: Disabling clock on downlink 1
07:23:40:elinks:INFO: Disabling clock on downlink 2
07:23:40:elinks:INFO: Disabling clock on downlink 3
07:23:40:elinks:INFO: Disabling clock on downlink 4
07:23:40:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:23:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:23:41:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:23:41:elinks:INFO: Disabling clock on downlink 0
07:23:41:elinks:INFO: Disabling clock on downlink 1
07:23:41:elinks:INFO: Disabling clock on downlink 2
07:23:41:elinks:INFO: Disabling clock on downlink 3
07:23:41:elinks:INFO: Disabling clock on downlink 4
07:23:41:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:23:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
07:23:41:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:23:41:elinks:INFO: Disabling clock on downlink 0
07:23:41:elinks:INFO: Disabling clock on downlink 1
07:23:41:elinks:INFO: Disabling clock on downlink 2
07:23:41:elinks:INFO: Disabling clock on downlink 3
07:23:41:elinks:INFO: Disabling clock on downlink 4
07:23:41:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:23:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
07:23:41:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:23:41:setup_element:INFO: Scanning clock phase
07:23:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:23:41:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:23:41:setup_element:INFO: Clock phase scan results for group 0, downlink 1
07:23:41:setup_element:INFO: Eye window for uplink 0 : _________________________________________________________________________XXXXX__
Clock Delay: 35
07:23:41:setup_element:INFO: Eye window for uplink 1 : _________________________________________________________________________XXXXX__
Clock Delay: 35
07:23:41:setup_element:INFO: Eye window for uplink 2 : _________________________________________________________________________XXXXX__
Clock Delay: 35
07:23:41:setup_element:INFO: Eye window for uplink 3 : _________________________________________________________________________XXXXX__
Clock Delay: 35
07:23:41:setup_element:INFO: Eye window for uplink 4 : __________________________________________________________________________XXXX__
Clock Delay: 35
07:23:41:setup_element:INFO: Eye window for uplink 5 : __________________________________________________________________________XXXX__
Clock Delay: 35
07:23:41:setup_element:INFO: Eye window for uplink 6 : ___________________________________________________________________________XXXX_
Clock Delay: 36
07:23:41:setup_element:INFO: Eye window for uplink 7 : ___________________________________________________________________________XXXX_
Clock Delay: 36
07:23:41:setup_element:INFO: Eye window for uplink 8 : ________________________________________________________________________XXXXX___
Clock Delay: 34
07:23:41:setup_element:INFO: Eye window for uplink 9 : ________________________________________________________________________XXXXX___
Clock Delay: 34
07:23:41:setup_element:INFO: Eye window for uplink 10: ________________________________________________________________________XXXXXX__
Clock Delay: 34
07:23:41:setup_element:INFO: Eye window for uplink 11: ________________________________________________________________________XXXXXX__
Clock Delay: 34
07:23:41:setup_element:INFO: Eye window for uplink 12: _________________________________________________________________________XXXXXX_
Clock Delay: 35
07:23:41:setup_element:INFO: Eye window for uplink 13: _________________________________________________________________________XXXXXX_
Clock Delay: 35
07:23:41:setup_element:INFO: Eye window for uplink 14: _________________________________________________________________________XXXX___
Clock Delay: 34
07:23:41:setup_element:INFO: Eye window for uplink 15: _________________________________________________________________________XXXX___
Clock Delay: 34
07:23:41:setup_element:INFO: Setting the clock phase to 35 for group 0, downlink 1
07:23:41:setup_element:INFO: Scanning data phases
07:23:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:23:41:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:23:46:setup_element:INFO: Data phase scan results for group 0, downlink 1
07:23:46:setup_element:INFO: Eye window for uplink 0 : _________XXXXX__________________________
Data delay found: 31
07:23:46:setup_element:INFO: Eye window for uplink 1 : _______XXXXXX___________________________
Data delay found: 29
07:23:46:setup_element:INFO: Eye window for uplink 2 : _______XXXXX____________________________
Data delay found: 29
07:23:46:setup_element:INFO: Eye window for uplink 3 : ______XXXXX_____________________________
Data delay found: 28
07:23:46:setup_element:INFO: Eye window for uplink 4 : _____XXXXX______________________________
Data delay found: 27
07:23:46:setup_element:INFO: Eye window for uplink 5 : ____XXXXX_______________________________
Data delay found: 26
07:23:46:setup_element:INFO: Eye window for uplink 6 : __XXXXX_________________________________
Data delay found: 24
07:23:46:setup_element:INFO: Eye window for uplink 7 : XXXXX__________________________________X
Data delay found: 21
07:23:46:setup_element:INFO: Eye window for uplink 8 : _____________________XXXXXXXXXXXXXXXX___
Data delay found: 8
07:23:46:setup_element:INFO: Eye window for uplink 9 : _____________________________XXXXXX_____
Data delay found: 11
07:23:46:setup_element:INFO: Eye window for uplink 10: ______________________________XXXXX_____
Data delay found: 12
07:23:46:setup_element:INFO: Eye window for uplink 11: _______________________________XXXXX____
Data delay found: 13
07:23:46:setup_element:INFO: Eye window for uplink 12: ______________________________XXXXX_____
Data delay found: 12
07:23:46:setup_element:INFO: Eye window for uplink 13: _______________________________XXXXX____
Data delay found: 13
07:23:46:setup_element:INFO: Eye window for uplink 14: ______________________________XXXXX_____
Data delay found: 12
07:23:46:setup_element:INFO: Eye window for uplink 15: ______________________________XXXXXX____
Data delay found: 12
07:23:46:setup_element:INFO: Setting the data phase to 31 for uplink 0
07:23:46:setup_element:INFO: Setting the data phase to 29 for uplink 1
07:23:46:setup_element:INFO: Setting the data phase to 29 for uplink 2
07:23:46:setup_element:INFO: Setting the data phase to 28 for uplink 3
07:23:46:setup_element:INFO: Setting the data phase to 27 for uplink 4
07:23:46:setup_element:INFO: Setting the data phase to 26 for uplink 5
07:23:46:setup_element:INFO: Setting the data phase to 24 for uplink 6
07:23:46:setup_element:INFO: Setting the data phase to 21 for uplink 7
07:23:46:setup_element:INFO: Setting the data phase to 8 for uplink 8
07:23:46:setup_element:INFO: Setting the data phase to 11 for uplink 9
07:23:46:setup_element:INFO: Setting the data phase to 12 for uplink 10
07:23:46:setup_element:INFO: Setting the data phase to 13 for uplink 11
07:23:46:setup_element:INFO: Setting the data phase to 12 for uplink 12
07:23:46:setup_element:INFO: Setting the data phase to 13 for uplink 13
07:23:46:setup_element:INFO: Setting the data phase to 12 for uplink 14
07:23:46:setup_element:INFO: Setting the data phase to 12 for uplink 15
07:23:46:setup_element:INFO: Beginning SMX ASICs map scan
07:23:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:23:46:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:23:46:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
07:23:46:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
07:23:46:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
07:23:46:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
07:23:46:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
07:23:47:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
07:23:47:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
07:23:47:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
07:23:47:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
07:23:47:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
07:23:47:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
07:23:47:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
07:23:47:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
07:23:47:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
07:23:47:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
07:23:48:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
07:23:48:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
07:23:48:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
07:23:48:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
07:23:49:setup_element:INFO: Performing Elink synchronization
07:23:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:23:49:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:23:49:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
07:23:49:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
07:23:49:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
07:23:49:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
07:23:50:febtest:INFO: Init all SMX (CSA): 30
07:24:06:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:24:06:febtest:INFO: 01-00 | XA-000-09-004-019-009-021-12 | 40.9 | 1165.6
07:24:06:febtest:INFO: 08-01 | XA-000-09-004-019-011-023-15 | 31.4 | 1189.2
07:24:06:febtest:INFO: 03-02 | XA-000-09-004-019-006-021-08 | 40.9 | 1159.7
07:24:06:febtest:INFO: 10-03 | XA-000-09-004-019-008-023-01 | 40.9 | 1171.5
07:24:07:febtest:INFO: 05-04 | XA-000-09-004-019-011-022-15 | 40.9 | 1165.6
07:24:07:febtest:INFO: 12-05 | XA-000-09-004-019-005-022-06 | 44.1 | 1159.7
07:24:07:febtest:INFO: 07-06 | XA-000-09-004-019-017-022-12 | 25.1 | 1212.7
07:24:07:febtest:INFO: 14-07 | XA-000-09-004-019-005-021-06 | 40.9 | 1159.7
07:24:08:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
07:24:10:ST3_smx:INFO: chip: 1-0 40.898880 C 1177.390875 mV
07:24:10:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:24:10:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:24:10:ST3_smx:INFO: Electrons
07:24:10:ST3_smx:INFO: # loops 0
07:24:12:ST3_smx:INFO: # loops 1
07:24:14:ST3_smx:INFO: # loops 2
07:24:16:ST3_smx:INFO: Total # of broken channels: 0
07:24:16:ST3_smx:INFO: List of broken channels: []
07:24:16:ST3_smx:INFO: Total # of broken channels: 0
07:24:16:ST3_smx:INFO: List of broken channels: []
07:24:18:ST3_smx:INFO: chip: 8-1 31.389742 C 1206.851500 mV
07:24:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:24:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:24:18:ST3_smx:INFO: Electrons
07:24:18:ST3_smx:INFO: # loops 0
07:24:20:ST3_smx:INFO: # loops 1
07:24:21:ST3_smx:INFO: # loops 2
07:24:23:ST3_smx:INFO: Total # of broken channels: 0
07:24:23:ST3_smx:INFO: List of broken channels: []
07:24:23:ST3_smx:INFO: Total # of broken channels: 0
07:24:23:ST3_smx:INFO: List of broken channels: []
07:24:25:ST3_smx:INFO: chip: 3-2 40.898880 C 1171.483840 mV
07:24:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:24:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:24:25:ST3_smx:INFO: Electrons
07:24:25:ST3_smx:INFO: # loops 0
07:24:27:ST3_smx:INFO: # loops 1
07:24:28:ST3_smx:INFO: # loops 2
07:24:30:ST3_smx:INFO: Total # of broken channels: 0
07:24:30:ST3_smx:INFO: List of broken channels: []
07:24:30:ST3_smx:INFO: Total # of broken channels: 0
07:24:30:ST3_smx:INFO: List of broken channels: []
07:24:32:ST3_smx:INFO: chip: 10-3 40.898880 C 1189.190035 mV
07:24:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:24:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:24:32:ST3_smx:INFO: Electrons
07:24:32:ST3_smx:INFO: # loops 0
07:24:34:ST3_smx:INFO: # loops 1
07:24:35:ST3_smx:INFO: # loops 2
07:24:37:ST3_smx:INFO: Total # of broken channels: 0
07:24:37:ST3_smx:INFO: List of broken channels: []
07:24:37:ST3_smx:INFO: Total # of broken channels: 0
07:24:37:ST3_smx:INFO: List of broken channels: []
07:24:39:ST3_smx:INFO: chip: 5-4 40.898880 C 1177.390875 mV
07:24:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:24:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:24:39:ST3_smx:INFO: Electrons
07:24:39:ST3_smx:INFO: # loops 0
07:24:41:ST3_smx:INFO: # loops 1
07:24:43:ST3_smx:INFO: # loops 2
07:24:44:ST3_smx:INFO: Total # of broken channels: 0
07:24:44:ST3_smx:INFO: List of broken channels: []
07:24:44:ST3_smx:INFO: Total # of broken channels: 0
07:24:44:ST3_smx:INFO: List of broken channels: []
07:24:46:ST3_smx:INFO: chip: 12-5 47.250730 C 1177.390875 mV
07:24:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:24:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:24:46:ST3_smx:INFO: Electrons
07:24:46:ST3_smx:INFO: # loops 0
07:24:48:ST3_smx:INFO: # loops 1
07:24:50:ST3_smx:INFO: # loops 2
07:24:51:ST3_smx:INFO: Total # of broken channels: 0
07:24:51:ST3_smx:INFO: List of broken channels: []
07:24:51:ST3_smx:INFO: Total # of broken channels: 0
07:24:51:ST3_smx:INFO: List of broken channels: []
07:24:53:ST3_smx:INFO: chip: 7-6 28.225000 C 1224.468235 mV
07:24:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:24:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:24:53:ST3_smx:INFO: Electrons
07:24:53:ST3_smx:INFO: # loops 0
07:24:55:ST3_smx:INFO: # loops 1
07:24:57:ST3_smx:INFO: # loops 2
07:24:58:ST3_smx:INFO: Total # of broken channels: 0
07:24:58:ST3_smx:INFO: List of broken channels: []
07:24:58:ST3_smx:INFO: Total # of broken channels: 0
07:24:58:ST3_smx:INFO: List of broken channels: []
07:25:00:ST3_smx:INFO: chip: 14-7 40.898880 C 1177.390875 mV
07:25:00:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:25:00:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:25:00:ST3_smx:INFO: Electrons
07:25:00:ST3_smx:INFO: # loops 0
07:25:02:ST3_smx:INFO: # loops 1
07:25:04:ST3_smx:INFO: # loops 2
07:25:05:ST3_smx:INFO: Total # of broken channels: 0
07:25:05:ST3_smx:INFO: List of broken channels: []
07:25:05:ST3_smx:INFO: Total # of broken channels: 0
07:25:05:ST3_smx:INFO: List of broken channels: []
07:25:06:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:25:06:febtest:INFO: 01-00 | XA-000-09-004-019-009-021-12 | 44.1 | 1195.1
07:25:06:febtest:INFO: 08-01 | XA-000-09-004-019-011-023-15 | 34.6 | 1224.5
07:25:06:febtest:INFO: 03-02 | XA-000-09-004-019-006-021-08 | 40.9 | 1195.1
07:25:07:febtest:INFO: 10-03 | XA-000-09-004-019-008-023-01 | 40.9 | 1230.3
07:25:07:febtest:INFO: 05-04 | XA-000-09-004-019-011-022-15 | 44.1 | 1201.0
07:25:07:febtest:INFO: 12-05 | XA-000-09-004-019-005-022-06 | 47.3 | 1206.9
07:25:07:febtest:INFO: 07-06 | XA-000-09-004-019-017-022-12 | 28.2 | 1242.0
07:25:07:febtest:INFO: 14-07 | XA-000-09-004-019-005-021-06 | 44.1 | 1195.1
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_07_02-07_23_39
OPERATOR : Benjamin;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
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| FEB_SN : 3171| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.4400', '1.850', '2.4890', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0330', '1.850', '2.5040', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9840', '1.850', '0.5235', '0.000', '0.0000', '0.000', '0.0000']