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FEB_3173 04.06.25 14:45:08
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14:45:08:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:45:08:ST3_Shared:INFO: FEB-Microcable
14:45:08:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:45:08:febtest:INFO: Testing FEB with SN 3177
14:45:09:smx_tester:INFO: Scanning setup
14:45:09:elinks:INFO: Disabling clock on downlink 0
14:45:09:elinks:INFO: Disabling clock on downlink 1
14:45:09:elinks:INFO: Disabling clock on downlink 2
14:45:09:elinks:INFO: Disabling clock on downlink 3
14:45:09:elinks:INFO: Disabling clock on downlink 4
14:45:09:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:45:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
14:45:09:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:45:09:elinks:INFO: Disabling clock on downlink 0
14:45:09:elinks:INFO: Disabling clock on downlink 1
14:45:09:elinks:INFO: Disabling clock on downlink 2
14:45:09:elinks:INFO: Disabling clock on downlink 3
14:45:09:elinks:INFO: Disabling clock on downlink 4
14:45:09:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:45:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:45:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
14:45:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
14:45:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
14:45:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
14:45:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
14:45:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
14:45:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
14:45:09:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
14:45:09:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:45:09:elinks:INFO: Disabling clock on downlink 0
14:45:09:elinks:INFO: Disabling clock on downlink 1
14:45:10:elinks:INFO: Disabling clock on downlink 2
14:45:10:elinks:INFO: Disabling clock on downlink 3
14:45:10:elinks:INFO: Disabling clock on downlink 4
14:45:10:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:45:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:45:10:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:45:10:elinks:INFO: Disabling clock on downlink 0
14:45:10:elinks:INFO: Disabling clock on downlink 1
14:45:10:elinks:INFO: Disabling clock on downlink 2
14:45:10:elinks:INFO: Disabling clock on downlink 3
14:45:10:elinks:INFO: Disabling clock on downlink 4
14:45:10:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:45:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
14:45:10:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:45:10:elinks:INFO: Disabling clock on downlink 0
14:45:10:elinks:INFO: Disabling clock on downlink 1
14:45:10:elinks:INFO: Disabling clock on downlink 2
14:45:10:elinks:INFO: Disabling clock on downlink 3
14:45:10:elinks:INFO: Disabling clock on downlink 4
14:45:10:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:45:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
14:45:10:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:45:10:setup_element:INFO: Scanning clock phase
14:45:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:45:10:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:45:10:setup_element:INFO: Clock phase scan results for group 0, downlink 1
14:45:10:setup_element:INFO: Eye window for uplink 8 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
14:45:10:setup_element:INFO: Eye window for uplink 9 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
14:45:10:setup_element:INFO: Eye window for uplink 10: ________________________________________________________________________________
Clock Delay: 40
14:45:10:setup_element:INFO: Eye window for uplink 11: ________________________________________________________________________________
Clock Delay: 40
14:45:10:setup_element:INFO: Eye window for uplink 12: _________________________________________________________________________XXXXX__
Clock Delay: 35
14:45:10:setup_element:INFO: Eye window for uplink 13: _________________________________________________________________________XXXXX__
Clock Delay: 35
14:45:10:setup_element:INFO: Eye window for uplink 14: ________________________________________________________________________XXXXX___
Clock Delay: 34
14:45:10:setup_element:INFO: Eye window for uplink 15: ________________________________________________________________________XXXXX___
Clock Delay: 34
14:45:10:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 1
14:45:10:setup_element:INFO: Scanning data phases
14:45:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:45:10:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:45:15:setup_element:INFO: Data phase scan results for group 0, downlink 1
14:45:15:setup_element:INFO: Eye window for uplink 8 : ______________________XXXXXXXXXXXXXXX___
Data delay found: 9
14:45:15:setup_element:INFO: Eye window for uplink 9 : ______________________________XXXXX_____
Data delay found: 12
14:45:15:setup_element:INFO: Eye window for uplink 10: ________________________________XXXXXX__
Data delay found: 14
14:45:15:setup_element:INFO: Eye window for uplink 11: _________________________________XXXXX__
Data delay found: 15
14:45:15:setup_element:INFO: Eye window for uplink 12: _________________________________XXXX___
Data delay found: 14
14:45:15:setup_element:INFO: Eye window for uplink 13: __________________________________XXXX__
Data delay found: 15
14:45:15:setup_element:INFO: Eye window for uplink 14: ________________________________XXXX____
Data delay found: 13
14:45:15:setup_element:INFO: Eye window for uplink 15: ________________________________XXXXX___
Data delay found: 14
14:45:15:setup_element:INFO: Setting the data phase to 9 for uplink 8
14:45:15:setup_element:INFO: Setting the data phase to 12 for uplink 9
14:45:15:setup_element:INFO: Setting the data phase to 14 for uplink 10
14:45:15:setup_element:INFO: Setting the data phase to 15 for uplink 11
14:45:15:setup_element:INFO: Setting the data phase to 14 for uplink 12
14:45:15:setup_element:INFO: Setting the data phase to 15 for uplink 13
14:45:15:setup_element:INFO: Setting the data phase to 13 for uplink 14
14:45:15:setup_element:INFO: Setting the data phase to 14 for uplink 15
14:45:15:setup_element:INFO: Beginning SMX ASICs map scan
14:45:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:45:15:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:45:15:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
14:45:15:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
14:45:15:uplink:INFO: Setting uplinks mask [8, 9, 10, 11, 12, 13, 14, 15]
14:45:16:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
14:45:16:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
14:45:16:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
14:45:16:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
14:45:16:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
14:45:16:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
14:45:17:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
14:45:17:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
14:45:18:setup_element:INFO: Performing Elink synchronization
14:45:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:45:18:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:45:18:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
14:45:18:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
14:45:18:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
14:45:18:uplink:INFO: Enabling uplinks [8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
14:45:18:febtest:INFO: Init all SMX (CSA): 30
14:45:25:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:45:26:febtest:INFO: 08-01 | XA-000-09-004-019-007-012-02 | 31.4 | 1177.4
14:45:26:febtest:INFO: 10-03 | XA-000-09-004-019-013-011-13 | 31.4 | 1171.5
14:45:26:febtest:INFO: 12-05 | XA-000-09-004-019-007-010-02 | 37.7 | 1153.7
14:45:26:febtest:INFO: 14-07 | XA-000-09-004-019-010-012-05 | 37.7 | 1159.7
14:45:27:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
14:45:29:ST3_smx:INFO: chip: 8-1 31.389742 C 1189.190035 mV
14:45:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:45:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:45:29:ST3_smx:INFO: Electrons
14:45:29:ST3_smx:INFO: # loops 0
14:45:31:ST3_smx:INFO: # loops 1
14:45:32:ST3_smx:INFO: # loops 2
14:45:34:ST3_smx:INFO: Total # of broken channels: 0
14:45:34:ST3_smx:INFO: List of broken channels: []
14:45:34:ST3_smx:INFO: Total # of broken channels: 0
14:45:34:ST3_smx:INFO: List of broken channels: []
14:45:35:ST3_smx:INFO: chip: 10-3 34.556970 C 1183.292940 mV
14:45:35:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:45:35:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:45:35:ST3_smx:INFO: Electrons
14:45:35:ST3_smx:INFO: # loops 0
14:45:37:ST3_smx:INFO: # loops 1
14:45:39:ST3_smx:INFO: # loops 2
14:45:40:ST3_smx:INFO: Total # of broken channels: 0
14:45:40:ST3_smx:INFO: List of broken channels: []
14:45:40:ST3_smx:INFO: Total # of broken channels: 0
14:45:40:ST3_smx:INFO: List of broken channels: []
14:45:42:ST3_smx:INFO: chip: 12-5 40.898880 C 1165.571835 mV
14:45:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:45:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:45:42:ST3_smx:INFO: Electrons
14:45:42:ST3_smx:INFO: # loops 0
14:45:43:ST3_smx:INFO: # loops 1
14:45:45:ST3_smx:INFO: # loops 2
14:45:47:ST3_smx:INFO: Total # of broken channels: 0
14:45:47:ST3_smx:INFO: List of broken channels: []
14:45:47:ST3_smx:INFO: Total # of broken channels: 0
14:45:47:ST3_smx:INFO: List of broken channels: []
14:45:48:ST3_smx:INFO: chip: 14-7 37.726682 C 1171.483840 mV
14:45:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:45:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:45:48:ST3_smx:INFO: Electrons
14:45:48:ST3_smx:INFO: # loops 0
14:45:50:ST3_smx:INFO: # loops 1
14:45:52:ST3_smx:INFO: # loops 2
14:45:53:ST3_smx:INFO: Total # of broken channels: 0
14:45:53:ST3_smx:INFO: List of broken channels: []
14:45:53:ST3_smx:INFO: Total # of broken channels: 0
14:45:53:ST3_smx:INFO: List of broken channels: []
14:45:54:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:45:54:febtest:INFO: 08-01 | XA-000-09-004-019-007-012-02 | 31.4 | 1206.9
14:45:54:febtest:INFO: 10-03 | XA-000-09-004-019-013-011-13 | 31.4 | 1206.9
14:45:54:febtest:INFO: 12-05 | XA-000-09-004-019-007-010-02 | 40.9 | 1183.3
14:45:54:febtest:INFO: 14-07 | XA-000-09-004-019-010-012-05 | 37.7 | 1183.3
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_06_04-14_45_08
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3177| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '0.7778', '1.851', '1.2410', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '0.9909', '1.850', '1.0660', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '0.9912', '1.850', '0.2704', '0.000', '0.0000', '0.000', '0.0000']
14:47:06:febtest:INFO: FEB type: 8.2
14:47:06:febtest:INFO: FEB SN: 3173