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FEB_3173 04.06.25 14:47:44
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14:47:44:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:47:44:ST3_Shared:INFO: FEB-Microcable
14:47:44:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:47:44:febtest:INFO: Testing FEB with SN 3173
14:47:45:smx_tester:INFO: Scanning setup
14:47:45:elinks:INFO: Disabling clock on downlink 0
14:47:45:elinks:INFO: Disabling clock on downlink 1
14:47:45:elinks:INFO: Disabling clock on downlink 2
14:47:45:elinks:INFO: Disabling clock on downlink 3
14:47:45:elinks:INFO: Disabling clock on downlink 4
14:47:45:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:47:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
14:47:45:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:47:45:elinks:INFO: Disabling clock on downlink 0
14:47:45:elinks:INFO: Disabling clock on downlink 1
14:47:45:elinks:INFO: Disabling clock on downlink 2
14:47:45:elinks:INFO: Disabling clock on downlink 3
14:47:45:elinks:INFO: Disabling clock on downlink 4
14:47:45:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:47:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:47:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
14:47:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
14:47:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
14:47:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
14:47:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
14:47:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
14:47:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
14:47:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
14:47:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
14:47:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
14:47:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
14:47:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
14:47:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
14:47:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
14:47:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
14:47:46:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
14:47:46:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:47:46:elinks:INFO: Disabling clock on downlink 0
14:47:46:elinks:INFO: Disabling clock on downlink 1
14:47:46:elinks:INFO: Disabling clock on downlink 2
14:47:46:elinks:INFO: Disabling clock on downlink 3
14:47:46:elinks:INFO: Disabling clock on downlink 4
14:47:46:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:47:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:47:46:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:47:46:elinks:INFO: Disabling clock on downlink 0
14:47:46:elinks:INFO: Disabling clock on downlink 1
14:47:46:elinks:INFO: Disabling clock on downlink 2
14:47:46:elinks:INFO: Disabling clock on downlink 3
14:47:46:elinks:INFO: Disabling clock on downlink 4
14:47:46:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:47:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
14:47:46:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:47:46:elinks:INFO: Disabling clock on downlink 0
14:47:46:elinks:INFO: Disabling clock on downlink 1
14:47:46:elinks:INFO: Disabling clock on downlink 2
14:47:46:elinks:INFO: Disabling clock on downlink 3
14:47:46:elinks:INFO: Disabling clock on downlink 4
14:47:46:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:47:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
14:47:46:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:47:46:setup_element:INFO: Scanning clock phase
14:47:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:47:46:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:47:46:setup_element:INFO: Clock phase scan results for group 0, downlink 1
14:47:46:setup_element:INFO: Eye window for uplink 0 : __________________________________________________________________________XXXXXX
Clock Delay: 36
14:47:46:setup_element:INFO: Eye window for uplink 1 : __________________________________________________________________________XXXXXX
Clock Delay: 36
14:47:46:setup_element:INFO: Eye window for uplink 2 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
14:47:46:setup_element:INFO: Eye window for uplink 3 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
14:47:46:setup_element:INFO: Eye window for uplink 4 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
14:47:46:setup_element:INFO: Eye window for uplink 5 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
14:47:46:setup_element:INFO: Eye window for uplink 6 : __________________________________________________________________________XXXX__
Clock Delay: 35
14:47:46:setup_element:INFO: Eye window for uplink 7 : __________________________________________________________________________XXXX__
Clock Delay: 35
14:47:46:setup_element:INFO: Eye window for uplink 8 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
14:47:46:setup_element:INFO: Eye window for uplink 9 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
14:47:46:setup_element:INFO: Eye window for uplink 10: _________________________________________________________________________XXXXX__
Clock Delay: 35
14:47:46:setup_element:INFO: Eye window for uplink 11: _________________________________________________________________________XXXXX__
Clock Delay: 35
14:47:46:setup_element:INFO: Eye window for uplink 12: _________________________________________________________________________XXXXXX_
Clock Delay: 35
14:47:46:setup_element:INFO: Eye window for uplink 13: _________________________________________________________________________XXXXXX_
Clock Delay: 35
14:47:46:setup_element:INFO: Eye window for uplink 14: __________________________________________________________________________XXXXX_
Clock Delay: 36
14:47:46:setup_element:INFO: Eye window for uplink 15: __________________________________________________________________________XXXXX_
Clock Delay: 36
14:47:46:setup_element:INFO: Setting the clock phase to 35 for group 0, downlink 1
14:47:46:setup_element:INFO: Scanning data phases
14:47:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:47:47:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:47:52:setup_element:INFO: Data phase scan results for group 0, downlink 1
14:47:52:setup_element:INFO: Eye window for uplink 0 : ___________XXXXX________________________
Data delay found: 33
14:47:52:setup_element:INFO: Eye window for uplink 1 : _________XXXXX__________________________
Data delay found: 31
14:47:52:setup_element:INFO: Eye window for uplink 2 : ______XXXXX_____________________________
Data delay found: 28
14:47:52:setup_element:INFO: Eye window for uplink 3 : _____XXXXX______________________________
Data delay found: 27
14:47:52:setup_element:INFO: Eye window for uplink 4 : ____XXXX________________________________
Data delay found: 25
14:47:52:setup_element:INFO: Eye window for uplink 5 : __XXXXX_________________________________
Data delay found: 24
14:47:52:setup_element:INFO: Eye window for uplink 6 : XX__________________________________XXXX
Data delay found: 18
14:47:52:setup_element:INFO: Eye window for uplink 7 : ___________________________________XXXX_
Data delay found: 16
14:47:52:setup_element:INFO: Eye window for uplink 8 : _______________________XXXXXXXXXXXXXX___
Data delay found: 9
14:47:52:setup_element:INFO: Eye window for uplink 9 : _____________________________XXXXXX_____
Data delay found: 11
14:47:52:setup_element:INFO: Eye window for uplink 10: ______________________________XXXXX_____
Data delay found: 12
14:47:52:setup_element:INFO: Eye window for uplink 11: _______________________________XXXXX____
Data delay found: 13
14:47:52:setup_element:INFO: Eye window for uplink 12: _____________________________XXXXX______
Data delay found: 11
14:47:52:setup_element:INFO: Eye window for uplink 13: ______________________________XXXXX_____
Data delay found: 12
14:47:52:setup_element:INFO: Eye window for uplink 14: _______________________________XXXXX____
Data delay found: 13
14:47:52:setup_element:INFO: Eye window for uplink 15: _______________________________XXXXXX___
Data delay found: 13
14:47:52:setup_element:INFO: Setting the data phase to 33 for uplink 0
14:47:52:setup_element:INFO: Setting the data phase to 31 for uplink 1
14:47:52:setup_element:INFO: Setting the data phase to 28 for uplink 2
14:47:52:setup_element:INFO: Setting the data phase to 27 for uplink 3
14:47:52:setup_element:INFO: Setting the data phase to 25 for uplink 4
14:47:52:setup_element:INFO: Setting the data phase to 24 for uplink 5
14:47:52:setup_element:INFO: Setting the data phase to 18 for uplink 6
14:47:52:setup_element:INFO: Setting the data phase to 16 for uplink 7
14:47:52:setup_element:INFO: Setting the data phase to 9 for uplink 8
14:47:52:setup_element:INFO: Setting the data phase to 11 for uplink 9
14:47:52:setup_element:INFO: Setting the data phase to 12 for uplink 10
14:47:52:setup_element:INFO: Setting the data phase to 13 for uplink 11
14:47:52:setup_element:INFO: Setting the data phase to 11 for uplink 12
14:47:52:setup_element:INFO: Setting the data phase to 12 for uplink 13
14:47:52:setup_element:INFO: Setting the data phase to 13 for uplink 14
14:47:52:setup_element:INFO: Setting the data phase to 13 for uplink 15
14:47:52:setup_element:INFO: Beginning SMX ASICs map scan
14:47:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:47:52:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:47:52:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
14:47:52:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
14:47:52:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
14:47:52:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
14:47:52:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
14:47:52:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
14:47:52:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
14:47:52:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
14:47:52:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
14:47:52:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
14:47:52:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
14:47:52:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
14:47:52:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
14:47:53:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
14:47:53:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
14:47:53:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
14:47:53:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
14:47:53:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
14:47:53:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
14:47:54:setup_element:INFO: Performing Elink synchronization
14:47:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:47:54:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:47:54:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
14:47:54:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
14:47:54:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
14:47:54:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
14:47:55:febtest:INFO: Init all SMX (CSA): 30
14:48:10:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:48:10:febtest:INFO: 01-00 | XA-000-09-004-019-010-008-05 | 37.7 | 1147.8
14:48:10:febtest:INFO: 08-01 | XA-000-09-004-019-013-004-13 | 37.7 | 1159.7
14:48:10:febtest:INFO: 03-02 | XA-000-09-004-019-007-003-02 | 34.6 | 1165.6
14:48:11:febtest:INFO: 10-03 | XA-000-09-004-019-010-002-05 | 56.8 | 1100.2
14:48:11:febtest:INFO: 05-04 | XA-000-09-004-019-010-003-05 | 44.1 | 1135.9
14:48:11:febtest:INFO: 12-05 | XA-000-09-004-008-015-008-15 | 44.1 | 1141.9
14:48:11:febtest:INFO: 07-06 | XA-000-09-004-019-013-003-13 | 37.7 | 1147.8
14:48:11:febtest:INFO: 14-07 | XA-000-09-004-008-015-007-15 | 28.2 | 1189.2
14:48:12:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
14:48:14:ST3_smx:INFO: chip: 1-0 37.726682 C 1159.654860 mV
14:48:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:48:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:48:14:ST3_smx:INFO: Electrons
14:48:14:ST3_smx:INFO: # loops 0
14:48:16:ST3_smx:INFO: # loops 1
14:48:17:ST3_smx:INFO: # loops 2
14:48:19:ST3_smx:INFO: Total # of broken channels: 0
14:48:19:ST3_smx:INFO: List of broken channels: []
14:48:19:ST3_smx:INFO: Total # of broken channels: 0
14:48:19:ST3_smx:INFO: List of broken channels: []
14:48:21:ST3_smx:INFO: chip: 8-1 37.726682 C 1171.483840 mV
14:48:21:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:48:21:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:48:21:ST3_smx:INFO: Electrons
14:48:21:ST3_smx:INFO: # loops 0
14:48:22:ST3_smx:INFO: # loops 1
14:48:24:ST3_smx:INFO: # loops 2
14:48:26:ST3_smx:INFO: Total # of broken channels: 0
14:48:26:ST3_smx:INFO: List of broken channels: []
14:48:26:ST3_smx:INFO: Total # of broken channels: 0
14:48:26:ST3_smx:INFO: List of broken channels: []
14:48:27:ST3_smx:INFO: chip: 3-2 34.556970 C 1177.390875 mV
14:48:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:48:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:48:27:ST3_smx:INFO: Electrons
14:48:27:ST3_smx:INFO: # loops 0
14:48:29:ST3_smx:INFO: # loops 1
14:48:31:ST3_smx:INFO: # loops 2
14:48:32:ST3_smx:INFO: Total # of broken channels: 0
14:48:32:ST3_smx:INFO: List of broken channels: []
14:48:32:ST3_smx:INFO: Total # of broken channels: 0
14:48:32:ST3_smx:INFO: List of broken channels: []
14:48:34:ST3_smx:INFO: chip: 10-3 56.797143 C 1112.140140 mV
14:48:34:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:48:34:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:48:34:ST3_smx:INFO: Electrons
14:48:34:ST3_smx:INFO: # loops 0
14:48:36:ST3_smx:INFO: # loops 1
14:48:37:ST3_smx:INFO: # loops 2
14:48:39:ST3_smx:INFO: Total # of broken channels: 0
14:48:39:ST3_smx:INFO: List of broken channels: []
14:48:39:ST3_smx:INFO: Total # of broken channels: 0
14:48:39:ST3_smx:INFO: List of broken channels: []
14:48:41:ST3_smx:INFO: chip: 5-4 44.073563 C 1141.874115 mV
14:48:41:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:48:41:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:48:41:ST3_smx:INFO: Electrons
14:48:41:ST3_smx:INFO: # loops 0
14:48:42:ST3_smx:INFO: # loops 1
14:48:44:ST3_smx:INFO: # loops 2
14:48:46:ST3_smx:INFO: Total # of broken channels: 0
14:48:46:ST3_smx:INFO: List of broken channels: []
14:48:46:ST3_smx:INFO: Total # of broken channels: 0
14:48:46:ST3_smx:INFO: List of broken channels: []
14:48:47:ST3_smx:INFO: chip: 12-5 47.250730 C 1153.732915 mV
14:48:47:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:48:47:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:48:47:ST3_smx:INFO: Electrons
14:48:47:ST3_smx:INFO: # loops 0
14:48:49:ST3_smx:INFO: # loops 1
14:48:50:ST3_smx:INFO: # loops 2
14:48:52:ST3_smx:INFO: Total # of broken channels: 0
14:48:52:ST3_smx:INFO: List of broken channels: []
14:48:52:ST3_smx:INFO: Total # of broken channels: 0
14:48:52:ST3_smx:INFO: List of broken channels: []
14:48:53:ST3_smx:INFO: chip: 7-6 40.898880 C 1159.654860 mV
14:48:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:48:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:48:53:ST3_smx:INFO: Electrons
14:48:53:ST3_smx:INFO: # loops 0
14:48:55:ST3_smx:INFO: # loops 1
14:48:57:ST3_smx:INFO: # loops 2
14:48:59:ST3_smx:INFO: Total # of broken channels: 0
14:48:59:ST3_smx:INFO: List of broken channels: []
14:48:59:ST3_smx:INFO: Total # of broken channels: 0
14:48:59:ST3_smx:INFO: List of broken channels: []
14:49:00:ST3_smx:INFO: chip: 14-7 31.389742 C 1200.969315 mV
14:49:00:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:49:00:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:49:00:ST3_smx:INFO: Electrons
14:49:00:ST3_smx:INFO: # loops 0
14:49:02:ST3_smx:INFO: # loops 1
14:49:03:ST3_smx:INFO: # loops 2
14:49:05:ST3_smx:INFO: Total # of broken channels: 0
14:49:05:ST3_smx:INFO: List of broken channels: []
14:49:05:ST3_smx:INFO: Total # of broken channels: 0
14:49:05:ST3_smx:INFO: List of broken channels: []
14:49:05:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:49:05:febtest:INFO: 01-00 | XA-000-09-004-019-010-008-05 | 40.9 | 1177.4
14:49:05:febtest:INFO: 08-01 | XA-000-09-004-019-013-004-13 | 37.7 | 1195.1
14:49:06:febtest:INFO: 03-02 | XA-000-09-004-019-007-003-02 | 37.7 | 1195.1
14:49:06:febtest:INFO: 10-03 | XA-000-09-004-019-010-002-05 | 56.8 | 1135.9
14:49:06:febtest:INFO: 05-04 | XA-000-09-004-019-010-003-05 | 47.3 | 1165.6
14:49:06:febtest:INFO: 12-05 | XA-000-09-004-008-015-008-15 | 47.3 | 1171.5
14:49:06:febtest:INFO: 07-06 | XA-000-09-004-019-013-003-13 | 40.9 | 1183.3
14:49:07:febtest:INFO: 14-07 | XA-000-09-004-008-015-007-15 | 31.4 | 1218.6
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_06_04-14_47_44
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3173| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.9730', '1.850', '2.0430', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0030', '1.850', '2.4070', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9600', '1.850', '0.5148', '0.000', '0.0000', '0.000', '0.0000']