
FEB_3176 05.06.25 10:28:50
TextEdit.txt
10:28:50:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 10:28:50:ST3_Shared:INFO: FEB-Microcable 10:28:50:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 10:28:50:febtest:INFO: Testing FEB with SN 3176 10:28:52:smx_tester:INFO: Scanning setup 10:28:52:elinks:INFO: Disabling clock on downlink 0 10:28:52:elinks:INFO: Disabling clock on downlink 1 10:28:52:elinks:INFO: Disabling clock on downlink 2 10:28:52:elinks:INFO: Disabling clock on downlink 3 10:28:52:elinks:INFO: Disabling clock on downlink 4 10:28:52:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:28:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 10:28:52:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:28:52:elinks:INFO: Disabling clock on downlink 0 10:28:52:elinks:INFO: Disabling clock on downlink 1 10:28:52:elinks:INFO: Disabling clock on downlink 2 10:28:52:elinks:INFO: Disabling clock on downlink 3 10:28:52:elinks:INFO: Disabling clock on downlink 4 10:28:52:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:28:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 10:28:52:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0 10:28:52:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1 10:28:52:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2 10:28:52:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3 10:28:52:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4 10:28:52:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5 10:28:52:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6 10:28:52:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7 10:28:52:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8 10:28:52:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9 10:28:52:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10 10:28:52:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11 10:28:52:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12 10:28:52:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13 10:28:52:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14 10:28:52:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15 10:28:52:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:28:52:elinks:INFO: Disabling clock on downlink 0 10:28:52:elinks:INFO: Disabling clock on downlink 1 10:28:52:elinks:INFO: Disabling clock on downlink 2 10:28:52:elinks:INFO: Disabling clock on downlink 3 10:28:52:elinks:INFO: Disabling clock on downlink 4 10:28:52:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:28:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 10:28:52:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:28:52:elinks:INFO: Disabling clock on downlink 0 10:28:52:elinks:INFO: Disabling clock on downlink 1 10:28:52:elinks:INFO: Disabling clock on downlink 2 10:28:52:elinks:INFO: Disabling clock on downlink 3 10:28:52:elinks:INFO: Disabling clock on downlink 4 10:28:52:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:28:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 10:28:52:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:28:52:elinks:INFO: Disabling clock on downlink 0 10:28:52:elinks:INFO: Disabling clock on downlink 1 10:28:52:elinks:INFO: Disabling clock on downlink 2 10:28:52:elinks:INFO: Disabling clock on downlink 3 10:28:52:elinks:INFO: Disabling clock on downlink 4 10:28:52:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:28:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 10:28:52:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:28:52:setup_element:INFO: Scanning clock phase 10:28:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 10:28:53:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 10:28:53:setup_element:INFO: Clock phase scan results for group 0, downlink 1 10:28:53:setup_element:INFO: Eye window for uplink 0 : __________________________________________________________________________XXXXXX Clock Delay: 36 10:28:53:setup_element:INFO: Eye window for uplink 1 : __________________________________________________________________________XXXXXX Clock Delay: 36 10:28:53:setup_element:INFO: Eye window for uplink 2 : __________________________________________________________________________XXXXX_ Clock Delay: 36 10:28:53:setup_element:INFO: Eye window for uplink 3 : __________________________________________________________________________XXXXX_ Clock Delay: 36 10:28:53:setup_element:INFO: Eye window for uplink 4 : _________________________________________________________________________XXXXXX_ Clock Delay: 35 10:28:53:setup_element:INFO: Eye window for uplink 5 : _________________________________________________________________________XXXXXX_ Clock Delay: 35 10:28:53:setup_element:INFO: Eye window for uplink 6 : __________________________________________________________________________XXXXXX Clock Delay: 36 10:28:53:setup_element:INFO: Eye window for uplink 7 : __________________________________________________________________________XXXXXX Clock Delay: 36 10:28:53:setup_element:INFO: Eye window for uplink 8 : ________________________________________________________________________XXXXXX__ Clock Delay: 34 10:28:53:setup_element:INFO: Eye window for uplink 9 : ________________________________________________________________________XXXXXX__ Clock Delay: 34 10:28:53:setup_element:INFO: Eye window for uplink 10: _________________________________________________________________________XXXXX__ Clock Delay: 35 10:28:53:setup_element:INFO: Eye window for uplink 11: _________________________________________________________________________XXXXX__ Clock Delay: 35 10:28:53:setup_element:INFO: Eye window for uplink 12: _________________________________________________________________________XXXXXX_ Clock Delay: 35 10:28:53:setup_element:INFO: Eye window for uplink 13: _________________________________________________________________________XXXXXX_ Clock Delay: 35 10:28:53:setup_element:INFO: Eye window for uplink 14: __________________________________________________________________________XXXX__ Clock Delay: 35 10:28:53:setup_element:INFO: Eye window for uplink 15: __________________________________________________________________________XXXX__ Clock Delay: 35 10:28:53:setup_element:INFO: Setting the clock phase to 35 for group 0, downlink 1 10:28:53:setup_element:INFO: Scanning data phases 10:28:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 10:28:53:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 10:28:58:setup_element:INFO: Data phase scan results for group 0, downlink 1 10:28:58:setup_element:INFO: Eye window for uplink 0 : _____________XXXX_______________________ Data delay found: 34 10:28:58:setup_element:INFO: Eye window for uplink 1 : ___________XXXXX________________________ Data delay found: 33 10:28:58:setup_element:INFO: Eye window for uplink 2 : _________XXXXX__________________________ Data delay found: 31 10:28:58:setup_element:INFO: Eye window for uplink 3 : ________XXXX____________________________ Data delay found: 29 10:28:58:setup_element:INFO: Eye window for uplink 4 : ______XXXX______________________________ Data delay found: 27 10:28:58:setup_element:INFO: Eye window for uplink 5 : ____XXXXX_______________________________ Data delay found: 26 10:28:58:setup_element:INFO: Eye window for uplink 6 : XXXXX__________________________________X Data delay found: 21 10:28:58:setup_element:INFO: Eye window for uplink 7 : XXX__________________________________XXX Data delay found: 19 10:28:58:setup_element:INFO: Eye window for uplink 8 : _____________________XXXXXXXXXXXXXXXX___ Data delay found: 8 10:28:58:setup_element:INFO: Eye window for uplink 9 : ______________________________XXXXX_____ Data delay found: 12 10:28:58:setup_element:INFO: Eye window for uplink 10: ______________________________XXXXXX____ Data delay found: 12 10:28:58:setup_element:INFO: Eye window for uplink 11: ______________________________XXXXXX____ Data delay found: 12 10:28:58:setup_element:INFO: Eye window for uplink 12: ______________________________XXXX______ Data delay found: 11 10:28:58:setup_element:INFO: Eye window for uplink 13: _______________________________XXXX_____ Data delay found: 12 10:28:58:setup_element:INFO: Eye window for uplink 14: ________________________________XXXX____ Data delay found: 13 10:28:58:setup_element:INFO: Eye window for uplink 15: ________________________________XXXXX___ Data delay found: 14 10:28:58:setup_element:INFO: Setting the data phase to 34 for uplink 0 10:28:58:setup_element:INFO: Setting the data phase to 33 for uplink 1 10:28:58:setup_element:INFO: Setting the data phase to 31 for uplink 2 10:28:58:setup_element:INFO: Setting the data phase to 29 for uplink 3 10:28:58:setup_element:INFO: Setting the data phase to 27 for uplink 4 10:28:58:setup_element:INFO: Setting the data phase to 26 for uplink 5 10:28:58:setup_element:INFO: Setting the data phase to 21 for uplink 6 10:28:58:setup_element:INFO: Setting the data phase to 19 for uplink 7 10:28:58:setup_element:INFO: Setting the data phase to 8 for uplink 8 10:28:58:setup_element:INFO: Setting the data phase to 12 for uplink 9 10:28:58:setup_element:INFO: Setting the data phase to 12 for uplink 10 10:28:58:setup_element:INFO: Setting the data phase to 12 for uplink 11 10:28:58:setup_element:INFO: Setting the data phase to 11 for uplink 12 10:28:58:setup_element:INFO: Setting the data phase to 12 for uplink 13 10:28:58:setup_element:INFO: Setting the data phase to 13 for uplink 14 10:28:58:setup_element:INFO: Setting the data phase to 14 for uplink 15 10:28:58:setup_element:INFO: Beginning SMX ASICs map scan 10:28:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 10:28:58:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 10:28:58:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 10:28:58:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 10:28:58:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] 10:28:58:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1 10:28:58:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0 10:28:58:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8 10:28:58:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9 10:28:58:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3 10:28:58:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2 10:28:59:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10 10:28:59:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11 10:28:59:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5 10:28:59:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4 10:28:59:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12 10:28:59:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13 10:28:59:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7 10:28:59:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6 10:28:59:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14 10:28:59:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15 10:29:01:setup_element:INFO: Performing Elink synchronization 10:29:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 10:29:01:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 10:29:01:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 10:29:01:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 10:29:01:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1 10:29:01:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)] 1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)] 2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)] 3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)] 4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)] 5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)] 6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)] 7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)] |_________________________________________________________________________| 10:29:01:febtest:INFO: Init all SMX (CSA): 30 10:29:15:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 10:29:15:febtest:INFO: 01-00 | XA-000-09-004-008-003-007-05 | 28.2 | 1195.1 10:29:15:febtest:INFO: 08-01 | XA-000-09-004-008-006-005-14 | 31.4 | 1183.3 10:29:15:febtest:INFO: 03-02 | XA-000-09-004-008-009-005-10 | 31.4 | 1165.6 10:29:15:febtest:INFO: 10-03 | XA-000-09-004-008-006-004-14 | 47.3 | 1118.1 10:29:16:febtest:INFO: 05-04 | XA-000-09-004-008-012-005-01 | 37.7 | 1153.7 10:29:16:febtest:INFO: 12-05 | XA-000-09-004-008-009-004-10 | 34.6 | 1165.6 10:29:16:febtest:INFO: 07-06 | XA-000-09-004-008-015-005-15 | 31.4 | 1171.5 10:29:16:febtest:INFO: 14-07 | XA-000-09-004-008-009-002-10 | 31.4 | 1195.1 10:29:17:febtest:INFO: Set all CSA to ZERO FEB type: A FEB_A: 1 FEB_B: 0 10:29:19:ST3_smx:INFO: chip: 1-0 28.225000 C 1218.600960 mV 10:29:19:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:29:19:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:29:19:ST3_smx:INFO: Electrons 10:29:19:ST3_smx:INFO: # loops 0 10:29:21:ST3_smx:INFO: # loops 1 10:29:23:ST3_smx:INFO: # loops 2 10:29:24:ST3_smx:INFO: Total # of broken channels: 0 10:29:24:ST3_smx:INFO: List of broken channels: [] 10:29:24:ST3_smx:INFO: Total # of broken channels: 0 10:29:24:ST3_smx:INFO: List of broken channels: [] 10:29:26:ST3_smx:INFO: chip: 8-1 31.389742 C 1200.969315 mV 10:29:26:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:29:26:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:29:26:ST3_smx:INFO: Electrons 10:29:26:ST3_smx:INFO: # loops 0 10:29:28:ST3_smx:INFO: # loops 1 10:29:29:ST3_smx:INFO: # loops 2 10:29:31:ST3_smx:INFO: Total # of broken channels: 0 10:29:31:ST3_smx:INFO: List of broken channels: [] 10:29:31:ST3_smx:INFO: Total # of broken channels: 0 10:29:31:ST3_smx:INFO: List of broken channels: [] 10:29:32:ST3_smx:INFO: chip: 3-2 34.556970 C 1171.483840 mV 10:29:32:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:29:32:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:29:32:ST3_smx:INFO: Electrons 10:29:32:ST3_smx:INFO: # loops 0 10:29:34:ST3_smx:INFO: # loops 1 10:29:36:ST3_smx:INFO: # loops 2 10:29:38:ST3_smx:INFO: Total # of broken channels: 0 10:29:38:ST3_smx:INFO: List of broken channels: [] 10:29:38:ST3_smx:INFO: Total # of broken channels: 0 10:29:38:ST3_smx:INFO: List of broken channels: [] 10:29:39:ST3_smx:INFO: chip: 10-3 50.430383 C 1129.995435 mV 10:29:39:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:29:39:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:29:39:ST3_smx:INFO: Electrons 10:29:39:ST3_smx:INFO: # loops 0 10:29:41:ST3_smx:INFO: # loops 1 10:29:42:ST3_smx:INFO: # loops 2 10:29:44:ST3_smx:INFO: Total # of broken channels: 0 10:29:44:ST3_smx:INFO: List of broken channels: [] 10:29:44:ST3_smx:INFO: Total # of broken channels: 1 10:29:44:ST3_smx:INFO: List of broken channels: [9] 10:29:46:ST3_smx:INFO: chip: 5-4 37.726682 C 1165.571835 mV 10:29:46:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:29:46:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:29:46:ST3_smx:INFO: Electrons 10:29:46:ST3_smx:INFO: # loops 0 10:29:47:ST3_smx:INFO: # loops 1 10:29:49:ST3_smx:INFO: # loops 2 10:29:50:ST3_smx:INFO: Total # of broken channels: 0 10:29:50:ST3_smx:INFO: List of broken channels: [] 10:29:50:ST3_smx:INFO: Total # of broken channels: 0 10:29:50:ST3_smx:INFO: List of broken channels: [] 10:29:52:ST3_smx:INFO: chip: 12-5 34.556970 C 1183.292940 mV 10:29:52:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:29:52:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:29:52:ST3_smx:INFO: Electrons 10:29:52:ST3_smx:INFO: # loops 0 10:29:53:ST3_smx:INFO: # loops 1 10:29:55:ST3_smx:INFO: # loops 2 10:29:57:ST3_smx:INFO: Total # of broken channels: 0 10:29:57:ST3_smx:INFO: List of broken channels: [] 10:29:57:ST3_smx:INFO: Total # of broken channels: 0 10:29:57:ST3_smx:INFO: List of broken channels: [] 10:29:58:ST3_smx:INFO: chip: 7-6 31.389742 C 1183.292940 mV 10:29:58:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:29:58:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:29:58:ST3_smx:INFO: Electrons 10:29:58:ST3_smx:INFO: # loops 0 10:30:00:ST3_smx:INFO: # loops 1 10:30:01:ST3_smx:INFO: # loops 2 10:30:03:ST3_smx:INFO: Total # of broken channels: 0 10:30:03:ST3_smx:INFO: List of broken channels: [] 10:30:03:ST3_smx:INFO: Total # of broken channels: 0 10:30:03:ST3_smx:INFO: List of broken channels: [] 10:30:05:ST3_smx:INFO: chip: 14-7 34.556970 C 1247.887635 mV 10:30:05:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:30:05:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:30:05:ST3_smx:INFO: Electrons 10:30:05:ST3_smx:INFO: # loops 0 10:30:06:ST3_smx:INFO: # loops 1 10:30:08:ST3_smx:INFO: # loops 2 10:30:09:ST3_smx:INFO: Total # of broken channels: 0 10:30:09:ST3_smx:INFO: List of broken channels: [] 10:30:09:ST3_smx:INFO: Total # of broken channels: 0 10:30:09:ST3_smx:INFO: List of broken channels: [] 10:30:10:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 10:30:10:febtest:INFO: 01-00 | XA-000-09-004-008-003-007-05 | 28.2 | 1323.5 10:30:10:febtest:INFO: 08-01 | XA-000-09-004-008-006-005-14 | 31.4 | 1230.3 10:30:10:febtest:INFO: 03-02 | XA-000-09-004-008-009-005-10 | 34.6 | 1195.1 10:30:10:febtest:INFO: 10-03 | XA-000-09-004-008-006-004-14 | 50.4 | 1147.8 10:30:11:febtest:INFO: 05-04 | XA-000-09-004-008-012-005-01 | 40.9 | 1189.2 10:30:11:febtest:INFO: 12-05 | XA-000-09-004-008-009-004-10 | 37.7 | 1201.0 10:30:11:febtest:INFO: 07-06 | XA-000-09-004-008-015-005-15 | 34.6 | 1201.0 10:30:11:febtest:INFO: 14-07 | XA-000-09-004-008-009-002-10 | 31.4 | 1578.5 ############################################################ # S U M M A R Y # ############################################################ {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 25_06_05-10_28_50 OPERATOR : Benjamin; SITE : KIT | SETUP : KIT_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 3176| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['2.450', '1.4650', '1.852', '2.5840', '0.000', '0.0000', '0.000', '0.0000'] VI_after__Init : ['2.450', '1.9980', '1.850', '2.3020', '0.000', '0.0000', '0.000', '0.0000'] VI_at__the_End : ['2.450', '1.9690', '1.850', '0.5204', '0.000', '0.0000', '0.000', '0.0000']