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FEB_3178 12.06.25 07:06:55
Info
07:06:55:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:06:55:ST3_Shared:INFO: FEB-Microcable
07:06:55:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:06:55:febtest:INFO: Testing FEB with SN 3178
07:06:57:smx_tester:INFO: Scanning setup
07:06:57:elinks:INFO: Disabling clock on downlink 0
07:06:57:elinks:INFO: Disabling clock on downlink 1
07:06:57:elinks:INFO: Disabling clock on downlink 2
07:06:57:elinks:INFO: Disabling clock on downlink 3
07:06:57:elinks:INFO: Disabling clock on downlink 4
07:06:57:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:06:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
07:06:57:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:06:57:elinks:INFO: Disabling clock on downlink 0
07:06:57:elinks:INFO: Disabling clock on downlink 1
07:06:57:elinks:INFO: Disabling clock on downlink 2
07:06:57:elinks:INFO: Disabling clock on downlink 3
07:06:57:elinks:INFO: Disabling clock on downlink 4
07:06:57:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:06:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:06:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
07:06:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
07:06:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
07:06:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
07:06:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
07:06:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
07:06:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
07:06:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
07:06:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
07:06:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
07:06:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
07:06:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
07:06:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
07:06:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
07:06:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
07:06:57:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
07:06:57:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:06:57:elinks:INFO: Disabling clock on downlink 0
07:06:57:elinks:INFO: Disabling clock on downlink 1
07:06:57:elinks:INFO: Disabling clock on downlink 2
07:06:57:elinks:INFO: Disabling clock on downlink 3
07:06:57:elinks:INFO: Disabling clock on downlink 4
07:06:57:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:06:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:06:58:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:06:58:elinks:INFO: Disabling clock on downlink 0
07:06:58:elinks:INFO: Disabling clock on downlink 1
07:06:58:elinks:INFO: Disabling clock on downlink 2
07:06:58:elinks:INFO: Disabling clock on downlink 3
07:06:58:elinks:INFO: Disabling clock on downlink 4
07:06:58:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:06:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
07:06:58:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:06:58:elinks:INFO: Disabling clock on downlink 0
07:06:58:elinks:INFO: Disabling clock on downlink 1
07:06:58:elinks:INFO: Disabling clock on downlink 2
07:06:58:elinks:INFO: Disabling clock on downlink 3
07:06:58:elinks:INFO: Disabling clock on downlink 4
07:06:58:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:06:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
07:06:58:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:06:58:setup_element:INFO: Scanning clock phase
07:06:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:06:58:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:06:58:setup_element:INFO: Clock phase scan results for group 0, downlink 1
07:06:58:setup_element:INFO: Eye window for uplink 0 : __________________________________________________________________________XXXXXX
Clock Delay: 36
07:06:58:setup_element:INFO: Eye window for uplink 1 : __________________________________________________________________________XXXXXX
Clock Delay: 36
07:06:58:setup_element:INFO: Eye window for uplink 2 : _________________________________________________________________________XXXXX__
Clock Delay: 35
07:06:58:setup_element:INFO: Eye window for uplink 3 : _________________________________________________________________________XXXXX__
Clock Delay: 35
07:06:58:setup_element:INFO: Eye window for uplink 4 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
07:06:58:setup_element:INFO: Eye window for uplink 5 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
07:06:58:setup_element:INFO: Eye window for uplink 6 : __________________________________________________________________________XXXXX_
Clock Delay: 36
07:06:58:setup_element:INFO: Eye window for uplink 7 : __________________________________________________________________________XXXXX_
Clock Delay: 36
07:06:58:setup_element:INFO: Eye window for uplink 8 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
07:06:58:setup_element:INFO: Eye window for uplink 9 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
07:06:58:setup_element:INFO: Eye window for uplink 10: ________________________________________________________________________XXXXX___
Clock Delay: 34
07:06:58:setup_element:INFO: Eye window for uplink 11: ________________________________________________________________________XXXXX___
Clock Delay: 34
07:06:58:setup_element:INFO: Eye window for uplink 12: ________________________________________________________________________XXXXXX__
Clock Delay: 34
07:06:58:setup_element:INFO: Eye window for uplink 13: ________________________________________________________________________XXXXXX__
Clock Delay: 34
07:06:58:setup_element:INFO: Eye window for uplink 14: _________________________________________________________________________XXXXX__
Clock Delay: 35
07:06:58:setup_element:INFO: Eye window for uplink 15: _________________________________________________________________________XXXXX__
Clock Delay: 35
07:06:58:setup_element:INFO: Setting the clock phase to 35 for group 0, downlink 1
07:06:58:setup_element:INFO: Scanning data phases
07:06:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:06:58:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:07:03:setup_element:INFO: Data phase scan results for group 0, downlink 1
07:07:03:setup_element:INFO: Eye window for uplink 0 : ______________XXXXX_____________________
Data delay found: 36
07:07:03:setup_element:INFO: Eye window for uplink 1 : ____________XXXXX_______________________
Data delay found: 34
07:07:03:setup_element:INFO: Eye window for uplink 2 : ___________XXXXX________________________
Data delay found: 33
07:07:03:setup_element:INFO: Eye window for uplink 3 : __________XXXXX_________________________
Data delay found: 32
07:07:03:setup_element:INFO: Eye window for uplink 4 : ______XXXX______________________________
Data delay found: 27
07:07:03:setup_element:INFO: Eye window for uplink 5 : ____XXXX________________________________
Data delay found: 25
07:07:03:setup_element:INFO: Eye window for uplink 6 : _XXXX___________________________________
Data delay found: 22
07:07:03:setup_element:INFO: Eye window for uplink 7 : XXXX___________________________________X
Data delay found: 21
07:07:03:setup_element:INFO: Eye window for uplink 8 : _______________________XXXXXXXXXXXXXX___
Data delay found: 9
07:07:03:setup_element:INFO: Eye window for uplink 9 : _______________________________XXXXX____
Data delay found: 13
07:07:03:setup_element:INFO: Eye window for uplink 10: _______________________________XXXXX____
Data delay found: 13
07:07:03:setup_element:INFO: Eye window for uplink 11: ________________________________XXXX____
Data delay found: 13
07:07:03:setup_element:INFO: Eye window for uplink 12: _________________________________XXXXX__
Data delay found: 15
07:07:03:setup_element:INFO: Eye window for uplink 13: __________________________________XXXX__
Data delay found: 15
07:07:03:setup_element:INFO: Eye window for uplink 14: __________________________________XXX___
Data delay found: 15
07:07:03:setup_element:INFO: Eye window for uplink 15: __________________________________XXXXX_
Data delay found: 16
07:07:03:setup_element:INFO: Setting the data phase to 36 for uplink 0
07:07:03:setup_element:INFO: Setting the data phase to 34 for uplink 1
07:07:03:setup_element:INFO: Setting the data phase to 33 for uplink 2
07:07:03:setup_element:INFO: Setting the data phase to 32 for uplink 3
07:07:03:setup_element:INFO: Setting the data phase to 27 for uplink 4
07:07:03:setup_element:INFO: Setting the data phase to 25 for uplink 5
07:07:03:setup_element:INFO: Setting the data phase to 22 for uplink 6
07:07:03:setup_element:INFO: Setting the data phase to 21 for uplink 7
07:07:03:setup_element:INFO: Setting the data phase to 9 for uplink 8
07:07:03:setup_element:INFO: Setting the data phase to 13 for uplink 9
07:07:03:setup_element:INFO: Setting the data phase to 13 for uplink 10
07:07:03:setup_element:INFO: Setting the data phase to 13 for uplink 11
07:07:03:setup_element:INFO: Setting the data phase to 15 for uplink 12
07:07:03:setup_element:INFO: Setting the data phase to 15 for uplink 13
07:07:03:setup_element:INFO: Setting the data phase to 15 for uplink 14
07:07:03:setup_element:INFO: Setting the data phase to 16 for uplink 15
07:07:03:setup_element:INFO: Beginning SMX ASICs map scan
07:07:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:07:03:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:07:03:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
07:07:03:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
07:07:03:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
07:07:03:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
07:07:03:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
07:07:04:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
07:07:04:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
07:07:04:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
07:07:04:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
07:07:04:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
07:07:04:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
07:07:04:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
07:07:04:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
07:07:04:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
07:07:04:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
07:07:05:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
07:07:05:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
07:07:05:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
07:07:05:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
07:07:06:setup_element:INFO: Performing Elink synchronization
07:07:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:07:06:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:07:06:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
07:07:06:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
07:07:06:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
07:07:06:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
07:07:07:febtest:INFO: Init all SMX (CSA): 30
07:07:22:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:07:22:febtest:INFO: 01-00 | XA-000-09-004-019-016-014-06 | 34.6 | 1153.7
07:07:22:febtest:INFO: 08-01 | XA-000-09-004-019-010-013-05 | 44.1 | 1112.1
07:07:23:febtest:INFO: 03-02 | XA-000-09-004-019-007-013-02 | 34.6 | 1171.5
07:07:23:febtest:INFO: 10-03 | XA-000-09-004-019-013-013-13 | 28.2 | 1177.4
07:07:23:febtest:INFO: 05-04 | XA-000-09-004-019-016-015-06 | 25.1 | 1189.2
07:07:23:febtest:INFO: 12-05 | XA-000-09-004-019-004-011-12 | 21.9 | 1189.2
07:07:23:febtest:INFO: 07-06 | XA-000-09-004-019-016-013-06 | 18.7 | 1206.9
07:07:24:febtest:INFO: 14-07 | XA-000-09-004-019-007-011-02 | 37.7 | 1141.9
07:07:25:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
07:07:27:ST3_smx:INFO: chip: 1-0 34.556970 C 1159.654860 mV
07:07:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:07:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:07:27:ST3_smx:INFO: Electrons
07:07:27:ST3_smx:INFO: # loops 0
07:07:28:ST3_smx:INFO: # loops 1
07:07:30:ST3_smx:INFO: # loops 2
07:07:32:ST3_smx:INFO: Total # of broken channels: 0
07:07:32:ST3_smx:INFO: List of broken channels: []
07:07:32:ST3_smx:INFO: Total # of broken channels: 0
07:07:32:ST3_smx:INFO: List of broken channels: []
07:07:34:ST3_smx:INFO: chip: 8-1 44.073563 C 1124.048640 mV
07:07:34:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:07:34:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:07:34:ST3_smx:INFO: Electrons
07:07:34:ST3_smx:INFO: # loops 0
07:07:36:ST3_smx:INFO: # loops 1
07:07:38:ST3_smx:INFO: # loops 2
07:07:39:ST3_smx:INFO: Total # of broken channels: 0
07:07:39:ST3_smx:INFO: List of broken channels: []
07:07:39:ST3_smx:INFO: Total # of broken channels: 0
07:07:39:ST3_smx:INFO: List of broken channels: []
07:07:41:ST3_smx:INFO: chip: 3-2 34.556970 C 1177.390875 mV
07:07:41:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:07:41:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:07:41:ST3_smx:INFO: Electrons
07:07:41:ST3_smx:INFO: # loops 0
07:07:42:ST3_smx:INFO: # loops 1
07:07:44:ST3_smx:INFO: # loops 2
07:07:46:ST3_smx:INFO: Total # of broken channels: 0
07:07:46:ST3_smx:INFO: List of broken channels: []
07:07:46:ST3_smx:INFO: Total # of broken channels: 1
07:07:46:ST3_smx:INFO: List of broken channels: [55]
07:07:47:ST3_smx:INFO: chip: 10-3 31.389742 C 1189.190035 mV
07:07:47:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:07:47:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:07:47:ST3_smx:INFO: Electrons
07:07:47:ST3_smx:INFO: # loops 0
07:07:49:ST3_smx:INFO: # loops 1
07:07:50:ST3_smx:INFO: # loops 2
07:07:52:ST3_smx:INFO: Total # of broken channels: 0
07:07:52:ST3_smx:INFO: List of broken channels: []
07:07:52:ST3_smx:INFO: Total # of broken channels: 0
07:07:52:ST3_smx:INFO: List of broken channels: []
07:07:53:ST3_smx:INFO: chip: 5-4 28.225000 C 1195.082160 mV
07:07:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:07:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:07:53:ST3_smx:INFO: Electrons
07:07:53:ST3_smx:INFO: # loops 0
07:07:55:ST3_smx:INFO: # loops 1
07:07:57:ST3_smx:INFO: # loops 2
07:07:58:ST3_smx:INFO: Total # of broken channels: 0
07:07:58:ST3_smx:INFO: List of broken channels: []
07:07:58:ST3_smx:INFO: Total # of broken channels: 0
07:07:58:ST3_smx:INFO: List of broken channels: []
07:08:00:ST3_smx:INFO: chip: 12-5 25.062742 C 1200.969315 mV
07:08:00:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:08:00:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:08:00:ST3_smx:INFO: Electrons
07:08:00:ST3_smx:INFO: # loops 0
07:08:02:ST3_smx:INFO: # loops 1
07:08:03:ST3_smx:INFO: # loops 2
07:08:05:ST3_smx:INFO: Total # of broken channels: 0
07:08:05:ST3_smx:INFO: List of broken channels: []
07:08:05:ST3_smx:INFO: Total # of broken channels: 1
07:08:05:ST3_smx:INFO: List of broken channels: [21]
07:08:06:ST3_smx:INFO: chip: 7-6 21.902970 C 1218.600960 mV
07:08:06:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:08:06:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:08:06:ST3_smx:INFO: Electrons
07:08:06:ST3_smx:INFO: # loops 0
07:08:08:ST3_smx:INFO: # loops 1
07:08:10:ST3_smx:INFO: # loops 2
07:08:12:ST3_smx:INFO: Total # of broken channels: 0
07:08:12:ST3_smx:INFO: List of broken channels: []
07:08:12:ST3_smx:INFO: Total # of broken channels: 0
07:08:12:ST3_smx:INFO: List of broken channels: []
07:08:13:ST3_smx:INFO: chip: 14-7 40.898880 C 1153.732915 mV
07:08:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:08:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:08:13:ST3_smx:INFO: Electrons
07:08:13:ST3_smx:INFO: # loops 0
07:08:15:ST3_smx:INFO: # loops 1
07:08:16:ST3_smx:INFO: # loops 2
07:08:18:ST3_smx:INFO: Total # of broken channels: 0
07:08:18:ST3_smx:INFO: List of broken channels: []
07:08:18:ST3_smx:INFO: Total # of broken channels: 0
07:08:18:ST3_smx:INFO: List of broken channels: []
07:08:18:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:08:19:febtest:INFO: 01-00 | XA-000-09-004-019-016-014-06 | 37.7 | 1183.3
07:08:19:febtest:INFO: 08-01 | XA-000-09-004-019-010-013-05 | 47.3 | 1141.9
07:08:19:febtest:INFO: 03-02 | XA-000-09-004-019-007-013-02 | 34.6 | 1201.0
07:08:19:febtest:INFO: 10-03 | XA-000-09-004-019-013-013-13 | 31.4 | 1230.3
07:08:19:febtest:INFO: 05-04 | XA-000-09-004-019-016-015-06 | 31.4 | 1218.6
07:08:20:febtest:INFO: 12-05 | XA-000-09-004-019-004-011-12 | 25.1 | 1224.5
07:08:20:febtest:INFO: 07-06 | XA-000-09-004-019-016-013-06 | 21.9 | 1242.0
07:08:20:febtest:INFO: 14-07 | XA-000-09-004-019-007-011-02 | 40.9 | 1171.5
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_06_12-07_06_55
OPERATOR : Benjamin;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3178| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.5840', '1.853', '2.5750', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9600', '1.850', '2.2880', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9460', '1.850', '0.5218', '0.000', '0.0000', '0.000', '0.0000']