
FEB_3181 13.06.25 09:41:10
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09:41:10:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 09:41:10:ST3_Shared:INFO: FEB-Microcable 09:41:10:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 09:41:11:febtest:INFO: Testing FEB with SN 3181 09:41:12:smx_tester:INFO: Scanning setup 09:41:12:elinks:INFO: Disabling clock on downlink 0 09:41:12:elinks:INFO: Disabling clock on downlink 1 09:41:12:elinks:INFO: Disabling clock on downlink 2 09:41:12:elinks:INFO: Disabling clock on downlink 3 09:41:12:elinks:INFO: Disabling clock on downlink 4 09:41:12:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:41:12:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 09:41:12:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:41:12:elinks:INFO: Disabling clock on downlink 0 09:41:12:elinks:INFO: Disabling clock on downlink 1 09:41:12:elinks:INFO: Disabling clock on downlink 2 09:41:12:elinks:INFO: Disabling clock on downlink 3 09:41:12:elinks:INFO: Disabling clock on downlink 4 09:41:12:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:41:12:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:41:12:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8 09:41:12:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9 09:41:12:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10 09:41:12:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11 09:41:12:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12 09:41:12:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13 09:41:12:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14 09:41:12:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15 09:41:12:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:41:12:elinks:INFO: Disabling clock on downlink 0 09:41:12:elinks:INFO: Disabling clock on downlink 1 09:41:12:elinks:INFO: Disabling clock on downlink 2 09:41:12:elinks:INFO: Disabling clock on downlink 3 09:41:12:elinks:INFO: Disabling clock on downlink 4 09:41:12:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:41:12:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:41:13:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:41:13:elinks:INFO: Disabling clock on downlink 0 09:41:13:elinks:INFO: Disabling clock on downlink 1 09:41:13:elinks:INFO: Disabling clock on downlink 2 09:41:13:elinks:INFO: Disabling clock on downlink 3 09:41:13:elinks:INFO: Disabling clock on downlink 4 09:41:13:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:41:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 09:41:13:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:41:13:elinks:INFO: Disabling clock on downlink 0 09:41:13:elinks:INFO: Disabling clock on downlink 1 09:41:13:elinks:INFO: Disabling clock on downlink 2 09:41:13:elinks:INFO: Disabling clock on downlink 3 09:41:13:elinks:INFO: Disabling clock on downlink 4 09:41:13:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:41:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 09:41:13:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:41:13:setup_element:INFO: Scanning clock phase 09:41:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:41:13:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 09:41:13:setup_element:INFO: Clock phase scan results for group 0, downlink 1 09:41:13:setup_element:INFO: Eye window for uplink 8 : ________________________________________________________________________XXXXXX__ Clock Delay: 34 09:41:13:setup_element:INFO: Eye window for uplink 9 : ________________________________________________________________________XXXXXX__ Clock Delay: 34 09:41:13:setup_element:INFO: Eye window for uplink 10: _______________________________________________________________________XXXXXX___ Clock Delay: 33 09:41:13:setup_element:INFO: Eye window for uplink 11: _______________________________________________________________________XXXXXX___ Clock Delay: 33 09:41:13:setup_element:INFO: Eye window for uplink 12: _________________________________________________________________________XXXXX__ Clock Delay: 35 09:41:13:setup_element:INFO: Eye window for uplink 13: _________________________________________________________________________XXXXX__ Clock Delay: 35 09:41:13:setup_element:INFO: Eye window for uplink 14: __________________________________________________________________________XXXXX_ Clock Delay: 36 09:41:13:setup_element:INFO: Eye window for uplink 15: __________________________________________________________________________XXXXX_ Clock Delay: 36 09:41:13:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 1 09:41:13:setup_element:INFO: Scanning data phases 09:41:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:41:13:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 09:41:18:setup_element:INFO: Data phase scan results for group 0, downlink 1 09:41:18:setup_element:INFO: Eye window for uplink 8 : XXXX_________________________XXXXXXXXXXX Data delay found: 16 09:41:18:setup_element:INFO: Eye window for uplink 9 : XXX__________________________________XXX Data delay found: 19 09:41:18:setup_element:INFO: Eye window for uplink 10: ________________________________XXXXX___ Data delay found: 14 09:41:18:setup_element:INFO: Eye window for uplink 11: _________________________________XXXXX__ Data delay found: 15 09:41:18:setup_element:INFO: Eye window for uplink 12: X_________________________________XXXXX_ Data delay found: 17 09:41:18:setup_element:INFO: Eye window for uplink 13: X__________________________________XXXXX Data delay found: 17 09:41:18:setup_element:INFO: Eye window for uplink 14: XXX____________________________________X Data delay found: 20 09:41:18:setup_element:INFO: Eye window for uplink 15: XXXXX___________________________________ Data delay found: 22 09:41:18:setup_element:INFO: Setting the data phase to 16 for uplink 8 09:41:18:setup_element:INFO: Setting the data phase to 19 for uplink 9 09:41:18:setup_element:INFO: Setting the data phase to 14 for uplink 10 09:41:18:setup_element:INFO: Setting the data phase to 15 for uplink 11 09:41:18:setup_element:INFO: Setting the data phase to 17 for uplink 12 09:41:18:setup_element:INFO: Setting the data phase to 17 for uplink 13 09:41:18:setup_element:INFO: Setting the data phase to 20 for uplink 14 09:41:18:setup_element:INFO: Setting the data phase to 22 for uplink 15 09:41:18:setup_element:INFO: Beginning SMX ASICs map scan 09:41:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:41:18:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 09:41:18:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 09:41:18:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 09:41:18:uplink:INFO: Setting uplinks mask [8, 9, 10, 11, 12, 13, 14, 15] 09:41:19:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8 09:41:19:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9 09:41:19:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10 09:41:19:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11 09:41:19:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12 09:41:19:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13 09:41:20:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14 09:41:20:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15 09:41:21:setup_element:INFO: Performing Elink synchronization 09:41:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:41:21:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 09:41:21:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 09:41:21:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 09:41:21:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1 09:41:21:uplink:INFO: Enabling uplinks [8, 9, 10, 11, 12, 13, 14, 15] |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)] 3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)] 5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)] 7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)] |_________________________________________________________________________| 09:41:22:febtest:INFO: Init all SMX (CSA): 30 09:41:30:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 09:41:30:febtest:INFO: 08-01 | XA-000-09-004-019-018-016-02 | 34.6 | 1153.7 09:41:30:febtest:INFO: 10-03 | XA-000-09-004-019-009-018-12 | 31.4 | 1177.4 09:41:31:febtest:INFO: 12-05 | XA-000-09-004-019-009-017-12 | 44.1 | 1135.9 09:41:31:febtest:INFO: 14-07 | XA-000-09-004-019-018-017-02 | 31.4 | 1153.7 09:41:32:febtest:INFO: Set all CSA to ZERO FEB type: A FEB_A: 1 FEB_B: 0 09:41:34:ST3_smx:INFO: chip: 8-1 34.556970 C 1165.571835 mV 09:41:34:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:41:34:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:41:34:ST3_smx:INFO: Electrons 09:41:34:ST3_smx:INFO: # loops 0 09:41:36:ST3_smx:INFO: # loops 1 09:41:38:ST3_smx:INFO: # loops 2 09:41:39:ST3_smx:INFO: Total # of broken channels: 0 09:41:39:ST3_smx:INFO: List of broken channels: [] 09:41:39:ST3_smx:INFO: Total # of broken channels: 0 09:41:39:ST3_smx:INFO: List of broken channels: [] 09:41:41:ST3_smx:INFO: chip: 10-3 31.389742 C 1189.190035 mV 09:41:41:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:41:41:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:41:41:ST3_smx:INFO: Electrons 09:41:41:ST3_smx:INFO: # loops 0 09:41:43:ST3_smx:INFO: # loops 1 09:41:45:ST3_smx:INFO: # loops 2 09:41:47:ST3_smx:INFO: Total # of broken channels: 0 09:41:47:ST3_smx:INFO: List of broken channels: [] 09:41:47:ST3_smx:INFO: Total # of broken channels: 0 09:41:47:ST3_smx:INFO: List of broken channels: [] 09:41:48:ST3_smx:INFO: chip: 12-5 44.073563 C 1141.874115 mV 09:41:48:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:41:48:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:41:48:ST3_smx:INFO: Electrons 09:41:48:ST3_smx:INFO: # loops 0 09:41:50:ST3_smx:INFO: # loops 1 09:41:52:ST3_smx:INFO: # loops 2 09:41:54:ST3_smx:INFO: Total # of broken channels: 0 09:41:54:ST3_smx:INFO: List of broken channels: [] 09:41:54:ST3_smx:INFO: Total # of broken channels: 0 09:41:54:ST3_smx:INFO: List of broken channels: [] 09:41:56:ST3_smx:INFO: chip: 14-7 31.389742 C 1165.571835 mV 09:41:56:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:41:56:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:41:56:ST3_smx:INFO: Electrons 09:41:56:ST3_smx:INFO: # loops 0 09:41:58:ST3_smx:INFO: # loops 1 09:41:59:ST3_smx:INFO: # loops 2 09:42:01:ST3_smx:INFO: Total # of broken channels: 0 09:42:01:ST3_smx:INFO: List of broken channels: [] 09:42:01:ST3_smx:INFO: Total # of broken channels: 0 09:42:01:ST3_smx:INFO: List of broken channels: [] 09:42:02:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 09:42:02:febtest:INFO: 08-01 | XA-000-09-004-019-018-016-02 | 34.6 | 1195.1 09:42:02:febtest:INFO: 10-03 | XA-000-09-004-019-009-018-12 | 31.4 | 1206.9 09:42:02:febtest:INFO: 12-05 | XA-000-09-004-019-009-017-12 | 44.1 | 1165.6 09:42:02:febtest:INFO: 14-07 | XA-000-09-004-019-018-017-02 | 34.6 | 1183.3 ############################################################ # S U M M A R Y # ############################################################ {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 25_06_13-09_41_10 OPERATOR : Benjamin; SITE : KIT | SETUP : KIT_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 3181| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['2.450', '0.6997', '1.853', '1.2870', '0.000', '0.0000', '0.000', '0.0000'] VI_after__Init : ['2.450', '1.0100', '1.850', '1.1810', '0.000', '0.0000', '0.000', '0.0000'] VI_at__the_End : ['2.450', '0.9904', '1.850', '0.2660', '0.000', '0.0000', '0.000', '0.0000']