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FEB_3188 26.06.25 07:56:02
Info
07:56:02:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:56:02:ST3_Shared:INFO: FEB-Microcable
07:56:02:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:56:02:febtest:INFO: Testing FEB with SN 3188
07:56:04:smx_tester:INFO: Scanning setup
07:56:04:elinks:INFO: Disabling clock on downlink 0
07:56:04:elinks:INFO: Disabling clock on downlink 1
07:56:04:elinks:INFO: Disabling clock on downlink 2
07:56:04:elinks:INFO: Disabling clock on downlink 3
07:56:04:elinks:INFO: Disabling clock on downlink 4
07:56:04:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:56:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
07:56:04:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:56:04:elinks:INFO: Disabling clock on downlink 0
07:56:04:elinks:INFO: Disabling clock on downlink 1
07:56:04:elinks:INFO: Disabling clock on downlink 2
07:56:04:elinks:INFO: Disabling clock on downlink 3
07:56:04:elinks:INFO: Disabling clock on downlink 4
07:56:04:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:56:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:56:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
07:56:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
07:56:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
07:56:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
07:56:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
07:56:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
07:56:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
07:56:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
07:56:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
07:56:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
07:56:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
07:56:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
07:56:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
07:56:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
07:56:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
07:56:04:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
07:56:04:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:56:04:elinks:INFO: Disabling clock on downlink 0
07:56:04:elinks:INFO: Disabling clock on downlink 1
07:56:04:elinks:INFO: Disabling clock on downlink 2
07:56:04:elinks:INFO: Disabling clock on downlink 3
07:56:04:elinks:INFO: Disabling clock on downlink 4
07:56:04:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:56:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:56:04:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:56:04:elinks:INFO: Disabling clock on downlink 0
07:56:04:elinks:INFO: Disabling clock on downlink 1
07:56:05:elinks:INFO: Disabling clock on downlink 2
07:56:05:elinks:INFO: Disabling clock on downlink 3
07:56:05:elinks:INFO: Disabling clock on downlink 4
07:56:05:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:56:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
07:56:05:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:56:05:elinks:INFO: Disabling clock on downlink 0
07:56:05:elinks:INFO: Disabling clock on downlink 1
07:56:05:elinks:INFO: Disabling clock on downlink 2
07:56:05:elinks:INFO: Disabling clock on downlink 3
07:56:05:elinks:INFO: Disabling clock on downlink 4
07:56:05:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:56:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
07:56:05:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:56:05:setup_element:INFO: Scanning clock phase
07:56:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:56:05:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:56:05:setup_element:INFO: Clock phase scan results for group 0, downlink 1
07:56:05:setup_element:INFO: Eye window for uplink 0 : _________________________________________________________________________XXXXX__
Clock Delay: 35
07:56:05:setup_element:INFO: Eye window for uplink 1 : _________________________________________________________________________XXXXX__
Clock Delay: 35
07:56:05:setup_element:INFO: Eye window for uplink 2 : __________________________________________________________________________XXXXX_
Clock Delay: 36
07:56:05:setup_element:INFO: Eye window for uplink 3 : __________________________________________________________________________XXXXX_
Clock Delay: 36
07:56:05:setup_element:INFO: Eye window for uplink 4 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
07:56:05:setup_element:INFO: Eye window for uplink 5 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
07:56:05:setup_element:INFO: Eye window for uplink 6 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
07:56:05:setup_element:INFO: Eye window for uplink 7 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
07:56:05:setup_element:INFO: Eye window for uplink 8 : ________________________________________________________________________XXXXX___
Clock Delay: 34
07:56:05:setup_element:INFO: Eye window for uplink 9 : ________________________________________________________________________XXXXX___
Clock Delay: 34
07:56:05:setup_element:INFO: Eye window for uplink 10: _________________________________________________________________________XXXXXX_
Clock Delay: 35
07:56:05:setup_element:INFO: Eye window for uplink 11: _________________________________________________________________________XXXXXX_
Clock Delay: 35
07:56:05:setup_element:INFO: Eye window for uplink 12: __________________________________________________________________________XXXXX_
Clock Delay: 36
07:56:05:setup_element:INFO: Eye window for uplink 13: __________________________________________________________________________XXXXX_
Clock Delay: 36
07:56:05:setup_element:INFO: Eye window for uplink 14: _________________________________________________________________________XXXXX__
Clock Delay: 35
07:56:05:setup_element:INFO: Eye window for uplink 15: _________________________________________________________________________XXXXX__
Clock Delay: 35
07:56:05:setup_element:INFO: Setting the clock phase to 35 for group 0, downlink 1
07:56:05:setup_element:INFO: Scanning data phases
07:56:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:56:05:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:56:10:setup_element:INFO: Data phase scan results for group 0, downlink 1
07:56:10:setup_element:INFO: Eye window for uplink 0 : _________XXXXX__________________________
Data delay found: 31
07:56:10:setup_element:INFO: Eye window for uplink 1 : _______XXXXX____________________________
Data delay found: 29
07:56:10:setup_element:INFO: Eye window for uplink 2 : ________XXXXX___________________________
Data delay found: 30
07:56:10:setup_element:INFO: Eye window for uplink 3 : _______XXXXX____________________________
Data delay found: 29
07:56:10:setup_element:INFO: Eye window for uplink 4 : _____XXXXX______________________________
Data delay found: 27
07:56:10:setup_element:INFO: Eye window for uplink 5 : ____XXXX________________________________
Data delay found: 25
07:56:10:setup_element:INFO: Eye window for uplink 6 : XXX___________________________________XX
Data delay found: 20
07:56:10:setup_element:INFO: Eye window for uplink 7 : X___________________________________XXXX
Data delay found: 18
07:56:10:setup_element:INFO: Eye window for uplink 8 : ______________________XXXXXXXXXXXXXX____
Data delay found: 8
07:56:10:setup_element:INFO: Eye window for uplink 9 : ______________________________XXXX______
Data delay found: 11
07:56:10:setup_element:INFO: Eye window for uplink 10: _______________________________XXXXXX___
Data delay found: 13
07:56:10:setup_element:INFO: Eye window for uplink 11: _______________________________XXXXXX___
Data delay found: 13
07:56:10:setup_element:INFO: Eye window for uplink 12: ________________________________XXXX____
Data delay found: 13
07:56:10:setup_element:INFO: Eye window for uplink 13: ________________________________XXXX____
Data delay found: 13
07:56:10:setup_element:INFO: Eye window for uplink 14: _______________________________XXXX_____
Data delay found: 12
07:56:10:setup_element:INFO: Eye window for uplink 15: _______________________________XXXXX____
Data delay found: 13
07:56:10:setup_element:INFO: Setting the data phase to 31 for uplink 0
07:56:10:setup_element:INFO: Setting the data phase to 29 for uplink 1
07:56:10:setup_element:INFO: Setting the data phase to 30 for uplink 2
07:56:10:setup_element:INFO: Setting the data phase to 29 for uplink 3
07:56:10:setup_element:INFO: Setting the data phase to 27 for uplink 4
07:56:10:setup_element:INFO: Setting the data phase to 25 for uplink 5
07:56:10:setup_element:INFO: Setting the data phase to 20 for uplink 6
07:56:10:setup_element:INFO: Setting the data phase to 18 for uplink 7
07:56:10:setup_element:INFO: Setting the data phase to 8 for uplink 8
07:56:10:setup_element:INFO: Setting the data phase to 11 for uplink 9
07:56:10:setup_element:INFO: Setting the data phase to 13 for uplink 10
07:56:10:setup_element:INFO: Setting the data phase to 13 for uplink 11
07:56:10:setup_element:INFO: Setting the data phase to 13 for uplink 12
07:56:10:setup_element:INFO: Setting the data phase to 13 for uplink 13
07:56:10:setup_element:INFO: Setting the data phase to 12 for uplink 14
07:56:10:setup_element:INFO: Setting the data phase to 13 for uplink 15
07:56:10:setup_element:INFO: Beginning SMX ASICs map scan
07:56:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:56:10:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:56:10:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
07:56:10:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
07:56:10:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
07:56:10:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
07:56:10:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
07:56:11:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
07:56:11:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
07:56:11:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
07:56:11:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
07:56:11:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
07:56:11:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
07:56:11:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
07:56:11:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
07:56:11:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
07:56:11:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
07:56:12:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
07:56:12:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
07:56:12:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
07:56:12:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
07:56:13:setup_element:INFO: Performing Elink synchronization
07:56:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:56:13:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:56:13:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
07:56:13:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
07:56:13:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
07:56:13:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
07:56:14:febtest:INFO: Init all SMX (CSA): 30
07:56:29:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:56:29:febtest:INFO: 01-00 | XA-000-09-004-019-008-012-06 | 31.4 | 1171.5
07:56:29:febtest:INFO: 08-01 | XA-000-09-004-019-005-011-01 | 34.6 | 1165.6
07:56:29:febtest:INFO: 03-02 | XA-000-09-004-019-014-011-03 | 34.6 | 1171.5
07:56:29:febtest:INFO: 10-03 | XA-000-09-004-019-017-011-11 | 37.7 | 1159.7
07:56:30:febtest:INFO: 05-04 | XA-000-09-004-019-011-011-08 | 44.1 | 1147.8
07:56:30:febtest:INFO: 12-05 | XA-000-09-004-019-017-010-11 | 40.9 | 1153.7
07:56:30:febtest:INFO: 07-06 | XA-000-09-004-019-008-011-06 | 37.7 | 1171.5
07:56:30:febtest:INFO: 14-07 | XA-000-09-004-019-014-010-03 | 37.7 | 1159.7
07:56:31:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
07:56:33:ST3_smx:INFO: chip: 1-0 34.556970 C 1183.292940 mV
07:56:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:56:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:56:33:ST3_smx:INFO: Electrons
07:56:33:ST3_smx:INFO: # loops 0
07:56:35:ST3_smx:INFO: # loops 1
07:56:37:ST3_smx:INFO: # loops 2
07:56:39:ST3_smx:INFO: Total # of broken channels: 0
07:56:39:ST3_smx:INFO: List of broken channels: []
07:56:39:ST3_smx:INFO: Total # of broken channels: 0
07:56:39:ST3_smx:INFO: List of broken channels: []
07:56:40:ST3_smx:INFO: chip: 8-1 34.556970 C 1183.292940 mV
07:56:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:56:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:56:40:ST3_smx:INFO: Electrons
07:56:40:ST3_smx:INFO: # loops 0
07:56:42:ST3_smx:INFO: # loops 1
07:56:44:ST3_smx:INFO: # loops 2
07:56:45:ST3_smx:INFO: Total # of broken channels: 0
07:56:45:ST3_smx:INFO: List of broken channels: []
07:56:45:ST3_smx:INFO: Total # of broken channels: 10
07:56:45:ST3_smx:INFO: List of broken channels: [25, 27, 67, 71, 79, 81, 85, 99, 101, 115]
07:56:47:ST3_smx:INFO: chip: 3-2 37.726682 C 1183.292940 mV
07:56:47:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:56:47:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:56:47:ST3_smx:INFO: Electrons
07:56:47:ST3_smx:INFO: # loops 0
07:56:49:ST3_smx:INFO: # loops 1
07:56:51:ST3_smx:INFO: # loops 2
07:56:53:ST3_smx:INFO: Total # of broken channels: 0
07:56:53:ST3_smx:INFO: List of broken channels: []
07:56:53:ST3_smx:INFO: Total # of broken channels: 0
07:56:53:ST3_smx:INFO: List of broken channels: []
07:56:55:ST3_smx:INFO: chip: 10-3 40.898880 C 1171.483840 mV
07:56:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:56:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:56:55:ST3_smx:INFO: Electrons
07:56:55:ST3_smx:INFO: # loops 0
07:56:56:ST3_smx:INFO: # loops 1
07:56:58:ST3_smx:INFO: # loops 2
07:56:59:ST3_smx:INFO: Total # of broken channels: 0
07:57:00:ST3_smx:INFO: List of broken channels: []
07:57:00:ST3_smx:INFO: Total # of broken channels: 0
07:57:00:ST3_smx:INFO: List of broken channels: []
07:57:01:ST3_smx:INFO: chip: 5-4 44.073563 C 1153.732915 mV
07:57:01:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:57:01:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:57:01:ST3_smx:INFO: Electrons
07:57:01:ST3_smx:INFO: # loops 0
07:57:03:ST3_smx:INFO: # loops 1
07:57:04:ST3_smx:INFO: # loops 2
07:57:06:ST3_smx:INFO: Total # of broken channels: 0
07:57:06:ST3_smx:INFO: List of broken channels: []
07:57:06:ST3_smx:INFO: Total # of broken channels: 0
07:57:06:ST3_smx:INFO: List of broken channels: []
07:57:07:ST3_smx:INFO: chip: 12-5 40.898880 C 1165.571835 mV
07:57:07:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:57:07:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:57:07:ST3_smx:INFO: Electrons
07:57:07:ST3_smx:INFO: # loops 0
07:57:09:ST3_smx:INFO: # loops 1
07:57:10:ST3_smx:INFO: # loops 2
07:57:12:ST3_smx:INFO: Total # of broken channels: 0
07:57:12:ST3_smx:INFO: List of broken channels: []
07:57:12:ST3_smx:INFO: Total # of broken channels: 0
07:57:12:ST3_smx:INFO: List of broken channels: []
07:57:14:ST3_smx:INFO: chip: 7-6 40.898880 C 1183.292940 mV
07:57:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:57:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:57:14:ST3_smx:INFO: Electrons
07:57:14:ST3_smx:INFO: # loops 0
07:57:16:ST3_smx:INFO: # loops 1
07:57:17:ST3_smx:INFO: # loops 2
07:57:19:ST3_smx:INFO: Total # of broken channels: 0
07:57:19:ST3_smx:INFO: List of broken channels: []
07:57:19:ST3_smx:INFO: Total # of broken channels: 0
07:57:19:ST3_smx:INFO: List of broken channels: []
07:57:20:ST3_smx:INFO: chip: 14-7 40.898880 C 1171.483840 mV
07:57:20:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:57:20:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:57:20:ST3_smx:INFO: Electrons
07:57:20:ST3_smx:INFO: # loops 0
07:57:22:ST3_smx:INFO: # loops 1
07:57:24:ST3_smx:INFO: # loops 2
07:57:25:ST3_smx:INFO: Total # of broken channels: 0
07:57:25:ST3_smx:INFO: List of broken channels: []
07:57:25:ST3_smx:INFO: Total # of broken channels: 0
07:57:25:ST3_smx:INFO: List of broken channels: []
07:57:25:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:57:26:febtest:INFO: 01-00 | XA-000-09-004-019-008-012-06 | 34.6 | 1206.9
07:57:26:febtest:INFO: 08-01 | XA-000-09-004-019-005-011-01 | 37.7 | 1201.0
07:57:26:febtest:INFO: 03-02 | XA-000-09-004-019-014-011-03 | 37.7 | 1201.0
07:57:26:febtest:INFO: 10-03 | XA-000-09-004-019-017-011-11 | 40.9 | 1189.2
07:57:26:febtest:INFO: 05-04 | XA-000-09-004-019-011-011-08 | 47.3 | 1177.4
07:57:27:febtest:INFO: 12-05 | XA-000-09-004-019-017-010-11 | 44.1 | 1183.3
07:57:27:febtest:INFO: 07-06 | XA-000-09-004-019-008-011-06 | 40.9 | 1201.0
07:57:27:febtest:INFO: 14-07 | XA-000-09-004-019-014-010-03 | 40.9 | 1189.2
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_06_26-07_56_02
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3188| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.5500', '1.850', '2.7340', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0280', '1.850', '2.3000', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9700', '1.850', '0.5279', '0.000', '0.0000', '0.000', '0.0000']