FEB_3189 30.06.25 09:25:47
Info
09:25:47:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:25:47:ST3_Shared:INFO: FEB-Microcable
09:25:47:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:25:47:febtest:INFO: Testing FEB with SN 3189
09:25:49:smx_tester:INFO: Scanning setup
09:25:49:elinks:INFO: Disabling clock on downlink 0
09:25:49:elinks:INFO: Disabling clock on downlink 1
09:25:49:elinks:INFO: Disabling clock on downlink 2
09:25:49:elinks:INFO: Disabling clock on downlink 3
09:25:49:elinks:INFO: Disabling clock on downlink 4
09:25:49:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:25:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:25:49:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:25:49:elinks:INFO: Disabling clock on downlink 0
09:25:49:elinks:INFO: Disabling clock on downlink 1
09:25:49:elinks:INFO: Disabling clock on downlink 2
09:25:49:elinks:INFO: Disabling clock on downlink 3
09:25:49:elinks:INFO: Disabling clock on downlink 4
09:25:49:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:25:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:25:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
09:25:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
09:25:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
09:25:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
09:25:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
09:25:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
09:25:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
09:25:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
09:25:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
09:25:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
09:25:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
09:25:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
09:25:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
09:25:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
09:25:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
09:25:49:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
09:25:49:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:25:49:elinks:INFO: Disabling clock on downlink 0
09:25:49:elinks:INFO: Disabling clock on downlink 1
09:25:49:elinks:INFO: Disabling clock on downlink 2
09:25:49:elinks:INFO: Disabling clock on downlink 3
09:25:49:elinks:INFO: Disabling clock on downlink 4
09:25:49:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:25:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:25:49:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:25:49:elinks:INFO: Disabling clock on downlink 0
09:25:49:elinks:INFO: Disabling clock on downlink 1
09:25:49:elinks:INFO: Disabling clock on downlink 2
09:25:49:elinks:INFO: Disabling clock on downlink 3
09:25:49:elinks:INFO: Disabling clock on downlink 4
09:25:49:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:25:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
09:25:50:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:25:50:elinks:INFO: Disabling clock on downlink 0
09:25:50:elinks:INFO: Disabling clock on downlink 1
09:25:50:elinks:INFO: Disabling clock on downlink 2
09:25:50:elinks:INFO: Disabling clock on downlink 3
09:25:50:elinks:INFO: Disabling clock on downlink 4
09:25:50:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:25:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
09:25:50:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:25:50:setup_element:INFO: Scanning clock phase
09:25:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:25:50:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:25:50:setup_element:INFO: Clock phase scan results for group 0, downlink 1
09:25:50:setup_element:INFO: Eye window for uplink 0 : ________________________________________________________________________________
Clock Delay: 40
09:25:50:setup_element:INFO: Eye window for uplink 1 : ________________________________________________________________________________
Clock Delay: 40
09:25:50:setup_element:INFO: Eye window for uplink 2 : __________________________________________________________________________XXXX__
Clock Delay: 35
09:25:50:setup_element:INFO: Eye window for uplink 3 : __________________________________________________________________________XXXX__
Clock Delay: 35
09:25:50:setup_element:INFO: Eye window for uplink 4 : ________________________________________________________________________XXXXX___
Clock Delay: 34
09:25:50:setup_element:INFO: Eye window for uplink 5 : ________________________________________________________________________XXXXX___
Clock Delay: 34
09:25:50:setup_element:INFO: Eye window for uplink 6 : _________________________________________________________________________XXXXX__
Clock Delay: 35
09:25:50:setup_element:INFO: Eye window for uplink 7 : _________________________________________________________________________XXXXX__
Clock Delay: 35
09:25:50:setup_element:INFO: Eye window for uplink 8 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
09:25:50:setup_element:INFO: Eye window for uplink 9 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
09:25:50:setup_element:INFO: Eye window for uplink 10: ________________________________________________________________________XXXXX___
Clock Delay: 34
09:25:50:setup_element:INFO: Eye window for uplink 11: ________________________________________________________________________XXXXX___
Clock Delay: 34
09:25:50:setup_element:INFO: Eye window for uplink 12: __________________________________________________________________________XXXX__
Clock Delay: 35
09:25:50:setup_element:INFO: Eye window for uplink 13: __________________________________________________________________________XXXX__
Clock Delay: 35
09:25:50:setup_element:INFO: Eye window for uplink 14: __________________________________________________________________________XXXXX_
Clock Delay: 36
09:25:50:setup_element:INFO: Eye window for uplink 15: __________________________________________________________________________XXXXX_
Clock Delay: 36
09:25:50:setup_element:INFO: Setting the clock phase to 35 for group 0, downlink 1
09:25:50:setup_element:INFO: Scanning data phases
09:25:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:25:50:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:25:55:setup_element:INFO: Data phase scan results for group 0, downlink 1
09:25:55:setup_element:INFO: Eye window for uplink 0 : _____________XXXXX______________________
Data delay found: 35
09:25:55:setup_element:INFO: Eye window for uplink 1 : ___________XXXXX________________________
Data delay found: 33
09:25:55:setup_element:INFO: Eye window for uplink 2 : ________XXXXX___________________________
Data delay found: 30
09:25:55:setup_element:INFO: Eye window for uplink 3 : ________XXXX____________________________
Data delay found: 29
09:25:55:setup_element:INFO: Eye window for uplink 4 : ___XXXX_________________________________
Data delay found: 24
09:25:55:setup_element:INFO: Eye window for uplink 5 : _XXXXX__________________________________
Data delay found: 23
09:25:55:setup_element:INFO: Eye window for uplink 6 : XX____________________________________XX
Data delay found: 19
09:25:55:setup_element:INFO: Eye window for uplink 7 : X___________________________________XXXX
Data delay found: 18
09:25:55:setup_element:INFO: Eye window for uplink 8 : _______________________XXXXXXXXXXXXXX___
Data delay found: 9
09:25:55:setup_element:INFO: Eye window for uplink 9 : ______________________________XXXXX_____
Data delay found: 12
09:25:55:setup_element:INFO: Eye window for uplink 10: _____________________________XXXXXX_____
Data delay found: 11
09:25:55:setup_element:INFO: Eye window for uplink 11: ______________________________XXXXX_____
Data delay found: 12
09:25:55:setup_element:INFO: Eye window for uplink 12: _____________________________XXXXX______
Data delay found: 11
09:25:55:setup_element:INFO: Eye window for uplink 13: ______________________________XXXXX_____
Data delay found: 12
09:25:55:setup_element:INFO: Eye window for uplink 14: ________________________________XXXXX___
Data delay found: 14
09:25:55:setup_element:INFO: Eye window for uplink 15: ________________________________XXXXX___
Data delay found: 14
09:25:55:setup_element:INFO: Setting the data phase to 35 for uplink 0
09:25:55:setup_element:INFO: Setting the data phase to 33 for uplink 1
09:25:55:setup_element:INFO: Setting the data phase to 30 for uplink 2
09:25:55:setup_element:INFO: Setting the data phase to 29 for uplink 3
09:25:55:setup_element:INFO: Setting the data phase to 24 for uplink 4
09:25:55:setup_element:INFO: Setting the data phase to 23 for uplink 5
09:25:55:setup_element:INFO: Setting the data phase to 19 for uplink 6
09:25:55:setup_element:INFO: Setting the data phase to 18 for uplink 7
09:25:55:setup_element:INFO: Setting the data phase to 9 for uplink 8
09:25:55:setup_element:INFO: Setting the data phase to 12 for uplink 9
09:25:55:setup_element:INFO: Setting the data phase to 11 for uplink 10
09:25:55:setup_element:INFO: Setting the data phase to 12 for uplink 11
09:25:55:setup_element:INFO: Setting the data phase to 11 for uplink 12
09:25:55:setup_element:INFO: Setting the data phase to 12 for uplink 13
09:25:55:setup_element:INFO: Setting the data phase to 14 for uplink 14
09:25:55:setup_element:INFO: Setting the data phase to 14 for uplink 15
09:25:55:setup_element:INFO: Beginning SMX ASICs map scan
09:25:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:25:55:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:25:55:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
09:25:55:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
09:25:55:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
09:25:55:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
09:25:55:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
09:25:56:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
09:25:56:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
09:25:56:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
09:25:56:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
09:25:56:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
09:25:56:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
09:25:56:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
09:25:56:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
09:25:56:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
09:25:56:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
09:25:57:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
09:25:57:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
09:25:57:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
09:25:57:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
09:25:58:setup_element:INFO: Performing Elink synchronization
09:25:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:25:58:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:25:58:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
09:25:58:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
09:25:58:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
09:25:58:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
09:25:59:febtest:INFO: Init all SMX (CSA): 30
09:26:15:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:26:15:febtest:INFO: 01-00 | XA-000-09-004-019-017-017-12 | 28.2 | 1183.3
09:26:16:febtest:INFO: 08-01 | XA-000-09-004-019-017-016-12 | 28.2 | 1177.4
09:26:16:febtest:INFO: 03-02 | XA-000-09-004-019-008-016-01 | 40.9 | 1153.7
09:26:16:febtest:INFO: 10-03 | XA-000-09-004-019-008-013-06 | 44.1 | 1124.0
09:26:16:febtest:INFO: 05-04 | XA-000-09-004-037-011-024-05 | 34.6 | 1177.4
09:26:16:febtest:INFO: 12-05 | XA-000-09-004-019-005-013-01 | 37.7 | 1153.7
09:26:17:febtest:INFO: 07-06 | XA-000-09-004-019-011-016-15 | 37.7 | 1159.7
09:26:17:febtest:INFO: 14-07 | XA-000-09-004-019-002-013-09 | 28.2 | 1189.2
09:26:18:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
09:26:20:ST3_smx:INFO: chip: 1-0 28.225000 C 1195.082160 mV
09:26:20:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:26:20:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:26:20:ST3_smx:INFO: Electrons
09:26:20:ST3_smx:INFO: # loops 0
09:26:22:ST3_smx:INFO: # loops 1
09:26:24:ST3_smx:INFO: # loops 2
09:26:26:ST3_smx:INFO: Total # of broken channels: 0
09:26:26:ST3_smx:INFO: List of broken channels: []
09:26:26:ST3_smx:INFO: Total # of broken channels: 1
09:26:26:ST3_smx:INFO: List of broken channels: [1]
09:26:28:ST3_smx:INFO: chip: 8-1 31.389742 C 1189.190035 mV
09:26:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:26:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:26:28:ST3_smx:INFO: Electrons
09:26:28:ST3_smx:INFO: # loops 0
09:26:30:ST3_smx:INFO: # loops 1
09:26:32:ST3_smx:INFO: # loops 2
09:26:33:ST3_smx:INFO: Total # of broken channels: 0
09:26:33:ST3_smx:INFO: List of broken channels: []
09:26:33:ST3_smx:INFO: Total # of broken channels: 0
09:26:33:ST3_smx:INFO: List of broken channels: []
09:26:35:ST3_smx:INFO: chip: 3-2 40.898880 C 1165.571835 mV
09:26:35:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:26:35:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:26:35:ST3_smx:INFO: Electrons
09:26:35:ST3_smx:INFO: # loops 0
09:26:37:ST3_smx:INFO: # loops 1
09:26:40:ST3_smx:INFO: # loops 2
09:26:42:ST3_smx:INFO: Total # of broken channels: 0
09:26:42:ST3_smx:INFO: List of broken channels: []
09:26:42:ST3_smx:INFO: Total # of broken channels: 2
09:26:42:ST3_smx:INFO: List of broken channels: [1, 7]
09:26:43:ST3_smx:INFO: chip: 10-3 44.073563 C 1141.874115 mV
09:26:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:26:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:26:43:ST3_smx:INFO: Electrons
09:26:43:ST3_smx:INFO: # loops 0
09:26:45:ST3_smx:INFO: # loops 1
09:26:47:ST3_smx:INFO: # loops 2
09:26:49:ST3_smx:INFO: Total # of broken channels: 0
09:26:49:ST3_smx:INFO: List of broken channels: []
09:26:49:ST3_smx:INFO: Total # of broken channels: 4
09:26:49:ST3_smx:INFO: List of broken channels: [6, 8, 34, 44]
09:26:51:ST3_smx:INFO: chip: 5-4 34.556970 C 1189.190035 mV
09:26:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:26:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:26:51:ST3_smx:INFO: Electrons
09:26:51:ST3_smx:INFO: # loops 0
09:26:53:ST3_smx:INFO: # loops 1
09:26:54:ST3_smx:INFO: # loops 2
09:26:56:ST3_smx:INFO: Total # of broken channels: 0
09:26:56:ST3_smx:INFO: List of broken channels: []
09:26:56:ST3_smx:INFO: Total # of broken channels: 1
09:26:56:ST3_smx:INFO: List of broken channels: [19]
09:26:58:ST3_smx:INFO: chip: 12-5 40.898880 C 1165.571835 mV
09:26:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:26:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:26:58:ST3_smx:INFO: Electrons
09:26:58:ST3_smx:INFO: # loops 0
09:27:00:ST3_smx:INFO: # loops 1
09:27:02:ST3_smx:INFO: # loops 2
09:27:04:ST3_smx:INFO: Total # of broken channels: 0
09:27:04:ST3_smx:INFO: List of broken channels: []
09:27:04:ST3_smx:INFO: Total # of broken channels: 0
09:27:04:ST3_smx:INFO: List of broken channels: []
09:27:05:ST3_smx:INFO: chip: 7-6 37.726682 C 1171.483840 mV
09:27:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:27:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:27:05:ST3_smx:INFO: Electrons
09:27:05:ST3_smx:INFO: # loops 0
09:27:07:ST3_smx:INFO: # loops 1
09:27:09:ST3_smx:INFO: # loops 2
09:27:11:ST3_smx:INFO: Total # of broken channels: 0
09:27:11:ST3_smx:INFO: List of broken channels: []
09:27:11:ST3_smx:INFO: Total # of broken channels: 0
09:27:11:ST3_smx:INFO: List of broken channels: []
09:27:13:ST3_smx:INFO: chip: 14-7 28.225000 C 1206.851500 mV
09:27:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:27:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:27:13:ST3_smx:INFO: Electrons
09:27:13:ST3_smx:INFO: # loops 0
09:27:15:ST3_smx:INFO: # loops 1
09:27:17:ST3_smx:INFO: # loops 2
09:27:19:ST3_smx:INFO: Total # of broken channels: 0
09:27:19:ST3_smx:INFO: List of broken channels: []
09:27:19:ST3_smx:INFO: Total # of broken channels: 0
09:27:19:ST3_smx:INFO: List of broken channels: []
09:27:19:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:27:19:febtest:INFO: 01-00 | XA-000-09-004-019-017-017-12 | 31.4 | 1224.5
09:27:19:febtest:INFO: 08-01 | XA-000-09-004-019-017-016-12 | 31.4 | 1212.7
09:27:19:febtest:INFO: 03-02 | XA-000-09-004-019-008-016-01 | 40.9 | 1206.9
09:27:20:febtest:INFO: 10-03 | XA-000-09-004-019-008-013-06 | 47.3 | 1165.6
09:27:20:febtest:INFO: 05-04 | XA-000-09-004-037-011-024-05 | 34.6 | 1212.7
09:27:20:febtest:INFO: 12-05 | XA-000-09-004-019-005-013-01 | 44.1 | 1189.2
09:27:20:febtest:INFO: 07-06 | XA-000-09-004-019-011-016-15 | 40.9 | 1195.1
09:27:21:febtest:INFO: 14-07 | XA-000-09-004-019-002-013-09 | 31.4 | 1224.5
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_06_30-09_25_47
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3189| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.4780', '1.850', '2.5120', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9750', '1.850', '2.3950', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9600', '1.850', '0.5191', '0.000', '0.0000', '0.000', '0.0000']