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FEB_3195 08.07.25 11:00:51
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11:00:51:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:00:51:ST3_Shared:INFO: FEB-Microcable
11:00:51:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:00:51:febtest:INFO: Testing FEB with SN 3195
11:00:53:smx_tester:INFO: Scanning setup
11:00:53:elinks:INFO: Disabling clock on downlink 0
11:00:53:elinks:INFO: Disabling clock on downlink 1
11:00:53:elinks:INFO: Disabling clock on downlink 2
11:00:53:elinks:INFO: Disabling clock on downlink 3
11:00:53:elinks:INFO: Disabling clock on downlink 4
11:00:53:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:00:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:00:53:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:00:53:elinks:INFO: Disabling clock on downlink 0
11:00:53:elinks:INFO: Disabling clock on downlink 1
11:00:53:elinks:INFO: Disabling clock on downlink 2
11:00:53:elinks:INFO: Disabling clock on downlink 3
11:00:53:elinks:INFO: Disabling clock on downlink 4
11:00:53:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:00:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:00:53:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
11:00:53:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
11:00:53:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
11:00:53:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
11:00:53:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
11:00:53:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
11:00:53:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
11:00:53:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
11:00:53:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
11:00:53:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
11:00:53:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
11:00:53:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
11:00:53:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
11:00:53:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
11:00:53:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
11:00:53:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
11:00:53:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:00:53:elinks:INFO: Disabling clock on downlink 0
11:00:53:elinks:INFO: Disabling clock on downlink 1
11:00:53:elinks:INFO: Disabling clock on downlink 2
11:00:53:elinks:INFO: Disabling clock on downlink 3
11:00:53:elinks:INFO: Disabling clock on downlink 4
11:00:53:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:00:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:00:53:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:00:53:elinks:INFO: Disabling clock on downlink 0
11:00:53:elinks:INFO: Disabling clock on downlink 1
11:00:53:elinks:INFO: Disabling clock on downlink 2
11:00:53:elinks:INFO: Disabling clock on downlink 3
11:00:53:elinks:INFO: Disabling clock on downlink 4
11:00:53:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:00:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
11:00:53:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:00:54:elinks:INFO: Disabling clock on downlink 0
11:00:54:elinks:INFO: Disabling clock on downlink 1
11:00:54:elinks:INFO: Disabling clock on downlink 2
11:00:54:elinks:INFO: Disabling clock on downlink 3
11:00:54:elinks:INFO: Disabling clock on downlink 4
11:00:54:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:00:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
11:00:54:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:00:54:setup_element:INFO: Scanning clock phase
11:00:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:00:54:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:00:54:setup_element:INFO: Clock phase scan results for group 0, downlink 1
11:00:54:setup_element:INFO: Eye window for uplink 0 : _________________________________________________________________________XXXXX__
Clock Delay: 35
11:00:54:setup_element:INFO: Eye window for uplink 1 : _________________________________________________________________________XXXXX__
Clock Delay: 35
11:00:54:setup_element:INFO: Eye window for uplink 2 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
11:00:54:setup_element:INFO: Eye window for uplink 3 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
11:00:54:setup_element:INFO: Eye window for uplink 4 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
11:00:54:setup_element:INFO: Eye window for uplink 5 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
11:00:54:setup_element:INFO: Eye window for uplink 6 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
11:00:54:setup_element:INFO: Eye window for uplink 7 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
11:00:54:setup_element:INFO: Eye window for uplink 8 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
11:00:54:setup_element:INFO: Eye window for uplink 9 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
11:00:54:setup_element:INFO: Eye window for uplink 10: ________________________________________________________________________________
Clock Delay: 40
11:00:54:setup_element:INFO: Eye window for uplink 11: ________________________________________________________________________________
Clock Delay: 40
11:00:54:setup_element:INFO: Eye window for uplink 12: _________________________________________________________________________XXXXXXX
Clock Delay: 36
11:00:54:setup_element:INFO: Eye window for uplink 13: _________________________________________________________________________XXXXXXX
Clock Delay: 36
11:00:54:setup_element:INFO: Eye window for uplink 14: ________________________________________________________________________XXXXX___
Clock Delay: 34
11:00:54:setup_element:INFO: Eye window for uplink 15: ________________________________________________________________________XXXXX___
Clock Delay: 34
11:00:54:setup_element:INFO: Setting the clock phase to 35 for group 0, downlink 1
11:00:54:setup_element:INFO: Scanning data phases
11:00:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:00:54:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:00:59:setup_element:INFO: Data phase scan results for group 0, downlink 1
11:00:59:setup_element:INFO: Eye window for uplink 0 : __________XXXX__________________________
Data delay found: 31
11:00:59:setup_element:INFO: Eye window for uplink 1 : ________XXXXX___________________________
Data delay found: 30
11:00:59:setup_element:INFO: Eye window for uplink 2 : _______XXXXX____________________________
Data delay found: 29
11:00:59:setup_element:INFO: Eye window for uplink 3 : ______XXXXX_____________________________
Data delay found: 28
11:00:59:setup_element:INFO: Eye window for uplink 4 : _______XXXX_____________________________
Data delay found: 28
11:00:59:setup_element:INFO: Eye window for uplink 5 : ______XXXX______________________________
Data delay found: 27
11:00:59:setup_element:INFO: Eye window for uplink 6 : XXX___________________________________XX
Data delay found: 20
11:00:59:setup_element:INFO: Eye window for uplink 7 : XX__________________________________XXXX
Data delay found: 18
11:00:59:setup_element:INFO: Eye window for uplink 8 : _____________________XXXXXXXXXXXXXXX____
Data delay found: 8
11:00:59:setup_element:INFO: Eye window for uplink 9 : _____________________________XXXXX______
Data delay found: 11
11:00:59:setup_element:INFO: Eye window for uplink 10: _______________________________XXXXXX___
Data delay found: 13
11:00:59:setup_element:INFO: Eye window for uplink 11: ________________________________XXXXX___
Data delay found: 14
11:00:59:setup_element:INFO: Eye window for uplink 12: _______________________________XXXXX____
Data delay found: 13
11:00:59:setup_element:INFO: Eye window for uplink 13: ________________________________XXXXX___
Data delay found: 14
11:00:59:setup_element:INFO: Eye window for uplink 14: _____________________________XXXXX______
Data delay found: 11
11:00:59:setup_element:INFO: Eye window for uplink 15: ______________________________XXXXX_____
Data delay found: 12
11:00:59:setup_element:INFO: Setting the data phase to 31 for uplink 0
11:00:59:setup_element:INFO: Setting the data phase to 30 for uplink 1
11:00:59:setup_element:INFO: Setting the data phase to 29 for uplink 2
11:00:59:setup_element:INFO: Setting the data phase to 28 for uplink 3
11:00:59:setup_element:INFO: Setting the data phase to 28 for uplink 4
11:00:59:setup_element:INFO: Setting the data phase to 27 for uplink 5
11:00:59:setup_element:INFO: Setting the data phase to 20 for uplink 6
11:00:59:setup_element:INFO: Setting the data phase to 18 for uplink 7
11:00:59:setup_element:INFO: Setting the data phase to 8 for uplink 8
11:00:59:setup_element:INFO: Setting the data phase to 11 for uplink 9
11:00:59:setup_element:INFO: Setting the data phase to 13 for uplink 10
11:00:59:setup_element:INFO: Setting the data phase to 14 for uplink 11
11:00:59:setup_element:INFO: Setting the data phase to 13 for uplink 12
11:00:59:setup_element:INFO: Setting the data phase to 14 for uplink 13
11:00:59:setup_element:INFO: Setting the data phase to 11 for uplink 14
11:00:59:setup_element:INFO: Setting the data phase to 12 for uplink 15
11:00:59:setup_element:INFO: Beginning SMX ASICs map scan
11:00:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:00:59:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:00:59:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
11:00:59:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
11:00:59:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
11:00:59:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
11:00:59:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
11:01:00:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
11:01:00:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
11:01:00:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
11:01:00:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
11:01:00:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
11:01:00:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
11:01:00:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
11:01:00:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
11:01:00:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
11:01:00:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
11:01:01:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
11:01:01:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
11:01:01:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
11:01:01:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
11:01:02:setup_element:INFO: Performing Elink synchronization
11:01:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:01:02:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:01:02:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
11:01:02:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
11:01:02:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
11:01:02:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
11:01:03:febtest:INFO: Init all SMX (CSA): 30
11:01:20:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:01:20:febtest:INFO: 01-00 | XA-000-09-004-037-013-006-07 | 34.6 | 1171.5
11:01:20:febtest:INFO: 08-01 | XA-000-09-004-037-004-006-06 | 37.7 | 1159.7
11:01:20:febtest:INFO: 03-02 | XA-000-09-004-037-010-006-15 | 12.4 | 1247.9
11:01:21:febtest:INFO: 10-03 | XA-000-09-004-037-010-004-15 | 25.1 | 1212.7
11:01:21:febtest:INFO: 05-04 | XA-000-09-004-037-007-004-08 | 28.2 | 1206.9
11:01:21:febtest:INFO: 12-05 | XA-000-09-004-037-016-007-12 | 21.9 | 1218.6
11:01:21:febtest:INFO: 07-06 | XA-000-09-004-037-016-006-12 | 34.6 | 1165.6
11:01:21:febtest:INFO: 14-07 | XA-000-09-004-037-007-006-08 | 37.7 | 1153.7
11:01:22:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
11:01:24:ST3_smx:INFO: chip: 1-0 34.556970 C 1183.292940 mV
11:01:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:01:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:01:24:ST3_smx:INFO: Electrons
11:01:24:ST3_smx:INFO: # loops 0
11:01:27:ST3_smx:INFO: # loops 1
11:01:29:ST3_smx:INFO: # loops 2
11:01:31:ST3_smx:INFO: Total # of broken channels: 0
11:01:31:ST3_smx:INFO: List of broken channels: []
11:01:31:ST3_smx:INFO: Total # of broken channels: 0
11:01:31:ST3_smx:INFO: List of broken channels: []
11:01:33:ST3_smx:INFO: chip: 8-1 34.556970 C 1171.483840 mV
11:01:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:01:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:01:33:ST3_smx:INFO: Electrons
11:01:33:ST3_smx:INFO: # loops 0
11:01:34:ST3_smx:INFO: # loops 1
11:01:36:ST3_smx:INFO: # loops 2
11:01:38:ST3_smx:INFO: Total # of broken channels: 0
11:01:38:ST3_smx:INFO: List of broken channels: []
11:01:38:ST3_smx:INFO: Total # of broken channels: 22
11:01:38:ST3_smx:INFO: List of broken channels: [3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45]
11:01:40:ST3_smx:INFO: chip: 3-2 15.590880 C 1259.567515 mV
11:01:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:01:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:01:40:ST3_smx:INFO: Electrons
11:01:40:ST3_smx:INFO: # loops 0
11:01:42:ST3_smx:INFO: # loops 1
11:01:44:ST3_smx:INFO: # loops 2
11:01:46:ST3_smx:INFO: Total # of broken channels: 0
11:01:46:ST3_smx:INFO: List of broken channels: []
11:01:46:ST3_smx:INFO: Total # of broken channels: 0
11:01:46:ST3_smx:INFO: List of broken channels: []
11:01:48:ST3_smx:INFO: chip: 10-3 25.062742 C 1224.468235 mV
11:01:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:01:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:01:48:ST3_smx:INFO: Electrons
11:01:48:ST3_smx:INFO: # loops 0
11:01:50:ST3_smx:INFO: # loops 1
11:01:52:ST3_smx:INFO: # loops 2
11:01:54:ST3_smx:INFO: Total # of broken channels: 0
11:01:54:ST3_smx:INFO: List of broken channels: []
11:01:54:ST3_smx:INFO: Total # of broken channels: 0
11:01:54:ST3_smx:INFO: List of broken channels: []
11:01:55:ST3_smx:INFO: chip: 5-4 28.225000 C 1218.600960 mV
11:01:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:01:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:01:55:ST3_smx:INFO: Electrons
11:01:55:ST3_smx:INFO: # loops 0
11:01:58:ST3_smx:INFO: # loops 1
11:02:00:ST3_smx:INFO: # loops 2
11:02:02:ST3_smx:INFO: Total # of broken channels: 0
11:02:02:ST3_smx:INFO: List of broken channels: []
11:02:02:ST3_smx:INFO: Total # of broken channels: 0
11:02:02:ST3_smx:INFO: List of broken channels: []
11:02:04:ST3_smx:INFO: chip: 12-5 21.902970 C 1230.330540 mV
11:02:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:02:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:02:04:ST3_smx:INFO: Electrons
11:02:04:ST3_smx:INFO: # loops 0
11:02:06:ST3_smx:INFO: # loops 1
11:02:08:ST3_smx:INFO: # loops 2
11:02:10:ST3_smx:INFO: Total # of broken channels: 0
11:02:10:ST3_smx:INFO: List of broken channels: []
11:02:10:ST3_smx:INFO: Total # of broken channels: 0
11:02:10:ST3_smx:INFO: List of broken channels: []
11:02:12:ST3_smx:INFO: chip: 7-6 37.726682 C 1177.390875 mV
11:02:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:02:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:02:12:ST3_smx:INFO: Electrons
11:02:12:ST3_smx:INFO: # loops 0
11:02:15:ST3_smx:INFO: # loops 1
11:02:17:ST3_smx:INFO: # loops 2
11:02:19:ST3_smx:INFO: Total # of broken channels: 0
11:02:19:ST3_smx:INFO: List of broken channels: []
11:02:19:ST3_smx:INFO: Total # of broken channels: 0
11:02:19:ST3_smx:INFO: List of broken channels: []
11:02:21:ST3_smx:INFO: chip: 14-7 40.898880 C 1165.571835 mV
11:02:21:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:02:21:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:02:21:ST3_smx:INFO: Electrons
11:02:21:ST3_smx:INFO: # loops 0
11:02:23:ST3_smx:INFO: # loops 1
11:02:24:ST3_smx:INFO: # loops 2
11:02:26:ST3_smx:INFO: Total # of broken channels: 0
11:02:26:ST3_smx:INFO: List of broken channels: []
11:02:26:ST3_smx:INFO: Total # of broken channels: 0
11:02:26:ST3_smx:INFO: List of broken channels: []
11:02:27:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:02:27:febtest:INFO: 01-00 | XA-000-09-004-037-013-006-07 | 37.7 | 1206.9
11:02:27:febtest:INFO: 08-01 | XA-000-09-004-037-004-006-06 | 37.7 | 1195.1
11:02:27:febtest:INFO: 03-02 | XA-000-09-004-037-010-006-15 | 15.6 | 1277.1
11:02:27:febtest:INFO: 10-03 | XA-000-09-004-037-010-004-15 | 28.2 | 1242.0
11:02:28:febtest:INFO: 05-04 | XA-000-09-004-037-007-004-08 | 31.4 | 1242.0
11:02:28:febtest:INFO: 12-05 | XA-000-09-004-037-016-007-12 | 25.1 | 1253.7
11:02:28:febtest:INFO: 07-06 | XA-000-09-004-037-016-006-12 | 40.9 | 1195.1
11:02:28:febtest:INFO: 14-07 | XA-000-09-004-037-007-006-08 | 40.9 | 1189.2
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_07_08-11_00_51
OPERATOR : Benjamin;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3195| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.4990', '1.850', '2.2300', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9980', '1.850', '2.3260', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9640', '1.850', '0.5130', '0.000', '0.0000', '0.000', '0.0000']