
FEB_3196 11.07.25 07:25:33
TextEdit.txt
07:25:33:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 07:25:33:ST3_Shared:INFO: FEB-Microcable 07:25:33:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 07:25:33:febtest:INFO: Testing FEB with SN 3196 07:25:35:smx_tester:INFO: Scanning setup 07:25:35:elinks:INFO: Disabling clock on downlink 0 07:25:35:elinks:INFO: Disabling clock on downlink 1 07:25:35:elinks:INFO: Disabling clock on downlink 2 07:25:35:elinks:INFO: Disabling clock on downlink 3 07:25:35:elinks:INFO: Disabling clock on downlink 4 07:25:35:setup_element:INFO: Checking SOS, encoding_mode: SOS 07:25:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 07:25:35:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 07:25:35:elinks:INFO: Disabling clock on downlink 0 07:25:35:elinks:INFO: Disabling clock on downlink 1 07:25:35:elinks:INFO: Disabling clock on downlink 2 07:25:35:elinks:INFO: Disabling clock on downlink 3 07:25:35:elinks:INFO: Disabling clock on downlink 4 07:25:35:setup_element:INFO: Checking SOS, encoding_mode: SOS 07:25:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 07:25:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0 07:25:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1 07:25:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2 07:25:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3 07:25:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4 07:25:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5 07:25:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6 07:25:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7 07:25:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8 07:25:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9 07:25:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10 07:25:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11 07:25:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12 07:25:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13 07:25:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14 07:25:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15 07:25:35:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 07:25:35:elinks:INFO: Disabling clock on downlink 0 07:25:35:elinks:INFO: Disabling clock on downlink 1 07:25:35:elinks:INFO: Disabling clock on downlink 2 07:25:35:elinks:INFO: Disabling clock on downlink 3 07:25:35:elinks:INFO: Disabling clock on downlink 4 07:25:35:setup_element:INFO: Checking SOS, encoding_mode: SOS 07:25:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 07:25:35:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 07:25:35:elinks:INFO: Disabling clock on downlink 0 07:25:35:elinks:INFO: Disabling clock on downlink 1 07:25:35:elinks:INFO: Disabling clock on downlink 2 07:25:35:elinks:INFO: Disabling clock on downlink 3 07:25:35:elinks:INFO: Disabling clock on downlink 4 07:25:35:setup_element:INFO: Checking SOS, encoding_mode: SOS 07:25:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 07:25:35:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 07:25:35:elinks:INFO: Disabling clock on downlink 0 07:25:35:elinks:INFO: Disabling clock on downlink 1 07:25:35:elinks:INFO: Disabling clock on downlink 2 07:25:35:elinks:INFO: Disabling clock on downlink 3 07:25:35:elinks:INFO: Disabling clock on downlink 4 07:25:35:setup_element:INFO: Checking SOS, encoding_mode: SOS 07:25:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 07:25:35:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 07:25:35:setup_element:INFO: Scanning clock phase 07:25:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 07:25:36:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 07:25:36:setup_element:INFO: Clock phase scan results for group 0, downlink 1 07:25:36:setup_element:INFO: Eye window for uplink 0 : _________________________________________________________________________XXXXXX_ Clock Delay: 35 07:25:36:setup_element:INFO: Eye window for uplink 1 : _________________________________________________________________________XXXXXX_ Clock Delay: 35 07:25:36:setup_element:INFO: Eye window for uplink 2 : __________________________________________________________________________XXXXXX Clock Delay: 36 07:25:36:setup_element:INFO: Eye window for uplink 3 : __________________________________________________________________________XXXXXX Clock Delay: 36 07:25:36:setup_element:INFO: Eye window for uplink 4 : _________________________________________________________________________XXXXX__ Clock Delay: 35 07:25:36:setup_element:INFO: Eye window for uplink 5 : _________________________________________________________________________XXXXX__ Clock Delay: 35 07:25:36:setup_element:INFO: Eye window for uplink 6 : _________________________________________________________________________XXXX___ Clock Delay: 34 07:25:36:setup_element:INFO: Eye window for uplink 7 : _________________________________________________________________________XXXX___ Clock Delay: 34 07:25:36:setup_element:INFO: Eye window for uplink 8 : ______________________________________________________________________XXXXXX____ Clock Delay: 32 07:25:36:setup_element:INFO: Eye window for uplink 9 : ______________________________________________________________________XXXXXX____ Clock Delay: 32 07:25:36:setup_element:INFO: Eye window for uplink 10: _______________________________________________________________________XXXXX____ Clock Delay: 33 07:25:36:setup_element:INFO: Eye window for uplink 11: _______________________________________________________________________XXXXX____ Clock Delay: 33 07:25:36:setup_element:INFO: Eye window for uplink 12: ________________________________________________________________________XXXXXX__ Clock Delay: 34 07:25:36:setup_element:INFO: Eye window for uplink 13: ________________________________________________________________________XXXXXX__ Clock Delay: 34 07:25:36:setup_element:INFO: Eye window for uplink 14: ________________________________________________________________________XXXXXXX_ Clock Delay: 35 07:25:36:setup_element:INFO: Eye window for uplink 15: ________________________________________________________________________XXXXXXX_ Clock Delay: 35 07:25:36:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 1 07:25:36:setup_element:INFO: Scanning data phases 07:25:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 07:25:36:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 07:25:41:setup_element:INFO: Data phase scan results for group 0, downlink 1 07:25:41:setup_element:INFO: Eye window for uplink 0 : ____________XXXXX_______________________ Data delay found: 34 07:25:41:setup_element:INFO: Eye window for uplink 1 : __________XXXXX_________________________ Data delay found: 32 07:25:41:setup_element:INFO: Eye window for uplink 2 : ____________XXXXXX______________________ Data delay found: 34 07:25:41:setup_element:INFO: Eye window for uplink 3 : ____________XXXX________________________ Data delay found: 33 07:25:41:setup_element:INFO: Eye window for uplink 4 : _______XXXX_____________________________ Data delay found: 28 07:25:41:setup_element:INFO: Eye window for uplink 5 : ______XXXX______________________________ Data delay found: 27 07:25:41:setup_element:INFO: Eye window for uplink 6 : XXXX___________________________________X Data delay found: 21 07:25:41:setup_element:INFO: Eye window for uplink 7 : XX___________________________________XXX Data delay found: 19 07:25:41:setup_element:INFO: Eye window for uplink 8 : ____________________XXXXXXXXXXXXXXX_____ Data delay found: 7 07:25:41:setup_element:INFO: Eye window for uplink 9 : ____________________________XXXXX_______ Data delay found: 10 07:25:41:setup_element:INFO: Eye window for uplink 10: _____________________________XXXXXX_____ Data delay found: 11 07:25:41:setup_element:INFO: Eye window for uplink 11: ______________________________XXXXX_____ Data delay found: 12 07:25:41:setup_element:INFO: Eye window for uplink 12: ________________________________XXXX____ Data delay found: 13 07:25:41:setup_element:INFO: Eye window for uplink 13: ________________________________XXXX____ Data delay found: 13 07:25:41:setup_element:INFO: Eye window for uplink 14: _________________________________XXXX___ Data delay found: 14 07:25:41:setup_element:INFO: Eye window for uplink 15: _________________________________XXXXX__ Data delay found: 15 07:25:41:setup_element:INFO: Setting the data phase to 34 for uplink 0 07:25:41:setup_element:INFO: Setting the data phase to 32 for uplink 1 07:25:41:setup_element:INFO: Setting the data phase to 34 for uplink 2 07:25:41:setup_element:INFO: Setting the data phase to 33 for uplink 3 07:25:41:setup_element:INFO: Setting the data phase to 28 for uplink 4 07:25:41:setup_element:INFO: Setting the data phase to 27 for uplink 5 07:25:41:setup_element:INFO: Setting the data phase to 21 for uplink 6 07:25:41:setup_element:INFO: Setting the data phase to 19 for uplink 7 07:25:41:setup_element:INFO: Setting the data phase to 7 for uplink 8 07:25:41:setup_element:INFO: Setting the data phase to 10 for uplink 9 07:25:41:setup_element:INFO: Setting the data phase to 11 for uplink 10 07:25:41:setup_element:INFO: Setting the data phase to 12 for uplink 11 07:25:41:setup_element:INFO: Setting the data phase to 13 for uplink 12 07:25:41:setup_element:INFO: Setting the data phase to 13 for uplink 13 07:25:41:setup_element:INFO: Setting the data phase to 14 for uplink 14 07:25:41:setup_element:INFO: Setting the data phase to 15 for uplink 15 07:25:41:setup_element:INFO: Beginning SMX ASICs map scan 07:25:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 07:25:41:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 07:25:41:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 07:25:41:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 07:25:41:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] 07:25:41:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1 07:25:41:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0 07:25:41:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8 07:25:42:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3 07:25:42:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2 07:25:42:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10 07:25:42:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11 07:25:42:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5 07:25:42:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4 07:25:42:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12 07:25:42:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13 07:25:42:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7 07:25:42:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6 07:25:42:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14 07:25:43:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15 07:25:44:setup_element:INFO: Performing Elink synchronization 07:25:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 07:25:44:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 07:25:44:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 07:25:44:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 07:25:44:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1 07:25:44:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)] 1 | [0] | 1 | 0 | [8] | 1 | [(0, 8)] 2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)] 3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)] 4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)] 5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)] 6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)] 7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)] |_________________________________________________________________________| 07:25:45:febtest:INFO: Init all SMX (CSA): 30 07:26:01:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 07:26:01:febtest:INFO: 01-00 | XA-000-09-004-037-015-013-04 | 28.2 | 1189.2 07:26:01:febtest:INFO: 08-01 | XA-000-09-004-020-011-009-02 | 40.9 | 1147.8 07:26:02:febtest:INFO: 03-02 | XA-000-09-004-037-018-013-15 | 18.7 | 1212.7 07:26:02:febtest:INFO: 10-03 | XA-000-09-004-020-008-009-12 | 40.9 | 1141.9 07:26:02:febtest:INFO: 05-04 | XA-000-09-004-037-006-011-05 | 31.4 | 1165.6 07:26:02:febtest:INFO: 12-05 | XA-000-09-004-020-011-008-02 | 40.9 | 1147.8 07:26:03:febtest:INFO: 07-06 | XA-000-09-004-037-012-013-10 | 21.9 | 1212.7 07:26:03:febtest:INFO: 14-07 | XA-000-09-004-020-008-008-12 | 31.4 | 1177.4 07:26:04:febtest:INFO: Set all CSA to ZERO FEB type: A FEB_A: 1 FEB_B: 0 07:26:06:ST3_smx:INFO: chip: 1-0 28.225000 C 1200.969315 mV 07:26:06:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:26:06:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:26:06:ST3_smx:INFO: Electrons 07:26:06:ST3_smx:INFO: # loops 0 07:26:08:ST3_smx:INFO: # loops 1 07:26:10:ST3_smx:INFO: # loops 2 07:26:12:ST3_smx:INFO: Total # of broken channels: 0 07:26:12:ST3_smx:INFO: List of broken channels: [] 07:26:12:ST3_smx:INFO: Total # of broken channels: 0 07:26:12:ST3_smx:INFO: List of broken channels: [] 07:26:14:ST3_smx:INFO: chip: 8-1 40.898880 C 1159.654860 mV 07:26:14:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:26:14:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:26:14:ST3_smx:INFO: Electrons 07:26:14:ST3_smx:INFO: # loops 0 07:26:15:ST3_smx:INFO: # loops 1 07:26:17:ST3_smx:INFO: # loops 2 07:26:19:ST3_smx:INFO: Total # of broken channels: 0 07:26:19:ST3_smx:INFO: List of broken channels: [] 07:26:19:ST3_smx:INFO: Total # of broken channels: 0 07:26:19:ST3_smx:INFO: List of broken channels: [] 07:26:21:ST3_smx:INFO: chip: 3-2 18.745682 C 1224.468235 mV 07:26:21:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:26:21:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:26:21:ST3_smx:INFO: Electrons 07:26:21:ST3_smx:INFO: # loops 0 07:26:23:ST3_smx:INFO: # loops 1 07:26:25:ST3_smx:INFO: # loops 2 07:26:28:ST3_smx:INFO: Total # of broken channels: 0 07:26:28:ST3_smx:INFO: List of broken channels: [] 07:26:28:ST3_smx:INFO: Total # of broken channels: 0 07:26:28:ST3_smx:INFO: List of broken channels: [] 07:26:29:ST3_smx:INFO: chip: 10-3 40.898880 C 1153.732915 mV 07:26:29:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:26:29:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:26:29:ST3_smx:INFO: Electrons 07:26:29:ST3_smx:INFO: # loops 0 07:26:32:ST3_smx:INFO: # loops 1 07:26:34:ST3_smx:INFO: # loops 2 07:26:36:ST3_smx:INFO: Total # of broken channels: 0 07:26:36:ST3_smx:INFO: List of broken channels: [] 07:26:36:ST3_smx:INFO: Total # of broken channels: 0 07:26:36:ST3_smx:INFO: List of broken channels: [] 07:26:38:ST3_smx:INFO: chip: 5-4 34.556970 C 1177.390875 mV 07:26:38:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:26:38:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:26:38:ST3_smx:INFO: Electrons 07:26:38:ST3_smx:INFO: # loops 0 07:26:40:ST3_smx:INFO: # loops 1 07:26:41:ST3_smx:INFO: # loops 2 07:26:43:ST3_smx:INFO: Total # of broken channels: 0 07:26:43:ST3_smx:INFO: List of broken channels: [] 07:26:43:ST3_smx:INFO: Total # of broken channels: 0 07:26:43:ST3_smx:INFO: List of broken channels: [] 07:26:45:ST3_smx:INFO: chip: 12-5 40.898880 C 1159.654860 mV 07:26:45:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:26:45:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:26:45:ST3_smx:INFO: Electrons 07:26:45:ST3_smx:INFO: # loops 0 07:26:47:ST3_smx:INFO: # loops 1 07:26:49:ST3_smx:INFO: # loops 2 07:26:51:ST3_smx:INFO: Total # of broken channels: 0 07:26:51:ST3_smx:INFO: List of broken channels: [] 07:26:51:ST3_smx:INFO: Total # of broken channels: 0 07:26:51:ST3_smx:INFO: List of broken channels: [] 07:26:53:ST3_smx:INFO: chip: 7-6 25.062742 C 1224.468235 mV 07:26:53:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:26:53:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:26:53:ST3_smx:INFO: Electrons 07:26:53:ST3_smx:INFO: # loops 0 07:26:55:ST3_smx:INFO: # loops 1 07:26:57:ST3_smx:INFO: # loops 2 07:26:59:ST3_smx:INFO: Total # of broken channels: 0 07:26:59:ST3_smx:INFO: List of broken channels: [] 07:26:59:ST3_smx:INFO: Total # of broken channels: 0 07:26:59:ST3_smx:INFO: List of broken channels: [] 07:27:00:ST3_smx:INFO: chip: 14-7 34.556970 C 1189.190035 mV 07:27:00:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:27:00:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:27:00:ST3_smx:INFO: Electrons 07:27:00:ST3_smx:INFO: # loops 0 07:27:02:ST3_smx:INFO: # loops 1 07:27:04:ST3_smx:INFO: # loops 2 07:27:06:ST3_smx:INFO: Total # of broken channels: 0 07:27:06:ST3_smx:INFO: List of broken channels: [] 07:27:06:ST3_smx:INFO: Total # of broken channels: 0 07:27:06:ST3_smx:INFO: List of broken channels: [] 07:27:07:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 07:27:07:febtest:INFO: 01-00 | XA-000-09-004-037-015-013-04 | 31.4 | 1218.6 07:27:07:febtest:INFO: 08-01 | XA-000-09-004-020-011-009-02 | 44.1 | 1177.4 07:27:07:febtest:INFO: 03-02 | XA-000-09-004-037-018-013-15 | 21.9 | 1242.0 07:27:08:febtest:INFO: 10-03 | XA-000-09-004-020-008-009-12 | 44.1 | 1171.5 07:27:08:febtest:INFO: 05-04 | XA-000-09-004-037-006-011-05 | 37.7 | 1195.1 07:27:08:febtest:INFO: 12-05 | XA-000-09-004-020-011-008-02 | 44.1 | 1183.3 07:27:08:febtest:INFO: 07-06 | XA-000-09-004-037-012-013-10 | 25.1 | 1247.9 07:27:08:febtest:INFO: 14-07 | XA-000-09-004-020-008-008-12 | 37.7 | 1206.9 ############################################################ # S U M M A R Y # ############################################################ {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 25_07_11-07_25_33 OPERATOR : Benjamin; SITE : KIT | SETUP : KIT_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 3196| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['2.451', '1.5040', '1.850', '2.2530', '0.000', '0.0000', '0.000', '0.0000'] VI_after__Init : ['2.450', '1.9930', '1.850', '2.4260', '0.000', '0.0000', '0.000', '0.0000'] VI_at__the_End : ['2.450', '1.9820', '1.850', '0.5273', '0.000', '0.0000', '0.000', '0.0000']