
FEB_3198 07.07.25 11:07:57
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11:07:57:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 11:07:57:ST3_Shared:INFO: FEB-Microcable 11:07:57:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 11:07:57:febtest:INFO: Testing FEB with SN 3198 11:07:59:smx_tester:INFO: Scanning setup 11:07:59:elinks:INFO: Disabling clock on downlink 0 11:07:59:elinks:INFO: Disabling clock on downlink 1 11:07:59:elinks:INFO: Disabling clock on downlink 2 11:07:59:elinks:INFO: Disabling clock on downlink 3 11:07:59:elinks:INFO: Disabling clock on downlink 4 11:07:59:setup_element:INFO: Checking SOS, encoding_mode: SOS 11:07:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 11:07:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 11:07:59:elinks:INFO: Disabling clock on downlink 0 11:07:59:elinks:INFO: Disabling clock on downlink 1 11:07:59:elinks:INFO: Disabling clock on downlink 2 11:07:59:elinks:INFO: Disabling clock on downlink 3 11:07:59:elinks:INFO: Disabling clock on downlink 4 11:07:59:setup_element:INFO: Checking SOS, encoding_mode: SOS 11:07:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 11:07:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8 11:07:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9 11:07:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10 11:07:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11 11:07:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12 11:07:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13 11:07:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14 11:07:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15 11:07:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 11:07:59:elinks:INFO: Disabling clock on downlink 0 11:07:59:elinks:INFO: Disabling clock on downlink 1 11:07:59:elinks:INFO: Disabling clock on downlink 2 11:07:59:elinks:INFO: Disabling clock on downlink 3 11:07:59:elinks:INFO: Disabling clock on downlink 4 11:07:59:setup_element:INFO: Checking SOS, encoding_mode: SOS 11:07:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 11:07:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 11:07:59:elinks:INFO: Disabling clock on downlink 0 11:07:59:elinks:INFO: Disabling clock on downlink 1 11:07:59:elinks:INFO: Disabling clock on downlink 2 11:07:59:elinks:INFO: Disabling clock on downlink 3 11:07:59:elinks:INFO: Disabling clock on downlink 4 11:07:59:setup_element:INFO: Checking SOS, encoding_mode: SOS 11:07:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 11:08:00:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 11:08:00:elinks:INFO: Disabling clock on downlink 0 11:08:00:elinks:INFO: Disabling clock on downlink 1 11:08:00:elinks:INFO: Disabling clock on downlink 2 11:08:00:elinks:INFO: Disabling clock on downlink 3 11:08:00:elinks:INFO: Disabling clock on downlink 4 11:08:00:setup_element:INFO: Checking SOS, encoding_mode: SOS 11:08:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 11:08:00:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 11:08:00:setup_element:INFO: Scanning clock phase 11:08:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 11:08:00:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 11:08:00:setup_element:INFO: Clock phase scan results for group 0, downlink 1 11:08:00:setup_element:INFO: Eye window for uplink 8 : _______________________________________________________________________XXXXXXX__ Clock Delay: 34 11:08:00:setup_element:INFO: Eye window for uplink 9 : _______________________________________________________________________XXXXXXX__ Clock Delay: 34 11:08:00:setup_element:INFO: Eye window for uplink 10: _______________________________________________________________________XXXXXXX__ Clock Delay: 34 11:08:00:setup_element:INFO: Eye window for uplink 11: _______________________________________________________________________XXXXXXX__ Clock Delay: 34 11:08:00:setup_element:INFO: Eye window for uplink 12: _________________________________________________________________________XXXXX__ Clock Delay: 35 11:08:00:setup_element:INFO: Eye window for uplink 13: _________________________________________________________________________XXXXX__ Clock Delay: 35 11:08:00:setup_element:INFO: Eye window for uplink 14: __________________________________________________________________________XXXXX_ Clock Delay: 36 11:08:00:setup_element:INFO: Eye window for uplink 15: __________________________________________________________________________XXXXX_ Clock Delay: 36 11:08:00:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 1 11:08:00:setup_element:INFO: Scanning data phases 11:08:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 11:08:00:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 11:08:05:setup_element:INFO: Data phase scan results for group 0, downlink 1 11:08:05:setup_element:INFO: Eye window for uplink 8 : _________________________XXXXXXXXXXXXXX_ Data delay found: 11 11:08:05:setup_element:INFO: Eye window for uplink 9 : _________________________________XXXXX__ Data delay found: 15 11:08:05:setup_element:INFO: Eye window for uplink 10: ________________________________XXXXX___ Data delay found: 14 11:08:05:setup_element:INFO: Eye window for uplink 11: _________________________________XXXXX__ Data delay found: 15 11:08:05:setup_element:INFO: Eye window for uplink 12: ___________________________________XXXX_ Data delay found: 16 11:08:05:setup_element:INFO: Eye window for uplink 13: ____________________________________XXX_ Data delay found: 17 11:08:05:setup_element:INFO: Eye window for uplink 14: XX___________________________________XXX Data delay found: 19 11:08:05:setup_element:INFO: Eye window for uplink 15: XXX___________________________________XX Data delay found: 20 11:08:05:setup_element:INFO: Setting the data phase to 11 for uplink 8 11:08:05:setup_element:INFO: Setting the data phase to 15 for uplink 9 11:08:05:setup_element:INFO: Setting the data phase to 14 for uplink 10 11:08:05:setup_element:INFO: Setting the data phase to 15 for uplink 11 11:08:05:setup_element:INFO: Setting the data phase to 16 for uplink 12 11:08:05:setup_element:INFO: Setting the data phase to 17 for uplink 13 11:08:05:setup_element:INFO: Setting the data phase to 19 for uplink 14 11:08:05:setup_element:INFO: Setting the data phase to 20 for uplink 15 11:08:05:setup_element:INFO: Beginning SMX ASICs map scan 11:08:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 11:08:05:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 11:08:05:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 11:08:05:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 11:08:05:uplink:INFO: Setting uplinks mask [8, 9, 10, 11, 12, 13, 14, 15] 11:08:05:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8 11:08:05:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9 11:08:06:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10 11:08:06:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11 11:08:06:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12 11:08:06:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13 11:08:06:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14 11:08:06:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15 11:08:08:setup_element:INFO: Performing Elink synchronization 11:08:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 11:08:08:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 11:08:08:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 11:08:08:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 11:08:08:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1 11:08:08:uplink:INFO: Enabling uplinks [8, 9, 10, 11, 12, 13, 14, 15] |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)] 3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)] 5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)] 7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)] |_________________________________________________________________________| 11:08:08:febtest:INFO: Init all SMX (CSA): 30 11:08:17:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 11:08:18:febtest:INFO: 08-01 | XA-000-09-004-019-003-012-04 | 34.6 | 1153.7 11:08:18:febtest:INFO: 10-03 | XA-000-09-004-019-006-012-15 | 34.6 | 1171.5 11:08:18:febtest:INFO: 12-05 | XA-000-09-004-019-012-023-07 | 44.1 | 1130.0 11:08:18:febtest:INFO: 14-07 | XA-000-09-004-019-015-023-09 | 25.1 | 1189.2 11:08:19:febtest:INFO: Set all CSA to ZERO FEB type: A FEB_A: 1 FEB_B: 0 11:08:21:ST3_smx:INFO: chip: 8-1 34.556970 C 1165.571835 mV 11:08:21:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:08:21:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:08:21:ST3_smx:INFO: Electrons 11:08:21:ST3_smx:INFO: # loops 0 11:08:23:ST3_smx:INFO: # loops 1 11:08:26:ST3_smx:INFO: # loops 2 11:08:28:ST3_smx:INFO: Total # of broken channels: 0 11:08:28:ST3_smx:INFO: List of broken channels: [] 11:08:28:ST3_smx:INFO: Total # of broken channels: 0 11:08:28:ST3_smx:INFO: List of broken channels: [] 11:08:30:ST3_smx:INFO: chip: 10-3 34.556970 C 1189.190035 mV 11:08:30:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:08:30:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:08:30:ST3_smx:INFO: Electrons 11:08:30:ST3_smx:INFO: # loops 0 11:08:32:ST3_smx:INFO: # loops 1 11:08:34:ST3_smx:INFO: # loops 2 11:08:36:ST3_smx:INFO: Total # of broken channels: 0 11:08:36:ST3_smx:INFO: List of broken channels: [] 11:08:36:ST3_smx:INFO: Total # of broken channels: 0 11:08:36:ST3_smx:INFO: List of broken channels: [] 11:08:38:ST3_smx:INFO: chip: 12-5 44.073563 C 1141.874115 mV 11:08:38:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:08:38:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:08:38:ST3_smx:INFO: Electrons 11:08:38:ST3_smx:INFO: # loops 0 11:08:40:ST3_smx:INFO: # loops 1 11:08:42:ST3_smx:INFO: # loops 2 11:08:45:ST3_smx:INFO: Total # of broken channels: 0 11:08:45:ST3_smx:INFO: List of broken channels: [] 11:08:45:ST3_smx:INFO: Total # of broken channels: 0 11:08:45:ST3_smx:INFO: List of broken channels: [] 11:08:46:ST3_smx:INFO: chip: 14-7 25.062742 C 1195.082160 mV 11:08:46:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:08:46:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:08:46:ST3_smx:INFO: Electrons 11:08:46:ST3_smx:INFO: # loops 0 11:08:49:ST3_smx:INFO: # loops 1 11:08:51:ST3_smx:INFO: # loops 2 11:08:53:ST3_smx:INFO: Total # of broken channels: 0 11:08:53:ST3_smx:INFO: List of broken channels: [] 11:08:53:ST3_smx:INFO: Total # of broken channels: 0 11:08:53:ST3_smx:INFO: List of broken channels: [] 11:08:53:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 11:08:53:febtest:INFO: 08-01 | XA-000-09-004-019-003-012-04 | 34.6 | 1195.1 11:08:53:febtest:INFO: 10-03 | XA-000-09-004-019-006-012-15 | 31.4 | 1230.3 11:08:53:febtest:INFO: 12-05 | XA-000-09-004-019-012-023-07 | 47.3 | 1165.6 11:08:54:febtest:INFO: 14-07 | XA-000-09-004-019-015-023-09 | 28.2 | 1218.6 ############################################################ # S U M M A R Y # ############################################################ {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 25_07_07-11_07_57 OPERATOR : Benjamin; SITE : KIT | SETUP : KIT_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 3198| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['2.450', '0.7500', '1.850', '1.8390', '0.000', '0.0000', '0.000', '0.0000'] VI_after__Init : ['2.450', '0.9808', '1.850', '1.8390', '0.000', '0.0000', '0.000', '0.0000'] VI_at__the_End : ['2.450', '0.9916', '1.850', '1.0090', '0.000', '0.0000', '0.000', '0.0000']