DTL-STS tests database

FEB_3199 21.07.25 07:55:14

link: XA-000-09-004-037-012-010-10
...SMX_1.root
link: XA-000-09-004-037-006-010-05
...SMX_3.root
link: XA-000-09-004-037-009-009-01
...SMX_5.root
link: XA-000-09-004-037-006-009-05
...SMX_7.root
link: XA-000-09-004-037-012-011-10
...SMX_0.root
link: XA-000-09-004-037-009-011-01
...SMX_2.root
link: XA-000-09-004-037-018-010-15
...SMX_4.root
link: XA-000-09-004-037-015-010-04
...SMX_6.root
link: XA-000-09-004-037-015-010-04
...VddmCSAstatus.root
TextEdit.txt
            07:55:14:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:55:14:ST3_Shared:INFO:	                         FEB-Sensor                         
07:55:14:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:55:27:ST3_ModuleSelector:INFO:	New Sensor ID: 4054
07:55:36:ST3_ModuleSelector:INFO:	http://web-docs.gsi.de/~dtl-sts/?m=module&n=M8UR5T4011234A2

07:55:36:ST3_ModuleSelector:INFO:	4054
07:55:36:febtest:INFO:	Testing FEB with SN 3199
07:55:38:smx_tester:INFO:	Scanning setup
07:55:38:elinks:INFO:	Disabling clock on downlink 0
07:55:38:elinks:INFO:	Disabling clock on downlink 1
07:55:38:elinks:INFO:	Disabling clock on downlink 2
07:55:38:elinks:INFO:	Disabling clock on downlink 3
07:55:38:elinks:INFO:	Disabling clock on downlink 4
07:55:38:setup_element:INFO:	Checking SOS, encoding_mode: SOS
07:55:38:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
07:55:38:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
07:55:38:elinks:INFO:	Disabling clock on downlink 0
07:55:38:elinks:INFO:	Disabling clock on downlink 1
07:55:38:elinks:INFO:	Disabling clock on downlink 2
07:55:38:elinks:INFO:	Disabling clock on downlink 3
07:55:38:elinks:INFO:	Disabling clock on downlink 4
07:55:38:setup_element:INFO:	Checking SOS, encoding_mode: SOS
07:55:38:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
07:55:38:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
07:55:38:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
07:55:38:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
07:55:38:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
07:55:38:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
07:55:38:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
07:55:38:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
07:55:38:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
07:55:38:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
07:55:38:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
07:55:38:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
07:55:38:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
07:55:38:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
07:55:38:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
07:55:38:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
07:55:38:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
07:55:38:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
07:55:38:elinks:INFO:	Disabling clock on downlink 0
07:55:38:elinks:INFO:	Disabling clock on downlink 1
07:55:38:elinks:INFO:	Disabling clock on downlink 2
07:55:38:elinks:INFO:	Disabling clock on downlink 3
07:55:38:elinks:INFO:	Disabling clock on downlink 4
07:55:38:setup_element:INFO:	Checking SOS, encoding_mode: SOS
07:55:38:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
07:55:38:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
07:55:38:elinks:INFO:	Disabling clock on downlink 0
07:55:38:elinks:INFO:	Disabling clock on downlink 1
07:55:38:elinks:INFO:	Disabling clock on downlink 2
07:55:38:elinks:INFO:	Disabling clock on downlink 3
07:55:38:elinks:INFO:	Disabling clock on downlink 4
07:55:38:setup_element:INFO:	Checking SOS, encoding_mode: SOS
07:55:38:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
07:55:39:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
07:55:39:elinks:INFO:	Disabling clock on downlink 0
07:55:39:elinks:INFO:	Disabling clock on downlink 1
07:55:39:elinks:INFO:	Disabling clock on downlink 2
07:55:39:elinks:INFO:	Disabling clock on downlink 3
07:55:39:elinks:INFO:	Disabling clock on downlink 4
07:55:39:setup_element:INFO:	Checking SOS, encoding_mode: SOS
07:55:39:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
07:55:39:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
07:55:39:setup_element:INFO:	Scanning clock phase
07:55:39:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
07:55:39:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:55:39:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
07:55:39:setup_element:INFO:	Eye window for uplink 0 : __________________________________________________________________________XXXXX_
Clock Delay: 36
07:55:39:setup_element:INFO:	Eye window for uplink 1 : __________________________________________________________________________XXXXX_
Clock Delay: 36
07:55:39:setup_element:INFO:	Eye window for uplink 2 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
07:55:39:setup_element:INFO:	Eye window for uplink 3 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
07:55:39:setup_element:INFO:	Eye window for uplink 4 : __________________________________________________________________________XXXXXX
Clock Delay: 36
07:55:39:setup_element:INFO:	Eye window for uplink 5 : __________________________________________________________________________XXXXXX
Clock Delay: 36
07:55:39:setup_element:INFO:	Eye window for uplink 6 : ________________________________________________________________________________
Clock Delay: 40
07:55:39:setup_element:INFO:	Eye window for uplink 7 : ________________________________________________________________________________
Clock Delay: 40
07:55:39:setup_element:INFO:	Eye window for uplink 8 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
07:55:39:setup_element:INFO:	Eye window for uplink 9 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
07:55:39:setup_element:INFO:	Eye window for uplink 10: ________________________________________________________________________XXXXXX__
Clock Delay: 34
07:55:39:setup_element:INFO:	Eye window for uplink 11: ________________________________________________________________________XXXXXX__
Clock Delay: 34
07:55:39:setup_element:INFO:	Eye window for uplink 12: _______________________________________________________________________XXXXXX___
Clock Delay: 33
07:55:39:setup_element:INFO:	Eye window for uplink 13: _______________________________________________________________________XXXXXX___
Clock Delay: 33
07:55:39:setup_element:INFO:	Eye window for uplink 14: ________________________________________________________________________XXXXXX__
Clock Delay: 34
07:55:39:setup_element:INFO:	Eye window for uplink 15: ________________________________________________________________________XXXXXX__
Clock Delay: 34
07:55:39:setup_element:INFO:	Setting the clock phase to 35 for group 0, downlink 1
07:55:39:setup_element:INFO:	Scanning data phases
07:55:39:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
07:55:39:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:55:44:setup_element:INFO:	Data phase scan results for group 0, downlink 1
07:55:44:setup_element:INFO:	Eye window for uplink 0 : __________XXXXX_________________________
Data delay found: 32
07:55:44:setup_element:INFO:	Eye window for uplink 1 : _________XXXXX__________________________
Data delay found: 31
07:55:44:setup_element:INFO:	Eye window for uplink 2 : _______XXXXX____________________________
Data delay found: 29
07:55:44:setup_element:INFO:	Eye window for uplink 3 : _______XXXX_____________________________
Data delay found: 28
07:55:44:setup_element:INFO:	Eye window for uplink 4 : _______XXXXX____________________________
Data delay found: 29
07:55:44:setup_element:INFO:	Eye window for uplink 5 : ______XXXX______________________________
Data delay found: 27
07:55:44:setup_element:INFO:	Eye window for uplink 6 : XX___________________________________XXX
Data delay found: 19
07:55:44:setup_element:INFO:	Eye window for uplink 7 : X___________________________________XXXX
Data delay found: 18
07:55:44:setup_element:INFO:	Eye window for uplink 8 : _____________________XXXXXXXXXXXXXXX____
Data delay found: 8
07:55:44:setup_element:INFO:	Eye window for uplink 9 : _____________________________XXXXX______
Data delay found: 11
07:55:44:setup_element:INFO:	Eye window for uplink 10: ______________________________XXXXX_____
Data delay found: 12
07:55:44:setup_element:INFO:	Eye window for uplink 11: ______________________________XXXXX_____
Data delay found: 12
07:55:44:setup_element:INFO:	Eye window for uplink 12: ___________________________XXXX_________
Data delay found: 8
07:55:44:setup_element:INFO:	Eye window for uplink 13: ____________________________XXX_________
Data delay found: 9
07:55:44:setup_element:INFO:	Eye window for uplink 14: ____________________________XXXXX_______
Data delay found: 10
07:55:44:setup_element:INFO:	Eye window for uplink 15: ____________________________XXXXXX______
Data delay found: 10
07:55:44:setup_element:INFO:	Setting the data phase to 32 for uplink 0
07:55:44:setup_element:INFO:	Setting the data phase to 31 for uplink 1
07:55:44:setup_element:INFO:	Setting the data phase to 29 for uplink 2
07:55:44:setup_element:INFO:	Setting the data phase to 28 for uplink 3
07:55:44:setup_element:INFO:	Setting the data phase to 29 for uplink 4
07:55:44:setup_element:INFO:	Setting the data phase to 27 for uplink 5
07:55:44:setup_element:INFO:	Setting the data phase to 19 for uplink 6
07:55:44:setup_element:INFO:	Setting the data phase to 18 for uplink 7
07:55:44:setup_element:INFO:	Setting the data phase to 8 for uplink 8
07:55:44:setup_element:INFO:	Setting the data phase to 11 for uplink 9
07:55:44:setup_element:INFO:	Setting the data phase to 12 for uplink 10
07:55:44:setup_element:INFO:	Setting the data phase to 12 for uplink 11
07:55:44:setup_element:INFO:	Setting the data phase to 8 for uplink 12
07:55:44:setup_element:INFO:	Setting the data phase to 9 for uplink 13
07:55:44:setup_element:INFO:	Setting the data phase to 10 for uplink 14
07:55:44:setup_element:INFO:	Setting the data phase to 10 for uplink 15
07:55:44:setup_element:INFO:	Beginning SMX ASICs map scan
07:55:44:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
07:55:44:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:55:44:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
07:55:44:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
07:55:44:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
07:55:44:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
07:55:44:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
07:55:45:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
07:55:45:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
07:55:45:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
07:55:45:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
07:55:45:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
07:55:45:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
07:55:45:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
07:55:45:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
07:55:45:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
07:55:45:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
07:55:45:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
07:55:46:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
07:55:46:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
07:55:46:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
07:55:47:setup_element:INFO:	Performing Elink synchronization
07:55:47:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
07:55:47:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:55:47:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
07:55:47:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
07:55:47:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
07:55:47:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   1   |  0  |   [1]   |    2    | [(0, 1), (1, 0)]
 1   | [0]  |   1   |  0  |   [8]   |    2    | [(0, 8), (1, 9)]
 2   | [0]  |   1   |  0  |   [3]   |    2    | [(0, 3), (1, 2)]
 3   | [0]  |   1   |  0  |  [10]   |    2    | [(0, 10), (1, 11)]
 4   | [0]  |   1   |  0  |   [5]   |    2    | [(0, 5), (1, 4)]
 5   | [0]  |   1   |  0  |  [12]   |    2    | [(0, 12), (1, 13)]
 6   | [0]  |   1   |  0  |   [7]   |    2    | [(0, 7), (1, 6)]
 7   | [0]  |   1   |  0  |  [14]   |    2    | [(0, 14), (1, 15)]
|_________________________________________________________________________|
07:55:48:febtest:INFO:	Init all SMX (CSA): 30
07:56:06:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:56:06:febtest:INFO:	01-00 | XA-000-09-004-037-012-011-10 |  28.2 | 1177.4
07:56:06:febtest:INFO:	08-01 | XA-000-09-004-037-012-010-10 |  28.2 | 1183.3
07:56:06:febtest:INFO:	03-02 | XA-000-09-004-037-009-011-01 |  25.1 | 1201.0
07:56:06:febtest:INFO:	10-03 | XA-000-09-004-037-006-010-05 |  28.2 | 1183.3
07:56:07:febtest:INFO:	05-04 | XA-000-09-004-037-018-010-15 |  34.6 | 1159.7
07:56:07:febtest:INFO:	12-05 | XA-000-09-004-037-009-009-01 |  28.2 | 1195.1
07:56:07:febtest:INFO:	07-06 | XA-000-09-004-037-015-010-04 |  28.2 | 1195.1
07:56:07:febtest:INFO:	14-07 | XA-000-09-004-037-006-009-05 |  25.1 | 1201.0
07:56:08:febtest:INFO:	Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
07:56:10:ST3_smx:INFO:	chip: 1-0 	 28.225000 C 	 1189.190035 mV
07:56:10:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:56:10:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:56:10:ST3_smx:INFO:		Electrons
07:56:10:ST3_smx:INFO:	# loops 0
07:56:12:ST3_smx:INFO:	# loops 1
07:56:15:ST3_smx:INFO:	# loops 2
07:56:17:ST3_smx:INFO:	Total # of broken channels: 0
07:56:17:ST3_smx:INFO:	List of broken channels: []
07:56:17:ST3_smx:INFO:	Total # of broken channels: 0
07:56:17:ST3_smx:INFO:	List of broken channels: []
07:56:19:ST3_smx:INFO:	chip: 8-1 	 28.225000 C 	 1195.082160 mV
07:56:19:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:56:19:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:56:19:ST3_smx:INFO:		Electrons
07:56:19:ST3_smx:INFO:	# loops 0
07:56:21:ST3_smx:INFO:	# loops 1
07:56:23:ST3_smx:INFO:	# loops 2
07:56:25:ST3_smx:INFO:	Total # of broken channels: 0
07:56:25:ST3_smx:INFO:	List of broken channels: []
07:56:25:ST3_smx:INFO:	Total # of broken channels: 0
07:56:25:ST3_smx:INFO:	List of broken channels: []
07:56:27:ST3_smx:INFO:	chip: 3-2 	 25.062742 C 	 1212.728715 mV
07:56:27:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:56:27:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:56:27:ST3_smx:INFO:		Electrons
07:56:27:ST3_smx:INFO:	# loops 0
07:56:29:ST3_smx:INFO:	# loops 1
07:56:31:ST3_smx:INFO:	# loops 2
07:56:33:ST3_smx:INFO:	Total # of broken channels: 0
07:56:33:ST3_smx:INFO:	List of broken channels: []
07:56:33:ST3_smx:INFO:	Total # of broken channels: 0
07:56:33:ST3_smx:INFO:	List of broken channels: []
07:56:34:ST3_smx:INFO:	chip: 10-3 	 31.389742 C 	 1195.082160 mV
07:56:34:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:56:34:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:56:34:ST3_smx:INFO:		Electrons
07:56:34:ST3_smx:INFO:	# loops 0
07:56:36:ST3_smx:INFO:	# loops 1
07:56:38:ST3_smx:INFO:	# loops 2
07:56:41:ST3_smx:INFO:	Total # of broken channels: 0
07:56:41:ST3_smx:INFO:	List of broken channels: []
07:56:41:ST3_smx:INFO:	Total # of broken channels: 0
07:56:41:ST3_smx:INFO:	List of broken channels: []
07:56:42:ST3_smx:INFO:	chip: 5-4 	 37.726682 C 	 1165.571835 mV
07:56:42:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:56:42:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:56:42:ST3_smx:INFO:		Electrons
07:56:42:ST3_smx:INFO:	# loops 0
07:56:44:ST3_smx:INFO:	# loops 1
07:56:46:ST3_smx:INFO:	# loops 2
07:56:48:ST3_smx:INFO:	Total # of broken channels: 0
07:56:48:ST3_smx:INFO:	List of broken channels: []
07:56:48:ST3_smx:INFO:	Total # of broken channels: 0
07:56:48:ST3_smx:INFO:	List of broken channels: []
07:56:50:ST3_smx:INFO:	chip: 12-5 	 28.225000 C 	 1206.851500 mV
07:56:50:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:56:50:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:56:50:ST3_smx:INFO:		Electrons
07:56:50:ST3_smx:INFO:	# loops 0
07:56:52:ST3_smx:INFO:	# loops 1
07:56:54:ST3_smx:INFO:	# loops 2
07:56:56:ST3_smx:INFO:	Total # of broken channels: 0
07:56:56:ST3_smx:INFO:	List of broken channels: []
07:56:56:ST3_smx:INFO:	Total # of broken channels: 0
07:56:56:ST3_smx:INFO:	List of broken channels: []
07:56:58:ST3_smx:INFO:	chip: 7-6 	 28.225000 C 	 1206.851500 mV
07:56:58:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:56:58:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:56:58:ST3_smx:INFO:		Electrons
07:56:58:ST3_smx:INFO:	# loops 0
07:57:00:ST3_smx:INFO:	# loops 1
07:57:02:ST3_smx:INFO:	# loops 2
07:57:04:ST3_smx:INFO:	Total # of broken channels: 0
07:57:04:ST3_smx:INFO:	List of broken channels: []
07:57:04:ST3_smx:INFO:	Total # of broken channels: 0
07:57:04:ST3_smx:INFO:	List of broken channels: []
07:57:06:ST3_smx:INFO:	chip: 14-7 	 28.225000 C 	 1206.851500 mV
07:57:06:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:57:06:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:57:06:ST3_smx:INFO:		Electrons
07:57:06:ST3_smx:INFO:	# loops 0
07:57:08:ST3_smx:INFO:	# loops 1
07:57:10:ST3_smx:INFO:	# loops 2
07:57:12:ST3_smx:INFO:	Total # of broken channels: 0
07:57:12:ST3_smx:INFO:	List of broken channels: []
07:57:12:ST3_smx:INFO:	Total # of broken channels: 0
07:57:12:ST3_smx:INFO:	List of broken channels: []
07:57:12:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:57:12:febtest:INFO:	01-00 | XA-000-09-004-037-012-011-10 |  31.4 | 1212.7
07:57:13:febtest:INFO:	08-01 | XA-000-09-004-037-012-010-10 |  31.4 | 1218.6
07:57:13:febtest:INFO:	03-02 | XA-000-09-004-037-009-011-01 |  28.2 | 1230.3
07:57:13:febtest:INFO:	10-03 | XA-000-09-004-037-006-010-05 |  31.4 | 1218.6
07:57:13:febtest:INFO:	05-04 | XA-000-09-004-037-018-010-15 |  40.9 | 1189.2
07:57:14:febtest:INFO:	12-05 | XA-000-09-004-037-009-009-01 |  31.4 | 1230.3
07:57:14:febtest:INFO:	07-06 | XA-000-09-004-037-015-010-04 |  31.4 | 1236.2
07:57:14:febtest:INFO:	14-07 | XA-000-09-004-037-006-009-05 |  31.4 | 1230.3
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 25_07_21-07_55_14
OPERATOR  : Benjamin; 
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3199| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
SENSOR_ID:	4054
MODULE_NAME:	http://web-docs.gsi.de/~dtl-sts/?m=module&n=M8UR5T4011234A2

MODULE_TYPE:	
MODULE_LADDER:	
MODULE_MODULE:	
MODULE_SIZE:	0
MODULE_GRADE:	
------------------------------------------------------------
VI_before_Init : ['2.451', '1.5980', '1.850', '2.7070', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0260', '1.850', '2.3650', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9890', '1.850', '0.5273', '0.000', '0.0000', '0.000', '0.0000']
Comment.txt