FEB_3203 15.07.25 08:12:01
Info
08:12:01:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:12:01:ST3_Shared:INFO: FEB-Microcable
08:12:01:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:12:01:febtest:INFO: Testing FEB with SN 3203
08:12:03:smx_tester:INFO: Scanning setup
08:12:03:elinks:INFO: Disabling clock on downlink 0
08:12:03:elinks:INFO: Disabling clock on downlink 1
08:12:03:elinks:INFO: Disabling clock on downlink 2
08:12:03:elinks:INFO: Disabling clock on downlink 3
08:12:03:elinks:INFO: Disabling clock on downlink 4
08:12:03:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:12:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:12:03:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:12:03:elinks:INFO: Disabling clock on downlink 0
08:12:03:elinks:INFO: Disabling clock on downlink 1
08:12:03:elinks:INFO: Disabling clock on downlink 2
08:12:03:elinks:INFO: Disabling clock on downlink 3
08:12:03:elinks:INFO: Disabling clock on downlink 4
08:12:03:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:12:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:12:03:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
08:12:03:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
08:12:03:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
08:12:03:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
08:12:03:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
08:12:03:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
08:12:03:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
08:12:03:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
08:12:03:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:12:03:elinks:INFO: Disabling clock on downlink 0
08:12:03:elinks:INFO: Disabling clock on downlink 1
08:12:03:elinks:INFO: Disabling clock on downlink 2
08:12:03:elinks:INFO: Disabling clock on downlink 3
08:12:03:elinks:INFO: Disabling clock on downlink 4
08:12:03:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:12:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:12:03:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:12:03:elinks:INFO: Disabling clock on downlink 0
08:12:03:elinks:INFO: Disabling clock on downlink 1
08:12:03:elinks:INFO: Disabling clock on downlink 2
08:12:03:elinks:INFO: Disabling clock on downlink 3
08:12:03:elinks:INFO: Disabling clock on downlink 4
08:12:03:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:12:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
08:12:03:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:12:03:elinks:INFO: Disabling clock on downlink 0
08:12:03:elinks:INFO: Disabling clock on downlink 1
08:12:03:elinks:INFO: Disabling clock on downlink 2
08:12:03:elinks:INFO: Disabling clock on downlink 3
08:12:03:elinks:INFO: Disabling clock on downlink 4
08:12:03:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:12:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
08:12:04:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:12:04:setup_element:INFO: Scanning clock phase
08:12:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:12:04:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:12:04:setup_element:INFO: Clock phase scan results for group 0, downlink 1
08:12:04:setup_element:INFO: Eye window for uplink 8 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
08:12:04:setup_element:INFO: Eye window for uplink 9 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
08:12:04:setup_element:INFO: Eye window for uplink 10: ________________________________________________________________________________
Clock Delay: 40
08:12:04:setup_element:INFO: Eye window for uplink 11: ________________________________________________________________________________
Clock Delay: 40
08:12:04:setup_element:INFO: Eye window for uplink 12: __________________________________________________________________________XXXXX_
Clock Delay: 36
08:12:04:setup_element:INFO: Eye window for uplink 13: __________________________________________________________________________XXXXX_
Clock Delay: 36
08:12:04:setup_element:INFO: Eye window for uplink 14: __________________________________________________________________________XXXXX_
Clock Delay: 36
08:12:04:setup_element:INFO: Eye window for uplink 15: __________________________________________________________________________XXXXX_
Clock Delay: 36
08:12:04:setup_element:INFO: Setting the clock phase to 35 for group 0, downlink 1
08:12:04:setup_element:INFO: Scanning data phases
08:12:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:12:04:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:12:09:setup_element:INFO: Data phase scan results for group 0, downlink 1
08:12:09:setup_element:INFO: Eye window for uplink 8 : X________________________XXXXXXXXXXXXXXX
Data delay found: 12
08:12:09:setup_element:INFO: Eye window for uplink 9 : _________________________________XXXXX__
Data delay found: 15
08:12:09:setup_element:INFO: Eye window for uplink 10: _________________________________XXXXXXX
Data delay found: 16
08:12:09:setup_element:INFO: Eye window for uplink 11: __________________________________XXXXXX
Data delay found: 16
08:12:09:setup_element:INFO: Eye window for uplink 12: __________________________________XXXX__
Data delay found: 15
08:12:09:setup_element:INFO: Eye window for uplink 13: ___________________________________XXXX_
Data delay found: 16
08:12:09:setup_element:INFO: Eye window for uplink 14: __________________________________XXXXX_
Data delay found: 16
08:12:09:setup_element:INFO: Eye window for uplink 15: ___________________________________XXXXX
Data delay found: 17
08:12:09:setup_element:INFO: Setting the data phase to 12 for uplink 8
08:12:09:setup_element:INFO: Setting the data phase to 15 for uplink 9
08:12:09:setup_element:INFO: Setting the data phase to 16 for uplink 10
08:12:09:setup_element:INFO: Setting the data phase to 16 for uplink 11
08:12:09:setup_element:INFO: Setting the data phase to 15 for uplink 12
08:12:09:setup_element:INFO: Setting the data phase to 16 for uplink 13
08:12:09:setup_element:INFO: Setting the data phase to 16 for uplink 14
08:12:09:setup_element:INFO: Setting the data phase to 17 for uplink 15
08:12:09:setup_element:INFO: Beginning SMX ASICs map scan
08:12:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:12:09:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:12:09:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
08:12:09:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
08:12:09:uplink:INFO: Setting uplinks mask [8, 9, 10, 11, 12, 13, 14, 15]
08:12:09:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
08:12:09:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
08:12:10:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
08:12:10:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
08:12:10:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
08:12:10:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
08:12:10:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
08:12:10:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
08:12:12:setup_element:INFO: Performing Elink synchronization
08:12:12:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:12:12:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:12:12:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
08:12:12:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
08:12:12:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
08:12:12:uplink:INFO: Enabling uplinks [8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
08:12:12:febtest:INFO: Init all SMX (CSA): 30
08:12:21:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:12:21:febtest:INFO: 08-01 | XA-000-09-004-037-009-002-01 | 34.6 | 1153.7
08:12:21:febtest:INFO: 10-03 | XA-000-09-004-037-014-026-14 | 21.9 | 1201.0
08:12:22:febtest:INFO: 12-05 | XA-000-09-004-037-012-002-10 | 40.9 | 1135.9
08:12:22:febtest:INFO: 14-07 | XA-000-09-004-037-014-025-14 | 21.9 | 1195.1
08:12:23:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
08:12:25:ST3_smx:INFO: chip: 8-1 34.556970 C 1159.654860 mV
08:12:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:12:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:12:25:ST3_smx:INFO: Electrons
08:12:25:ST3_smx:INFO: # loops 0
08:12:27:ST3_smx:INFO: # loops 1
08:12:29:ST3_smx:INFO: # loops 2
08:12:30:ST3_smx:INFO: Total # of broken channels: 0
08:12:30:ST3_smx:INFO: List of broken channels: []
08:12:30:ST3_smx:INFO: Total # of broken channels: 0
08:12:30:ST3_smx:INFO: List of broken channels: []
08:12:32:ST3_smx:INFO: chip: 10-3 21.902970 C 1206.851500 mV
08:12:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:12:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:12:32:ST3_smx:INFO: Electrons
08:12:32:ST3_smx:INFO: # loops 0
08:12:34:ST3_smx:INFO: # loops 1
08:12:36:ST3_smx:INFO: # loops 2
08:12:38:ST3_smx:INFO: Total # of broken channels: 0
08:12:38:ST3_smx:INFO: List of broken channels: []
08:12:38:ST3_smx:INFO: Total # of broken channels: 0
08:12:38:ST3_smx:INFO: List of broken channels: []
08:12:40:ST3_smx:INFO: chip: 12-5 40.898880 C 1147.806000 mV
08:12:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:12:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:12:40:ST3_smx:INFO: Electrons
08:12:40:ST3_smx:INFO: # loops 0
08:12:42:ST3_smx:INFO: # loops 1
08:12:44:ST3_smx:INFO: # loops 2
08:12:46:ST3_smx:INFO: Total # of broken channels: 0
08:12:46:ST3_smx:INFO: List of broken channels: []
08:12:46:ST3_smx:INFO: Total # of broken channels: 0
08:12:46:ST3_smx:INFO: List of broken channels: []
08:12:47:ST3_smx:INFO: chip: 14-7 25.062742 C 1206.851500 mV
08:12:47:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:12:47:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:12:47:ST3_smx:INFO: Electrons
08:12:47:ST3_smx:INFO: # loops 0
08:12:49:ST3_smx:INFO: # loops 1
08:12:52:ST3_smx:INFO: # loops 2
08:12:54:ST3_smx:INFO: Total # of broken channels: 0
08:12:54:ST3_smx:INFO: List of broken channels: []
08:12:54:ST3_smx:INFO: Total # of broken channels: 0
08:12:54:ST3_smx:INFO: List of broken channels: []
08:12:54:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:12:54:febtest:INFO: 08-01 | XA-000-09-004-037-009-002-01 | 34.6 | 1183.3
08:12:55:febtest:INFO: 10-03 | XA-000-09-004-037-014-026-14 | 25.1 | 1236.2
08:12:55:febtest:INFO: 12-05 | XA-000-09-004-037-012-002-10 | 44.1 | 1171.5
08:12:55:febtest:INFO: 14-07 | XA-000-09-004-037-014-025-14 | 25.1 | 1224.5
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_07_15-08_12_01
OPERATOR : Benjamin;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3203| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '0.8154', '1.850', '1.4050', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.0210', '1.850', '1.0570', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '0.9807', '1.850', '0.2579', '0.000', '0.0000', '0.000', '0.0000']