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LDO/KIT

FEB_3205    23.07.25 07:27:15

link: XA-000-09-004-037-005-008-11
SMX_1
...SMX_1.root
link: XA-000-09-004-037-011-006-02
SMX_3
...SMX_3.root
link: XA-000-09-004-037-008-006-12
SMX_5
...SMX_5.root
link: XA-000-09-004-037-008-023-11
SMX_7
...SMX_7.root
link: XA-000-09-004-037-005-005-11
SMX_0
...SMX_0.root
link: XA-000-09-004-037-005-007-11
SMX_2
...SMX_2.root
link: XA-000-09-004-037-014-006-09
SMX_4
...SMX_4.root
link: XA-000-09-004-037-005-006-11
SMX_6
...SMX_6.root
link: XA-000-09-004-037-005-006-11
VddmCSAstatus.png
...VddmCSAstatus.root
TextEdit.txt 
            07:27:15:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:27:15:ST3_Shared:INFO:	                         FEB-Sensor                         
07:27:15:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:27:34:ST3_ModuleSelector:INFO:	http://web-docs.gsi.de/~dtl-sts/?m=module&n=M8UR5T1011231A2

07:27:34:ST3_ModuleSelector:INFO:	25313

07:27:34:febtest:INFO:	Testing FEB with SN 3205
07:27:36:smx_tester:INFO:	Scanning setup
07:27:36:elinks:INFO:	Disabling clock on downlink 0
07:27:36:elinks:INFO:	Disabling clock on downlink 1
07:27:36:elinks:INFO:	Disabling clock on downlink 2
07:27:36:elinks:INFO:	Disabling clock on downlink 3
07:27:36:elinks:INFO:	Disabling clock on downlink 4
07:27:36:setup_element:INFO:	Checking SOS, encoding_mode: SOS
07:27:36:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
07:27:36:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
07:27:36:elinks:INFO:	Disabling clock on downlink 0
07:27:36:elinks:INFO:	Disabling clock on downlink 1
07:27:36:elinks:INFO:	Disabling clock on downlink 2
07:27:36:elinks:INFO:	Disabling clock on downlink 3
07:27:36:elinks:INFO:	Disabling clock on downlink 4
07:27:36:setup_element:INFO:	Checking SOS, encoding_mode: SOS
07:27:36:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
07:27:36:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
07:27:36:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
07:27:36:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
07:27:36:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
07:27:36:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
07:27:36:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
07:27:36:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
07:27:36:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
07:27:36:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
07:27:36:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
07:27:36:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
07:27:36:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
07:27:36:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
07:27:36:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
07:27:36:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
07:27:36:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
07:27:36:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
07:27:36:elinks:INFO:	Disabling clock on downlink 0
07:27:36:elinks:INFO:	Disabling clock on downlink 1
07:27:36:elinks:INFO:	Disabling clock on downlink 2
07:27:36:elinks:INFO:	Disabling clock on downlink 3
07:27:36:elinks:INFO:	Disabling clock on downlink 4
07:27:36:setup_element:INFO:	Checking SOS, encoding_mode: SOS
07:27:36:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
07:27:36:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
07:27:36:elinks:INFO:	Disabling clock on downlink 0
07:27:36:elinks:INFO:	Disabling clock on downlink 1
07:27:36:elinks:INFO:	Disabling clock on downlink 2
07:27:36:elinks:INFO:	Disabling clock on downlink 3
07:27:36:elinks:INFO:	Disabling clock on downlink 4
07:27:36:setup_element:INFO:	Checking SOS, encoding_mode: SOS
07:27:36:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
07:27:36:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
07:27:36:elinks:INFO:	Disabling clock on downlink 0
07:27:36:elinks:INFO:	Disabling clock on downlink 1
07:27:36:elinks:INFO:	Disabling clock on downlink 2
07:27:36:elinks:INFO:	Disabling clock on downlink 3
07:27:36:elinks:INFO:	Disabling clock on downlink 4
07:27:36:setup_element:INFO:	Checking SOS, encoding_mode: SOS
07:27:36:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
07:27:37:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
07:27:37:setup_element:INFO:	Scanning clock phase
07:27:37:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
07:27:37:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:27:37:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
07:27:37:setup_element:INFO:	Eye window for uplink 0 : ____________________________________________________________________________XXXX
Clock Delay: 37
07:27:37:setup_element:INFO:	Eye window for uplink 1 : ____________________________________________________________________________XXXX
Clock Delay: 37
07:27:37:setup_element:INFO:	Eye window for uplink 2 : __________________________________________________________________________XXXXXX
Clock Delay: 36
07:27:37:setup_element:INFO:	Eye window for uplink 3 : __________________________________________________________________________XXXXXX
Clock Delay: 36
07:27:37:setup_element:INFO:	Eye window for uplink 4 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
07:27:37:setup_element:INFO:	Eye window for uplink 5 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
07:27:37:setup_element:INFO:	Eye window for uplink 6 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
07:27:37:setup_element:INFO:	Eye window for uplink 7 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
07:27:37:setup_element:INFO:	Eye window for uplink 8 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
07:27:37:setup_element:INFO:	Eye window for uplink 9 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
07:27:37:setup_element:INFO:	Eye window for uplink 10: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
07:27:37:setup_element:INFO:	Eye window for uplink 11: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
07:27:37:setup_element:INFO:	Eye window for uplink 12: ________________________________________________________________________XXXXXX__
Clock Delay: 34
07:27:37:setup_element:INFO:	Eye window for uplink 13: ________________________________________________________________________XXXXXX__
Clock Delay: 34
07:27:37:setup_element:INFO:	Eye window for uplink 14: _________________________________________________________________________XXXXXXX
Clock Delay: 36
07:27:37:setup_element:INFO:	Eye window for uplink 15: _________________________________________________________________________XXXXXXX
Clock Delay: 36
07:27:37:setup_element:INFO:	Setting the clock phase to 35 for group 0, downlink 1
07:27:37:setup_element:INFO:	Scanning data phases
07:27:37:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
07:27:37:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:27:42:setup_element:INFO:	Data phase scan results for group 0, downlink 1
07:27:42:setup_element:INFO:	Eye window for uplink 0 : _____________XXXXX______________________
Data delay found: 35
07:27:42:setup_element:INFO:	Eye window for uplink 1 : ___________XXXXX________________________
Data delay found: 33
07:27:42:setup_element:INFO:	Eye window for uplink 2 : _________XXXXX__________________________
Data delay found: 31
07:27:42:setup_element:INFO:	Eye window for uplink 3 : ________XXXXX___________________________
Data delay found: 30
07:27:42:setup_element:INFO:	Eye window for uplink 4 : ____XXXX________________________________
Data delay found: 25
07:27:42:setup_element:INFO:	Eye window for uplink 5 : ___XXXX_________________________________
Data delay found: 24
07:27:42:setup_element:INFO:	Eye window for uplink 6 : XXX__________________________________XXX
Data delay found: 19
07:27:42:setup_element:INFO:	Eye window for uplink 7 : X___________________________________XXXX
Data delay found: 18
07:27:42:setup_element:INFO:	Eye window for uplink 8 : ______________________XXXXXXXXXXXXXXX___
Data delay found: 9
07:27:42:setup_element:INFO:	Eye window for uplink 9 : ______________________________XXXXX_____
Data delay found: 12
07:27:42:setup_element:INFO:	Eye window for uplink 10: _____________________________XXXXX______
Data delay found: 11
07:27:42:setup_element:INFO:	Eye window for uplink 11: _____________________________XXXXX______
Data delay found: 11
07:27:42:setup_element:INFO:	Eye window for uplink 12: ____________________________XXXX________
Data delay found: 9
07:27:42:setup_element:INFO:	Eye window for uplink 13: _____________________________XXXX_______
Data delay found: 10
07:27:42:setup_element:INFO:	Eye window for uplink 14: _______________________________XXXXX____
Data delay found: 13
07:27:42:setup_element:INFO:	Eye window for uplink 15: ________________________________XXXXX___
Data delay found: 14
07:27:42:setup_element:INFO:	Setting the data phase to 35 for uplink 0
07:27:42:setup_element:INFO:	Setting the data phase to 33 for uplink 1
07:27:42:setup_element:INFO:	Setting the data phase to 31 for uplink 2
07:27:42:setup_element:INFO:	Setting the data phase to 30 for uplink 3
07:27:42:setup_element:INFO:	Setting the data phase to 25 for uplink 4
07:27:42:setup_element:INFO:	Setting the data phase to 24 for uplink 5
07:27:42:setup_element:INFO:	Setting the data phase to 19 for uplink 6
07:27:42:setup_element:INFO:	Setting the data phase to 18 for uplink 7
07:27:42:setup_element:INFO:	Setting the data phase to 9 for uplink 8
07:27:42:setup_element:INFO:	Setting the data phase to 12 for uplink 9
07:27:42:setup_element:INFO:	Setting the data phase to 11 for uplink 10
07:27:42:setup_element:INFO:	Setting the data phase to 11 for uplink 11
07:27:42:setup_element:INFO:	Setting the data phase to 9 for uplink 12
07:27:42:setup_element:INFO:	Setting the data phase to 10 for uplink 13
07:27:42:setup_element:INFO:	Setting the data phase to 13 for uplink 14
07:27:42:setup_element:INFO:	Setting the data phase to 14 for uplink 15
07:27:42:setup_element:INFO:	Beginning SMX ASICs map scan
07:27:42:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
07:27:42:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:27:42:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
07:27:42:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
07:27:42:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
07:27:42:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
07:27:42:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
07:27:42:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
07:27:42:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
07:27:43:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
07:27:43:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
07:27:43:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
07:27:43:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
07:27:43:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
07:27:43:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
07:27:43:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
07:27:43:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
07:27:43:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
07:27:43:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
07:27:43:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
07:27:43:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
07:27:45:setup_element:INFO:	Performing Elink synchronization
07:27:45:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
07:27:45:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:27:45:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
07:27:45:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
07:27:45:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
07:27:45:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   1   |  0  |   [1]   |    2    | [(0, 1), (1, 0)]
 1   | [0]  |   1   |  0  |   [8]   |    2    | [(0, 8), (1, 9)]
 2   | [0]  |   1   |  0  |   [3]   |    2    | [(0, 3), (1, 2)]
 3   | [0]  |   1   |  0  |  [10]   |    2    | [(0, 10), (1, 11)]
 4   | [0]  |   1   |  0  |   [5]   |    2    | [(0, 5), (1, 4)]
 5   | [0]  |   1   |  0  |  [12]   |    2    | [(0, 12), (1, 13)]
 6   | [0]  |   1   |  0  |   [7]   |    2    | [(0, 7), (1, 6)]
 7   | [0]  |   1   |  0  |  [14]   |    2    | [(0, 14), (1, 15)]
|_________________________________________________________________________|
07:27:46:febtest:INFO:	Init all SMX (CSA): 30
07:27:59:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:27:59:febtest:INFO:	01-00 | XA-000-09-004-037-005-005-11 |  18.7 | 1218.6
07:27:59:febtest:INFO:	08-01 | XA-000-09-004-037-005-008-11 |  25.1 | 1195.1
07:28:00:febtest:INFO:	03-02 | XA-000-09-004-037-005-007-11 |  21.9 | 1201.0
07:28:00:febtest:INFO:	10-03 | XA-000-09-004-037-011-006-02 |  21.9 | 1195.1
07:28:00:febtest:INFO:	05-04 | XA-000-09-004-037-014-006-09 |  18.7 | 1212.7
07:28:00:febtest:INFO:	12-05 | XA-000-09-004-037-008-006-12 |  21.9 | 1206.9
07:28:00:febtest:INFO:	07-06 | XA-000-09-004-037-005-006-11 |  25.1 | 1201.0
07:28:01:febtest:INFO:	14-07 | XA-000-09-004-037-008-023-11 |  34.6 | 1165.6
07:28:02:febtest:INFO:	Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
07:28:04:ST3_smx:INFO:	chip: 1-0 	 21.902970 C 	 1230.330540 mV
07:28:04:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:28:04:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:28:04:ST3_smx:INFO:		Electrons
07:28:04:ST3_smx:INFO:	# loops 0
07:28:05:ST3_smx:INFO:	# loops 1
07:28:07:ST3_smx:INFO:	# loops 2
07:28:09:ST3_smx:INFO:	Total # of broken channels: 0
07:28:09:ST3_smx:INFO:	List of broken channels: []
07:28:09:ST3_smx:INFO:	Total # of broken channels: 0
07:28:09:ST3_smx:INFO:	List of broken channels: []
07:28:11:ST3_smx:INFO:	chip: 8-1 	 25.062742 C 	 1206.851500 mV
07:28:11:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:28:11:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:28:11:ST3_smx:INFO:		Electrons
07:28:11:ST3_smx:INFO:	# loops 0
07:28:13:ST3_smx:INFO:	# loops 1
07:28:14:ST3_smx:INFO:	# loops 2
07:28:16:ST3_smx:INFO:	Total # of broken channels: 0
07:28:16:ST3_smx:INFO:	List of broken channels: []
07:28:16:ST3_smx:INFO:	Total # of broken channels: 0
07:28:16:ST3_smx:INFO:	List of broken channels: []
07:28:17:ST3_smx:INFO:	chip: 3-2 	 25.062742 C 	 1218.600960 mV
07:28:17:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:28:17:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:28:17:ST3_smx:INFO:		Electrons
07:28:17:ST3_smx:INFO:	# loops 0
07:28:19:ST3_smx:INFO:	# loops 1
07:28:21:ST3_smx:INFO:	# loops 2
07:28:22:ST3_smx:INFO:	Total # of broken channels: 0
07:28:22:ST3_smx:INFO:	List of broken channels: []
07:28:22:ST3_smx:INFO:	Total # of broken channels: 0
07:28:22:ST3_smx:INFO:	List of broken channels: []
07:28:24:ST3_smx:INFO:	chip: 10-3 	 25.062742 C 	 1212.728715 mV
07:28:24:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:28:24:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:28:24:ST3_smx:INFO:		Electrons
07:28:24:ST3_smx:INFO:	# loops 0
07:28:25:ST3_smx:INFO:	# loops 1
07:28:27:ST3_smx:INFO:	# loops 2
07:28:28:ST3_smx:INFO:	Total # of broken channels: 0
07:28:28:ST3_smx:INFO:	List of broken channels: []
07:28:28:ST3_smx:INFO:	Total # of broken channels: 0
07:28:28:ST3_smx:INFO:	List of broken channels: []
07:28:30:ST3_smx:INFO:	chip: 5-4 	 21.902970 C 	 1224.468235 mV
07:28:30:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:28:30:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:28:30:ST3_smx:INFO:		Electrons
07:28:30:ST3_smx:INFO:	# loops 0
07:28:32:ST3_smx:INFO:	# loops 1
07:28:34:ST3_smx:INFO:	# loops 2
07:28:35:ST3_smx:INFO:	Total # of broken channels: 0
07:28:35:ST3_smx:INFO:	List of broken channels: []
07:28:35:ST3_smx:INFO:	Total # of broken channels: 0
07:28:35:ST3_smx:INFO:	List of broken channels: []
07:28:37:ST3_smx:INFO:	chip: 12-5 	 25.062742 C 	 1218.600960 mV
07:28:37:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:28:37:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:28:37:ST3_smx:INFO:		Electrons
07:28:37:ST3_smx:INFO:	# loops 0
07:28:39:ST3_smx:INFO:	# loops 1
07:28:40:ST3_smx:INFO:	# loops 2
07:28:42:ST3_smx:INFO:	Total # of broken channels: 0
07:28:42:ST3_smx:INFO:	List of broken channels: []
07:28:42:ST3_smx:INFO:	Total # of broken channels: 0
07:28:42:ST3_smx:INFO:	List of broken channels: []
07:28:44:ST3_smx:INFO:	chip: 7-6 	 28.225000 C 	 1212.728715 mV
07:28:44:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:28:44:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:28:44:ST3_smx:INFO:		Electrons
07:28:44:ST3_smx:INFO:	# loops 0
07:28:45:ST3_smx:INFO:	# loops 1
07:28:47:ST3_smx:INFO:	# loops 2
07:28:48:ST3_smx:INFO:	Total # of broken channels: 0
07:28:48:ST3_smx:INFO:	List of broken channels: []
07:28:48:ST3_smx:INFO:	Total # of broken channels: 1
07:28:48:ST3_smx:INFO:	List of broken channels: [113]
07:28:50:ST3_smx:INFO:	chip: 14-7 	 34.556970 C 	 1171.483840 mV
07:28:50:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:28:50:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:28:50:ST3_smx:INFO:		Electrons
07:28:50:ST3_smx:INFO:	# loops 0
07:28:51:ST3_smx:INFO:	# loops 1
07:28:53:ST3_smx:INFO:	# loops 2
07:28:54:ST3_smx:INFO:	Total # of broken channels: 0
07:28:54:ST3_smx:INFO:	List of broken channels: []
07:28:54:ST3_smx:INFO:	Total # of broken channels: 0
07:28:54:ST3_smx:INFO:	List of broken channels: []
07:28:55:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:28:55:febtest:INFO:	01-00 | XA-000-09-004-037-005-005-11 |  25.1 | 1247.9
07:28:55:febtest:INFO:	08-01 | XA-000-09-004-037-005-008-11 |  28.2 | 1224.5
07:28:55:febtest:INFO:	03-02 | XA-000-09-004-037-005-007-11 |  25.1 | 1236.2
07:28:56:febtest:INFO:	10-03 | XA-000-09-004-037-011-006-02 |  28.2 | 1236.2
07:28:56:febtest:INFO:	05-04 | XA-000-09-004-037-014-006-09 |  21.9 | 1247.9
07:28:56:febtest:INFO:	12-05 | XA-000-09-004-037-008-006-12 |  25.1 | 1242.0
07:28:56:febtest:INFO:	07-06 | XA-000-09-004-037-005-006-11 |  28.2 | 1236.2
07:28:56:febtest:INFO:	14-07 | XA-000-09-004-037-008-023-11 |  37.7 | 1195.1
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 25_07_23-07_27_15
OPERATOR  : Benjamin; 
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3205| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
SENSOR_ID:	25313

MODULE_NAME:	http://web-docs.gsi.de/~dtl-sts/?m=module&n=M8UR5T1011231A2

MODULE_TYPE:	
MODULE_LADDER:	
MODULE_MODULE:	
MODULE_SIZE:	0
MODULE_GRADE:	
------------------------------------------------------------
VI_before_Init : ['2.450', '1.5950', '1.850', '2.1320', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0330', '1.850', '2.3350', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9800', '1.850', '0.5153', '0.000', '0.0000', '0.000', '0.0000']
Comment.txt