
FEB_3210 24.07.25 07:50:19
TextEdit.txt
07:50:19:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 07:50:19:ST3_Shared:INFO: FEB-Microcable 07:50:19:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 07:50:19:febtest:INFO: Testing FEB with SN 3210 07:50:20:smx_tester:INFO: Scanning setup 07:50:20:elinks:INFO: Disabling clock on downlink 0 07:50:20:elinks:INFO: Disabling clock on downlink 1 07:50:20:elinks:INFO: Disabling clock on downlink 2 07:50:20:elinks:INFO: Disabling clock on downlink 3 07:50:20:elinks:INFO: Disabling clock on downlink 4 07:50:20:setup_element:INFO: Checking SOS, encoding_mode: SOS 07:50:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 07:50:20:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 07:50:20:elinks:INFO: Disabling clock on downlink 0 07:50:20:elinks:INFO: Disabling clock on downlink 1 07:50:20:elinks:INFO: Disabling clock on downlink 2 07:50:20:elinks:INFO: Disabling clock on downlink 3 07:50:20:elinks:INFO: Disabling clock on downlink 4 07:50:20:setup_element:INFO: Checking SOS, encoding_mode: SOS 07:50:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 07:50:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0 07:50:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1 07:50:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2 07:50:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3 07:50:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4 07:50:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5 07:50:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6 07:50:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7 07:50:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8 07:50:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9 07:50:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10 07:50:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11 07:50:21:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12 07:50:21:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13 07:50:21:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14 07:50:21:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15 07:50:21:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 07:50:21:elinks:INFO: Disabling clock on downlink 0 07:50:21:elinks:INFO: Disabling clock on downlink 1 07:50:21:elinks:INFO: Disabling clock on downlink 2 07:50:21:elinks:INFO: Disabling clock on downlink 3 07:50:21:elinks:INFO: Disabling clock on downlink 4 07:50:21:setup_element:INFO: Checking SOS, encoding_mode: SOS 07:50:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 07:50:21:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 07:50:21:elinks:INFO: Disabling clock on downlink 0 07:50:21:elinks:INFO: Disabling clock on downlink 1 07:50:21:elinks:INFO: Disabling clock on downlink 2 07:50:21:elinks:INFO: Disabling clock on downlink 3 07:50:21:elinks:INFO: Disabling clock on downlink 4 07:50:21:setup_element:INFO: Checking SOS, encoding_mode: SOS 07:50:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 07:50:21:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 07:50:21:elinks:INFO: Disabling clock on downlink 0 07:50:21:elinks:INFO: Disabling clock on downlink 1 07:50:21:elinks:INFO: Disabling clock on downlink 2 07:50:21:elinks:INFO: Disabling clock on downlink 3 07:50:21:elinks:INFO: Disabling clock on downlink 4 07:50:21:setup_element:INFO: Checking SOS, encoding_mode: SOS 07:50:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 07:50:21:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 07:50:21:setup_element:INFO: Scanning clock phase 07:50:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 07:50:21:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 07:50:21:setup_element:INFO: Clock phase scan results for group 0, downlink 1 07:50:21:setup_element:INFO: Eye window for uplink 0 : __________________________________________________________________________XXXXXX Clock Delay: 36 07:50:21:setup_element:INFO: Eye window for uplink 1 : __________________________________________________________________________XXXXXX Clock Delay: 36 07:50:21:setup_element:INFO: Eye window for uplink 2 : _________________________________________________________________________XXXXXX_ Clock Delay: 35 07:50:21:setup_element:INFO: Eye window for uplink 3 : _________________________________________________________________________XXXXXX_ Clock Delay: 35 07:50:21:setup_element:INFO: Eye window for uplink 4 : _________________________________________________________________________XXXXX__ Clock Delay: 35 07:50:21:setup_element:INFO: Eye window for uplink 5 : _________________________________________________________________________XXXXX__ Clock Delay: 35 07:50:21:setup_element:INFO: Eye window for uplink 6 : _________________________________________________________________________XXXXX__ Clock Delay: 35 07:50:21:setup_element:INFO: Eye window for uplink 7 : _________________________________________________________________________XXXXX__ Clock Delay: 35 07:50:21:setup_element:INFO: Eye window for uplink 8 : ________________________________________________________________________XXXXXX__ Clock Delay: 34 07:50:21:setup_element:INFO: Eye window for uplink 9 : ________________________________________________________________________XXXXXX__ Clock Delay: 34 07:50:21:setup_element:INFO: Eye window for uplink 10: ________________________________________________________________________________ Clock Delay: 40 07:50:21:setup_element:INFO: Eye window for uplink 11: ________________________________________________________________________________ Clock Delay: 40 07:50:21:setup_element:INFO: Eye window for uplink 12: _________________________________________________________________________XXXXX__ Clock Delay: 35 07:50:21:setup_element:INFO: Eye window for uplink 13: _________________________________________________________________________XXXXX__ Clock Delay: 35 07:50:21:setup_element:INFO: Eye window for uplink 14: _________________________________________________________________________XXXXXX_ Clock Delay: 35 07:50:21:setup_element:INFO: Eye window for uplink 15: _________________________________________________________________________XXXXXX_ Clock Delay: 35 07:50:21:setup_element:INFO: Setting the clock phase to 35 for group 0, downlink 1 07:50:21:setup_element:INFO: Scanning data phases 07:50:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 07:50:21:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 07:50:26:setup_element:INFO: Data phase scan results for group 0, downlink 1 07:50:26:setup_element:INFO: Eye window for uplink 0 : __________XXXXX_________________________ Data delay found: 32 07:50:26:setup_element:INFO: Eye window for uplink 1 : ________XXXXXX__________________________ Data delay found: 30 07:50:26:setup_element:INFO: Eye window for uplink 2 : _______XXXXX____________________________ Data delay found: 29 07:50:26:setup_element:INFO: Eye window for uplink 3 : ______XXXXX_____________________________ Data delay found: 28 07:50:26:setup_element:INFO: Eye window for uplink 4 : _____XXXXX______________________________ Data delay found: 27 07:50:26:setup_element:INFO: Eye window for uplink 5 : ____XXXX________________________________ Data delay found: 25 07:50:26:setup_element:INFO: Eye window for uplink 6 : XX___________________________________XXX Data delay found: 19 07:50:26:setup_element:INFO: Eye window for uplink 7 : X__________________________________XXXXX Data delay found: 17 07:50:26:setup_element:INFO: Eye window for uplink 8 : ______________________XXXXXXXXXXXXXXX___ Data delay found: 9 07:50:26:setup_element:INFO: Eye window for uplink 9 : ______________________________XXXXX_____ Data delay found: 12 07:50:26:setup_element:INFO: Eye window for uplink 10: ____________________________XXXXXX______ Data delay found: 10 07:50:26:setup_element:INFO: Eye window for uplink 11: _____________________________XXXXX______ Data delay found: 11 07:50:26:setup_element:INFO: Eye window for uplink 12: _____________________________XXXXX______ Data delay found: 11 07:50:26:setup_element:INFO: Eye window for uplink 13: _____________________________XXXXX______ Data delay found: 11 07:50:26:setup_element:INFO: Eye window for uplink 14: _____________________________XXXXX______ Data delay found: 11 07:50:26:setup_element:INFO: Eye window for uplink 15: _____________________________XXXXXX_____ Data delay found: 11 07:50:26:setup_element:INFO: Setting the data phase to 32 for uplink 0 07:50:26:setup_element:INFO: Setting the data phase to 30 for uplink 1 07:50:26:setup_element:INFO: Setting the data phase to 29 for uplink 2 07:50:26:setup_element:INFO: Setting the data phase to 28 for uplink 3 07:50:26:setup_element:INFO: Setting the data phase to 27 for uplink 4 07:50:26:setup_element:INFO: Setting the data phase to 25 for uplink 5 07:50:26:setup_element:INFO: Setting the data phase to 19 for uplink 6 07:50:26:setup_element:INFO: Setting the data phase to 17 for uplink 7 07:50:26:setup_element:INFO: Setting the data phase to 9 for uplink 8 07:50:26:setup_element:INFO: Setting the data phase to 12 for uplink 9 07:50:26:setup_element:INFO: Setting the data phase to 10 for uplink 10 07:50:26:setup_element:INFO: Setting the data phase to 11 for uplink 11 07:50:26:setup_element:INFO: Setting the data phase to 11 for uplink 12 07:50:26:setup_element:INFO: Setting the data phase to 11 for uplink 13 07:50:26:setup_element:INFO: Setting the data phase to 11 for uplink 14 07:50:26:setup_element:INFO: Setting the data phase to 11 for uplink 15 07:50:26:setup_element:INFO: Beginning SMX ASICs map scan 07:50:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 07:50:26:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 07:50:27:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 07:50:27:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 07:50:27:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] 07:50:27:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1 07:50:27:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0 07:50:27:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8 07:50:27:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9 07:50:27:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3 07:50:27:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2 07:50:27:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10 07:50:27:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11 07:50:27:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5 07:50:27:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4 07:50:27:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12 07:50:28:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13 07:50:28:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7 07:50:28:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6 07:50:28:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14 07:50:28:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15 07:50:29:setup_element:INFO: Performing Elink synchronization 07:50:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 07:50:29:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1] 07:50:29:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1] 07:50:29:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1] 07:50:29:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1 07:50:29:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15] |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)] 1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)] 2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)] 3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)] 4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)] 5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)] 6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)] 7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)] |_________________________________________________________________________| 07:50:30:febtest:INFO: Init all SMX (CSA): 30 07:50:46:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 07:50:46:febtest:INFO: 01-00 | XA-000-09-004-037-017-012-01 | 21.9 | 1218.6 07:50:46:febtest:INFO: 08-01 | XA-000-09-004-037-017-013-01 | 18.7 | 1224.5 07:50:46:febtest:INFO: 03-02 | XA-000-09-004-037-011-014-02 | 34.6 | 1189.2 07:50:47:febtest:INFO: 10-03 | XA-000-09-004-037-011-013-02 | 37.7 | 1159.7 07:50:47:febtest:INFO: 05-04 | XA-000-09-004-037-014-014-09 | 40.9 | 1165.6 07:50:47:febtest:INFO: 12-05 | XA-000-09-004-037-014-013-09 | 25.1 | 1206.9 07:50:47:febtest:INFO: 07-06 | XA-000-09-004-037-008-013-12 | 44.1 | 1159.7 07:50:48:febtest:INFO: 14-07 | XA-000-09-004-037-002-012-03 | 44.1 | 1141.9 07:50:49:febtest:INFO: Set all CSA to ZERO FEB type: A FEB_A: 1 FEB_B: 0 07:50:50:ST3_smx:INFO: chip: 1-0 21.902970 C 1230.330540 mV 07:50:50:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:50:50:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:50:50:ST3_smx:INFO: Electrons 07:50:50:ST3_smx:INFO: # loops 0 07:50:52:ST3_smx:INFO: # loops 1 07:50:54:ST3_smx:INFO: # loops 2 07:50:56:ST3_smx:INFO: Total # of broken channels: 0 07:50:56:ST3_smx:INFO: List of broken channels: [] 07:50:56:ST3_smx:INFO: Total # of broken channels: 1 07:50:56:ST3_smx:INFO: List of broken channels: [43] 07:50:58:ST3_smx:INFO: chip: 8-1 21.902970 C 1236.187875 mV 07:50:58:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:50:58:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:50:58:ST3_smx:INFO: Electrons 07:50:58:ST3_smx:INFO: # loops 0 07:50:59:ST3_smx:INFO: # loops 1 07:51:01:ST3_smx:INFO: # loops 2 07:51:03:ST3_smx:INFO: Total # of broken channels: 0 07:51:03:ST3_smx:INFO: List of broken channels: [] 07:51:03:ST3_smx:INFO: Total # of broken channels: 0 07:51:03:ST3_smx:INFO: List of broken channels: [] 07:51:05:ST3_smx:INFO: chip: 3-2 34.556970 C 1200.969315 mV 07:51:05:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:51:05:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:51:05:ST3_smx:INFO: Electrons 07:51:05:ST3_smx:INFO: # loops 0 07:51:06:ST3_smx:INFO: # loops 1 07:51:08:ST3_smx:INFO: # loops 2 07:51:10:ST3_smx:INFO: Total # of broken channels: 0 07:51:10:ST3_smx:INFO: List of broken channels: [] 07:51:10:ST3_smx:INFO: Total # of broken channels: 0 07:51:10:ST3_smx:INFO: List of broken channels: [] 07:51:12:ST3_smx:INFO: chip: 10-3 40.898880 C 1171.483840 mV 07:51:12:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:51:12:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:51:12:ST3_smx:INFO: Electrons 07:51:12:ST3_smx:INFO: # loops 0 07:51:13:ST3_smx:INFO: # loops 1 07:51:15:ST3_smx:INFO: # loops 2 07:51:17:ST3_smx:INFO: Total # of broken channels: 0 07:51:17:ST3_smx:INFO: List of broken channels: [] 07:51:17:ST3_smx:INFO: Total # of broken channels: 0 07:51:17:ST3_smx:INFO: List of broken channels: [] 07:51:19:ST3_smx:INFO: chip: 5-4 40.898880 C 1177.390875 mV 07:51:19:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:51:19:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:51:19:ST3_smx:INFO: Electrons 07:51:19:ST3_smx:INFO: # loops 0 07:51:20:ST3_smx:INFO: # loops 1 07:51:22:ST3_smx:INFO: # loops 2 07:51:24:ST3_smx:INFO: Total # of broken channels: 0 07:51:24:ST3_smx:INFO: List of broken channels: [] 07:51:24:ST3_smx:INFO: Total # of broken channels: 0 07:51:24:ST3_smx:INFO: List of broken channels: [] 07:51:26:ST3_smx:INFO: chip: 12-5 25.062742 C 1224.468235 mV 07:51:26:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:51:26:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:51:26:ST3_smx:INFO: Electrons 07:51:26:ST3_smx:INFO: # loops 0 07:51:27:ST3_smx:INFO: # loops 1 07:51:29:ST3_smx:INFO: # loops 2 07:51:31:ST3_smx:INFO: Total # of broken channels: 0 07:51:31:ST3_smx:INFO: List of broken channels: [] 07:51:31:ST3_smx:INFO: Total # of broken channels: 0 07:51:31:ST3_smx:INFO: List of broken channels: [] 07:51:33:ST3_smx:INFO: chip: 7-6 44.073563 C 1171.483840 mV 07:51:33:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:51:33:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:51:33:ST3_smx:INFO: Electrons 07:51:33:ST3_smx:INFO: # loops 0 07:51:34:ST3_smx:INFO: # loops 1 07:51:36:ST3_smx:INFO: # loops 2 07:51:38:ST3_smx:INFO: Total # of broken channels: 0 07:51:38:ST3_smx:INFO: List of broken channels: [] 07:51:38:ST3_smx:INFO: Total # of broken channels: 0 07:51:38:ST3_smx:INFO: List of broken channels: [] 07:51:40:ST3_smx:INFO: chip: 14-7 47.250730 C 1147.806000 mV 07:51:40:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:51:40:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:51:40:ST3_smx:INFO: Electrons 07:51:40:ST3_smx:INFO: # loops 0 07:51:41:ST3_smx:INFO: # loops 1 07:51:43:ST3_smx:INFO: # loops 2 07:51:45:ST3_smx:INFO: Total # of broken channels: 0 07:51:45:ST3_smx:INFO: List of broken channels: [] 07:51:45:ST3_smx:INFO: Total # of broken channels: 0 07:51:45:ST3_smx:INFO: List of broken channels: [] 07:51:45:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 07:51:45:febtest:INFO: 01-00 | XA-000-09-004-037-017-012-01 | 25.1 | 1253.7 07:51:46:febtest:INFO: 08-01 | XA-000-09-004-037-017-013-01 | 21.9 | 1259.6 07:51:46:febtest:INFO: 03-02 | XA-000-09-004-037-011-014-02 | 34.6 | 1218.6 07:51:46:febtest:INFO: 10-03 | XA-000-09-004-037-011-013-02 | 40.9 | 1195.1 07:51:46:febtest:INFO: 05-04 | XA-000-09-004-037-014-014-09 | 44.1 | 1195.1 07:51:46:febtest:INFO: 12-05 | XA-000-09-004-037-014-013-09 | 28.2 | 1247.9 07:51:47:febtest:INFO: 07-06 | XA-000-09-004-037-008-013-12 | 47.3 | 1195.1 07:51:47:febtest:INFO: 14-07 | XA-000-09-004-037-002-012-03 | 47.3 | 1171.5 ############################################################ # S U M M A R Y # ############################################################ {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 25_07_24-07_50_19 OPERATOR : Benjamin; SITE : KIT | SETUP : KIT_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 3210| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['2.450', '1.4550', '1.850', '2.1160', '0.000', '0.0000', '0.000', '0.0000'] VI_after__Init : ['2.450', '1.9730', '1.850', '2.3550', '0.000', '0.0000', '0.000', '0.0000'] VI_at__the_End : ['2.450', '1.9850', '1.850', '0.5230', '0.000', '0.0000', '0.000', '0.0000']